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* MIPS: Wire up accept4 syscall.Ralf Baechle2009-08-035-6/+13
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Delete unused function get_tc_unused().Ralf Baechle2009-08-031-12/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Fix bogus indentation.Ralf Baechle2009-08-031-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Make various functions static.Ralf Baechle2009-08-031-9/+8
| | | | | | None of these is used outside the VPE loader. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Free relocation chain on error.Ralf Baechle2009-08-031-3/+12
| | | | | | This may happen if a bad sequence of relocations is being encountered. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: VPE: Fix compiler warning.Raghu Gandham2009-08-031-1/+2
| | | | | Signed-off-by: Raghu Gandham <raghu@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Module: Make error messages unique.Ralf Baechle2009-08-031-3/+5
| | | | | | | | There were three different errors resulting in a "dangerous relocation" message. Add the relocation type to the messgages to make them more useful. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Run IPI code with interrupts disabled.David Daney2009-08-031-2/+2
| | | | | | | | | | | In mm/slab.c the function do_ccupdate_local requires that interrupts be disabled. If they are not, we panic with CONFIG_DEBUG_SLAB. So we disable interrupts while processing IPIs. Also these are not shared irqs, so get rid of the IRQF_SHARED flag. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Jazz: Fix read buffer overflowRoel Kluin2009-08-031-1/+1
| | | | | | | Check whether index is within bounds before testing the element. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Use DIV_ROUND_CLOSESTJulia Lawall2009-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The kernel.h macro DIV_ROUND_CLOSEST performs the computation (x + d/2)/d but is perhaps more readable. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @haskernel@ @@ #include <linux/kernel.h> @depends on haskernel@ expression x,__divisor; @@ - (((x) + ((__divisor) / 2)) / (__divisor)) + DIV_ROUND_CLOSEST(x,__divisor) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MTX-1: Request button GPIO before setting its directionFlorian Fainelli2009-08-031-2/+12
| | | | | | | | | | | | | | | | | | | This patch fixes the following warning at boot time: WARNING: at drivers/gpio/gpiolib.c:83 0x8021d5e0() autorequest GPIO-207 Modules linked in: Call Trace:[<8011e0ec>] 0x8011e0ec [<80110a28>] 0x80110a28 [<80110a28>] 0x80110a28 [..snip..] The current code does not request the GPIO and attempts to set its direction, which is a violation of the GPIO API. This patch also unhardcode the GPIO we request and use the one we defined in the button driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Override CFLAGS with -WerrorFlorian Fainelli2009-08-031-0/+1
| | | | | | | | Now that we have removed all warnings from the ar7 board code we can use -Werror like on other MIPS boards. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Remove unused tnetd7200_get_clock functionFlorian Fainelli2009-08-031-13/+0
| | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Use DMA_BIT_MASK(nn) instead of deprecated DMA_nnBIT_MASKFlorian Fainelli2009-08-031-3/+3
| | | | | Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Fix build failures when CONFIG_SERIAL_8250 is not enabledFlorian Fainelli2009-08-031-1/+2
| | | | | | | | | | | | | This patch fixes the following build failure when CONFIG_SERIAL_8250 is not enabled in the kernel configuration: arch/mips/ar7/built-in.o: In function 'ar7_register_devices': platform.c:(.init.text+0x61c): undefined reference to 'early_serial_setup' platform.c:(.init.text+0x61c): relocation truncated to fit: R_MIPS_26 against 'early_serial_setup' platform.c:(.init.text+0x68c): undefined reference to 'early_serial_setup' platform.c:(.init.text+0x68c): relocation truncated to fit: R_MIPS_26 against 'early_serial_setup' Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix read buffer overflowRoel Kluin2009-08-031-1/+1
| | | | | Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Fix build warning on memory.cFlorian Fainelli2009-08-031-1/+1
| | | | | | | | | This patch fixes the following build warning: arch/mips/ar7/memory.c: In function 'memsize': arch/mips/ar7/memory.c:55: warning: passing argument 1 of 'writel' makes integer from pointer without a cast Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon PCIe: Make hardware and software bus numbers match.David Daney2009-08-031-14/+17
| | | | | | | | Some SiliconImage PCIe SATA controlers are not detected when the bus numbers differ. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: RBTX4939: Fix IOC pin-enable register updatingAtsushi Nemoto2009-08-031-1/+1
| | | | | | | | The rbtx4939_update_ioc_pen() expects txx9_ce_res[] already initialized. Call it after tx4939_setup(). Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Simplify and correct interrupt handling for MSP4200Shane McDonald2009-08-031-9/+1
| | | | | | | | | | | | The current interrupt handling code for the MSP4200 always masks an interrupt before acknowledging it. This is not required, as that will be handled by the level interrupt handler. This change simplifies the MSP4200 code to remove the masking in the ack routine, and makes sure that the minimum required operation is performed for masking and acking, rather than always both masking and acking the interrupt. Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MSPxxxx: define MIPS34K_MISSED_ITLB_WAR for other PMC-Sierra SoCFlorian Fainelli2009-08-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Trying to build a PMC-Sierra MSP4200 VoIP gateway defconfig will not work since MIPS34K_MISSED_ITLB_WAR is not defined for all boards supported within pmc-serria/msp71xx. This patch defines MIPS34K_MISSED_ITLB_WAR to prevent such build failures: CHK include/linux/version.h CHK include/linux/utsrelease.h SYMLINK include/asm -> include/asm-mips CC arch/mips/kernel/asm-offsets.s In file included fromlinux-msp71xx/linux-2.6.29/arch/mips/include/asm/bitops.h:24, from include/linux/bitops.h:17, from include/linux/kernel.h:15, from include/linux/sched.h:52, from arch/mips/kernel/asm-offsets.c:13: linux-msp71xx/linux-2.6.29/arch/mips/include/asm/war.h:241:2: error: #error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform This fixes a compile error when building for the MSP4200 boards. Identical patches to fix this were send by Florian Fainelli <florian@openwrt.org> Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MSP71xx: fix build failures on msp_irq_slp.cFlorian Fainelli2009-08-031-2/+2
| | | | | | | | | | | Trying to build MSP4200 VoIP defconfig also fails on msp_irq_slp.c with a non-existing reference to mask_slp_irq, which is in turn mask_msp_slp_irq. Passed that, we will also miss a comma when calling set_irq_chip_and_handler. This patch fixes both issues. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix loading of modules with unresolved weak symbolsGabor Juhos2009-08-031-2/+2
| | | | | | | | | | | | | | | | | Loading of modules with unresolved weak symbols fails on MIPS since '88173507e4fc1e7ecd111b0565e8cba0cb7dae6d'. Modules: handle symbols that have a zero value The module subsystem cannot handle symbols that are zero. If symbols are present that have a zero value then the module resolver prints out a message that these symbols are unresolved. We have to use IS_ERR_VALUE() to check that a symbol has been resolved or not. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMTC: Move cross VPE writes to after a TC is assigned to VPE.Kurt Martin2009-08-031-5/+8
| | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Raghu Gandham <raghu@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] MIPS: SMTC: Fix compile errorRaghu Gandham2009-08-031-1/+1
| | | | | | | | Commit fc03bc1715ca0ad4ccfe97aab16bcc9e7129c1a4 breaks when SMTC support is enabled on Malta. Signed-off-by: Raghu Gandham <raghu@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Avoid clobbering struct pt_regs in kthreadsDavid Daney2009-08-033-4/+8
| | | | | | | | | | | | | | | | | | | The resume() implementation octeon_switch.S examines the saved cp0_status register. We were clobbering the entire pt_regs structure in kernel threads leading to random crashes. When switching away from a kernel thread, the saved cp0_status is examined and if bit 30 is set it is cleared and the CP2 state saved into the pt_regs structure. Since the kernel thread stack overlaid the pt_regs structure this resulted in a corrupt stack. When the kthread with the corrupt stack was resumed, it could crash if it used any of the data in the stack that was clobbered. We fix it by moving the kernel thread stack down so it doesn't overlay pt_regs. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: AR7: Remove unused inclusions of <linux/version.h>.Huang Weiyi2009-08-032-2/+0
| | | | | Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: MIPSsim: Fix unbalance brace in mipssim get_c0_compare_int()Yoichi Yuasa2009-08-031-6/+6
| | | | | | | | | | | cc1: warnings being treated as errors arch/mips/mipssim/sim_time.c: In function 'get_c0_compare_int': arch/mips/mipssim/sim_time.c:103: warning: ISO C90 forbids mixed declarations and code arch/mips/mipssim/sim_time.c:116: error: expected declaration or statement at end of input make[1]: *** [arch/mips/mipssim/sim_time.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Fix compile for !CONFIG_SMPAlexander Clouter2009-08-031-1/+1
| | | | | | | | Commit fc03bc1715ca0ad4ccfe97aab16bcc9e7129c1a4 breaks compiling MIPS with SMP disabled. This patch fixes that. Signed-off-by: Alexander Clouter <alex@digriz.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Drop mmap_sem in pagefault oom pathAkinobu Mita2009-08-031-0/+1
| | | | | | | | Fix the pagefault oom path which does not drop mm->mmap_sem. This was introduced by commit c7c1e3846bac1e4b8a8941f6a194812e28b0a519 Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Eleminate filenames from commentsRalf Baechle2009-08-0336-83/+5
| | | | | | | | | | They tend to get not updated when files are moved around or copied and lack any obvious use. While at it zap some only too obvious comments and as per Shinya's suggestion, add a copyright header to extable.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Acked-by: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
* [PATCH] MIPS: Cavium: Move swapped comments to their rightful place.Ralf Baechle2009-08-031-2/+2
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* mm: Remove duplicate definitions in MIPS and SHBenjamin Herrenschmidt2009-07-271-11/+0
| | | | | | | | Those definitions are already provided by asm-generic Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()Benjamin Herrenschmidt2009-07-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | mm: Pass virtual address to [__]p{te,ud,md}_free_tlb() Upcoming paches to support the new 64-bit "BookE" powerpc architecture will need to have the virtual address corresponding to PTE page when freeing it, due to the way the HW table walker works. Basically, the TLB can be loaded with "large" pages that cover the whole virtual space (well, sort-of, half of it actually) represented by a PTE page, and which contain an "indirect" bit indicating that this TLB entry RPN points to an array of PTEs from which the TLB can then create direct entries. Thus, in order to invalidate those when PTE pages are deleted, we need the virtual address to pass to tlbilx or tlbivax instructions. The old trick of sticking it somewhere in the PTE page struct page sucks too much, the address is almost readily available in all call sites and almost everybody implemets these as macros, so we may as well add the argument everywhere. I added it to the pmd and pud variants for consistency. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV] Acked-by: Nick Piggin <npiggin@suse.de> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* headers: smp_lock.h reduxAlexey Dobriyan2009-07-122-2/+0
| | | | | | | | | | | | | * Remove smp_lock.h from files which don't need it (including some headers!) * Add smp_lock.h to files which do need it * Make smp_lock.h include conditional in hardirq.h It's needed only for one kernel_locked() usage which is under CONFIG_PREEMPT This will make hardirq.h inclusion cheaper for every PREEMPT=n config (which includes allmodconfig/allyesconfig, BTW) Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sched: INIT_PREEMPT_COUNTPeter Zijlstra2009-07-101-3/+1
| | | | | | | | | | | | | | | | | | | | | Pull the initial preempt_count value into a single definition site. Maintainers for: alpha, ia64 and m68k, please have a look, your arch code is funny. The header magic is a bit odd, but similar to the KERNEL_DS one, CPP waits with expanding these macros until the INIT_THREAD_INFO macro itself is expanded, which is in arch/*/kernel/init_task.c where we've already included sched.h so we're good. Cc: tony.luck@intel.com Cc: rth@twiddle.net Cc: geert@linux-m68k.org Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Matt Mackall <mpm@selenic.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* MIPS: Fix CONFIG_FLATMEM version of pfn_valid()Ralf Baechle2009-07-031-1/+8
| | | | | | | | | | For systems which do not define PHYS_OFFSET as 0 pfn_valid() may falsely have returned 0 on most configurations. Bug introduced by commit 752fbeb2e3555c0d236e992f1195fd7ce30e728d (linux-mips.org) rsp. 6f284a2ce7b8bc49cb8455b1763357897a899abb (kernel.org) titled "[MIPS] FLATMEM: introduce PHYS_OFFSET." Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Reorganize Cavium OCTEON PCI support.David Daney2009-07-038-221/+197
| | | | | | | | | Move the cavium PCI files to the arch/mips/pci directory. Also cleanup comment formatting and code layout. Code from pci-common.c, was moved into other files. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Update Yoichi Yuasa's e-mail addressYoichi Yuasa2009-07-0345-59/+59
| | | | | Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Allow suspend and hibernation again on uniprocessor kernels.Ralf Baechle2009-07-031-2/+2
| | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Pavel Machek <pavel@ucw.cz>
* MIPS: 64-bit: Fix o32 core dumpYong Zhang2009-07-033-4/+22
| | | | | | | | | | | | | | | | If an o32 process generates a core dump on a 64 bit kernel, the core file will not be correctly recognized. This is because ELF_CORE_COPY_REGS and ELF_CORE_COPY_TASK_REGS are not correctly defined for o32 and will use the default register set which would be CONFIG_64BIT in asm/elf.h. So we'll switch to use the right register defines in this situation by checking for WANT_COMPAT_REG_H and use the right defines of ELF_CORE_COPY_REGS and ELF_CORE_COPY_TASK_REGS. [Ralf: made ELF_CORE_COPY_TASK_REGS() bullet-proof against funny arguments.] Signed-off-by: Yong Zhang <yong.zhang@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: Update sync-r4k for current kernelTim Anderson2009-07-032-16/+17
| | | | | | | | This revises the sync-4k so it will boot and operate since the removal of expirelo from the timer code. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: Move gcmp_probe to before the SMP opsTim Anderson2009-07-033-5/+16
| | | | | | | | This is to move the gcmp_probe call to before the use of and selection of the smp_ops functions. This allows malta with 1004K to work. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: activate CMP supportTim Anderson2009-07-035-62/+25
| | | | | | | | | Most of the CMP support was added before, this mostly correct compile problems but adds a platform specific translation for the interrupt number based on cpu number. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: Extend IPI handling to CPU numberTim Anderson2009-07-032-38/+40
| | | | | | | | This takes the current IPI interrupt assignment from the fix number of 4 to the number of CPUs defined in the system. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: CMP: Extend the GIC IPI interrupts beyond 32Tim Anderson2009-07-032-11/+8
| | | | | | | | | This patch extends the GIC interrupt handling beyond the current 32 bit range as well as extending the number of interrupts based on the number of CPUs. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Define __arch_swab64 for all mips r2 cpusDavid Daney2009-07-031-2/+6
| | | | | | | | | | | Some CPUs implement mipsr2, but because they are a super-set of mips64r2 do not define CONFIG_CPU_MIPS64_R2. Cavium OCTEON falls into this category. We would still like to use the optimized implementation, so since we have already checked for CONFIG_CPU_MIPSR2, checking for CONFIG_64BIT instead of CONFIG_CPU_MIPS64_R2 is sufficient. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Update VR41xx GPIO driver to use gpiolibYoichi Yuasa2009-07-032-19/+4
| | | | | Signed-off-by: Yoichi Yuasa <yyuasa@linux.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Hookup new syscalls sys_rt_tgsigqueueinfo and sys_perf_counter_open.David Daney2009-07-035-6/+20
| | | | | | | [Ralf: I fixed up the numbering in the comment in scall64-n32.S.] Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Remove unnecessary function prototypesDmitri Vorobiev2009-07-031-3/+0
| | | | | Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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