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* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-301-5/+1
| | | | | | | | | | | | | | | | | | | | | Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* openrisc: Fix broken paths to arch/or32Geert Uytterhoeven2018-12-201-1/+1
| | | | | | | | OpenRISC was mainlined as "openrisc", not "or32". vmlinux.lds is generated from vmlinux.lds.S. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: entry: Fix delay slot exception detectionStafford Horne2018-07-011-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Originally in patch e6d20c55a4 ("openrisc: entry: Fix delay slot detection") I fixed delay slot detection, but only for QEMU. We missed that hardware delay slot detection using delay slot exception flag (DSX) was still broken. This was because QEMU set the DSX flag in both pre-exception supervision register (ESR) and supervision register (SR) register, but on real hardware the DSX flag is only set on the SR register during exceptions. Fix this by carrying the DSX flag into the SR register during exception. We also update the DSX flag read locations to read the value from the SR register not the pt_regs SR register which represents ESR. The ESR should never have the DSX flag set. In the process I updated/removed a few comments to match the current state. Including removing a comment saying that the DSX detection logic was inefficient and needed to be rewritten. I have tested this on QEMU with a patch ensuring it matches the hardware specification. Link: https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg00000.html Fixes: e6d20c55a4 ("openrisc: entry: Fix delay slot detection") Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: enable LOCKDEP_SUPPORT and irqflags tracingStafford Horne2017-11-031-3/+71
| | | | | | | | | | | | | | | | | | | Lockdep is needed for proving the spinlocks and rwlocks work fine on our platform. It also requires calling the trace_hardirqs_off() and trace_hardirqs_on() pair of routines when entering and exiting an interrupt. For OpenRISC the interrupt stack frame does not support frame pointers, so to call trace_hardirqs_on() and trace_hardirqs_off() here the macro's build up a stack frame each time. There is one necessary small change in _sys_call_handler to move interrupt enabling later so they can get re-enabled during syscall restart. This was done to fix lockdep warnings that are now possible due to this patch. Signed-off-by: Stafford Horne <shorne@gmail.com>
* scripts/spelling.txt: add "efective" pattern and fix typo instancesMasahiro Yamada2017-02-271-1/+1
| | | | | | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: efective||effective While we are here, fix the "addres" as well in the touched line in arch/openrisc/kernel/entry.S. Link: http://lkml.kernel.org/r/1481573103-11329-10-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* scripts/spelling.txt: add "aligment" pattern and fix typo instancesMasahiro Yamada2017-02-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: aligment||alignment I did not touch the "N_BYTE_ALIGMENT" macro in drivers/net/wireless/realtek/rtlwifi/wifi.h to avoid unpredictable impact. I fixed "_aligment_handler" in arch/openrisc/kernel/entry.S because it is surrounded by #if 0 ... #endif. It is surely safe and I confirmed "_alignment_handler" is correct. I also fixed the "controler" I found in the same hunk in arch/openrisc/kernel/head.S. Link: http://lkml.kernel.org/r/1481573103-11329-8-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* openrisc: entry: Fix delay slot detectionStafford Horne2017-02-251-2/+2
| | | | | | | | | | | | | Use execption SR stored in pt_regs for detection, the current SR is not correct as the handler is running after return from exception. Also, The code that checks for a delay slot uses a flag bitmask and then wants to check if the result is not zero. The test it implemented was wrong. Correct it by changing the test to check result against non zero. Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: entry: Whitespace and comment cleanupsStafford Horne2017-02-251-20/+18
| | | | | | | | | | | | Cleanups to whitespace and add some comments. Reading through the delay slot logic I noticed some things: - Delay slot instructions were not indented - Some comments are not lined up - Use tabs and spaces consistent with other code No functional change Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: add l.lwa/l.swa emulationStefan Kristiansson2017-02-061-2/+20
| | | | | | | | | | | This adds an emulation layer for implementations that lack the l.lwa and l.swa instructions. It handles these instructions both in kernel space and user space. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: Added delay slot pc adjust logic] Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: include l.swa in check for write data pagefaultStefan Kristiansson2016-12-121-1/+1
| | | | | | | | | | | | | | During page fault handling we check the last instruction to understand if the fault was for a read or for a write. By default we fall back to read. New instructions were added to the openrisc 1.1 spec for an atomic load/store pair (l.lwa/l.swa). This patch adds the opcode for l.swa (0x33) allowing it to be treated as a write operation. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: expanded a bit on the comment] Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: restore all regs on rt_sigreturnJonas Bonn2016-12-121-1/+9
| | | | | | | | | | | | | | | | | | | | Fix signal handling for when signals are handled as the result of timers or exceptions, previous code assumed syscalls. This was noticeable with X crashing where it uses SIGALRM. This patch restores all regs before returning to userspace via _resume_userspace instead of via syscall return path. The rt_sigreturn syscall is more like a context switch than a function call; it entails a return from one context (the signal handler) to another (the process in question). For a context switch like this there are effectively no call-saved regs that remain constant across the transition. Reported-by: Sebastian Macke <sebastian@macke.de> Signed-off-by: Jonas Bonn <jonas@southpole.se> Tested-by: Guenter Roeck <linux@roeck-us.net> [shorne@gmail.com: Updated comment better reflect change and issue] Signed-off-by: Stafford Horne <shorne@gmail.com>
* openrisc: Rework signal handlingJonas Bonn2014-01-091-26/+33
| | | | | | | | | | | | | | | | | | | The mainline signal handling code for OpenRISC has been buggy since day one with respect to syscall restart. This patch significantly reworks the signal handling code: i) Move the "work pending" loop to C code (borrowed from ARM arch) ii) Allow a tracer to muck about with the IP and skip syscall restart in that case (again, borrowed from ARM) iii) Make signal handling WRT syscall restart actually work v) Make the signal handling code look more like that of other architectures so that it's easier for others to follow Reported-by: Anders Nystrom <anders@southpole.se> Signed-off-by: Jonas Bonn <jonas@southpole.se>
* Merge branch 'for-upstream' of git://openrisc.net/jonas/linuxLinus Torvalds2013-02-261-3/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull OpenRISC updates from Jonas Bonn: "An equal number of bug fixes and trivial cleanups; no new features. - Two patches to fix errors thrown by the updated toolchain. - Three other bug fixes. - Four trivial cleanups." * 'for-upstream' of git://openrisc.net/jonas/linux: openrisc: add missing header inclusion openrisc: really pass correct arg to schedule_tail Add bitops include needed for ext2 filesystem openrisc: update DTLB-miss handler last openrisc: fix up vmalloc page table loading openrisc idle: delete pm_idle openrisc: remove CONFIG_SYMBOL_PREFIX openrisc: avoid using function parameter regs in reset vector openrisc: remove unused current_regs
| * openrisc: really pass correct arg to schedule_tailJonas Bonn2013-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | Commit 287ad220cd8b5a9d29f71c78f6e4051093f051fc tried to set up the argument to schedule_tail, but ended up using TI_STACK which isn't a defined symbol. Sadly, the old openrisc compiler silently ignores this fact and it was first discovered now when building with an updated toolchain. Reported-by: Christian Svensson <blue@cmd.nu> Signed-off-by: Jonas Bonn <jonas@southpole.se>
| * openrisc: fix up vmalloc page table loadingJonas Bonn2013-02-141-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vmalloc'ed pages are faulted into a process' page tables on demand. In order to facilitate this, do_page_fault needs to know whether it was called via a page fault exception or a TLB-miss exception. This patch adds a wrapper around the _x_page_fault_handler entry points that the TLB-miss exceptions can call into in order to have the relevant parameter set to satisfy do_page_fault. This fixes a bug and is "good enough" for now. That said, this whole handling of vmalloc needs to be audited for correctness at some point. Signed-off-by: Jonas Bonn <jonas@southpole.se>
* | openrisc: switch to generic sigaltstackAl Viro2013-02-031-4/+0
|/ | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* openrisc: switch to use of generic fork and cloneAl Viro2012-11-281-6/+6
| | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* openrisc: use generic sys_execveJonas Bonn2012-10-191-4/+0
| | | | Signed-off-by: Jonas Bonn <jonas@southpole.se>
* openrisc: use generic kernel_thread/kernel_execveJonas Bonn2012-10-191-20/+10
| | | | Signed-off-by: Jonas Bonn <jonas@southpole.se>
* openrisc: pass correct arg to schedule_tailJonas Bonn2012-10-191-2/+7
| | | | | | | | schedule_tail() requires that the 'prev' task be passed as an argument to it. This arg is set in _switch, just before 'returning' to one of the ret_* functions where schedule_tail is invoked. Signed-off-by: Jonas Bonn <jonas@southpole.se>
* openrisc: use scratch regs in atomic syscallJonas Bonn2012-05-081-4/+4
| | | | | | | | | | | | | The function sys_or1k_atomic was using call-saved registers without restoring their value before returning. This is a faux pas: either we need to restore their values or use scratch regs; the latter is less code so that's the route this patch takes. Thanks to David Hennerström for doing most of the heavy-lifting in tracking this one down. Reported-by: Davd Hennerström <david.hennerstrom@aacmicrotec.com> Signed-off-by: Jonas Bonn <jonas@southpole.se>
* openrisc: sanitize use of orig_gpr11Jonas Bonn2012-03-061-8/+8
| | | | | | | | | | The pt_regs struct had both a 'syscallno' field and an 'orig_gpr11' field and it wasn't really clear how these were supposed to be used. This patch removes the syscallno field altogether and makes orig_gpr11 work more like other architectures: keep track of syscall number in progress or hold -1 for non-syscall exceptions. Signed-off-by: Jonas Bonn <jonas@southpole.se>
* OpenRISC: Boot codeJonas Bonn2011-07-221-0/+1128
Architecture code and early setup routines for booting Linux. Signed-off-by: Jonas Bonn <jonas@southpole.se> Reviewed-by: Arnd Bergmann <arnd@arndb.de>