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* powerpc: Use correct sequence for putting CPU into nap modePaul Mackerras2006-04-181-1/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | We weren't using the recommended sequence for putting the CPU into nap mode. When I changed the idle loop, for some reason 7447A cpus started hanging when we put them into nap mode. Changing to the recommended sequence fixes that. The complexity here is that the recommended sequence is a loop that keeps putting the cpu back into nap mode. Clearly we need some way to break out of the loop when an interrupt (external interrupt, decrementer, performance monitor) occurs. Here we use a bit in the thread_info struct to indicate that we need this, and the exception entry code notices this and arranges for the exception to return to the value in the link register, thus breaking out of the loop. We use a new `local_flags' field in the thread_info which we can alter without needing to use an atomic update sequence. The PPC970 has the same recommended sequence, so we do the same thing there too. This also fixes a bug in the kernel stack overflow handling code on 32-bit, since it was causing a value that we needed in a register to get trashed. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Allow non zero boot cpuidsAnton Blanchard2006-03-271-15/+11
| | | | | | | | | | | | | | | | | We currently have a hack to flip the boot cpu and its secondary thread to logical cpuid 0 and 1. This means the logical - physical mapping will differ depending on which cpu is boot cpu. This is most apparent on kexec, where we might kexec on any cpu and therefore change the mapping from boot to boot. The patch below does a first pass early on to work out the logical cpuid of the boot thread. We then fix up some paca structures to match. Ive also removed the boot_cpuid_phys variable for ppc64, to be consistent we use get_hard_smp_processor_id(boot_cpuid) everywhere. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] correct the comment about stackpointer alignment in __boot_from_promOlaf Hering2006-03-271-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address of variable val in prom_init_stdout is passed to prom_getprop. prom_getprop casts the pointer to u32 and passes it to call_prom in the hope that OpenFirmware stores something there. But the pointer is truncated in the lower bits and the expected value is stored somewhere else. In my testing I had a stackpointer of 0x0023e6b4. val was at offset 120, wich has address 0x0023e72c. But the value passed to OF was 0x0023e728. c00000000040b710: 3b 01 00 78 addi r24,r1,120 ... c00000000040b754: 57 08 00 38 rlwinm r8,r24,0,0,28 ... c00000000040b784: 80 01 00 78 lwz r0,120(r1) ... c00000000040b798: 90 1b 00 0c stw r0,12(r27) ... The stackpointer came from 32bit code. The chain was yaboot -> zImage -> vmlinux PowerMac OpenFirmware does appearently not handle the ELF sections correctly. If yaboot was compiled in /usr/src/packages/BUILD/lilo-10.1.1/yaboot, then the stackpointer is unaligned. But the stackpointer is correct if yaboot is compiled in /tmp/yaboot. This bug triggered since 2.6.15, now prom_getprop is an inline function. gcc clears the lower bits, instead of just clearing the upper 32 bits. Signed-off-by: Olaf Hering <olh@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge ../linux-2.6Paul Mackerras2006-03-091-0/+3
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| * ppc64: make sure to align stack pointer to 16 bytes at bootLinus Torvalds2006-03-041-0/+3
| | | | | | | | | | | | | | | | | | yaboot is scrogged and calls us with an invalid stack alignment, it seems. Thanks to David Woodhouse to pointing me to the problem. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | powerpc: Implement accurate task and CPU time accountingPaul Mackerras2006-02-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements accurate task and cpu time accounting for 64-bit powerpc kernels. Instead of accounting a whole jiffy of time to a task on a timer interrupt because that task happened to be running at the time, we now account time in units of timebase ticks according to the actual time spent by the task in user mode and kernel mode. We also count the time spent processing hardware and software interrupts accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If that is not set, we do tick-based approximate accounting as before. To get this accurate information, we read either the PURR (processor utilization of resources register) on POWER5 machines, or the timebase on other machines on * each entry to the kernel from usermode * each exit to usermode * transitions between process context, hard irq context and soft irq context in kernel mode * context switches. On POWER5 systems with shared-processor logical partitioning we also read both the PURR and the timebase at each timer interrupt and context switch in order to determine how much time has been taken by the hypervisor to run other partitions ("steal" time). Unfortunately, since we need values of the PURR on both threads at the same time to accurately calculate the steal time, and since we can only calculate steal time on a per-core basis, the apportioning of the steal time between idle time (time which we ceded to the hypervisor in the idle loop) and actual stolen time is somewhat approximate at the moment. This is all based quite heavily on what s390 does, and it uses the generic interfaces that were added by the s390 developers, i.e. account_system_time(), account_user_time(), etc. This patch doesn't add any new interfaces between the kernel and userspace, and doesn't change the units in which time is reported to userspace by things such as /proc/stat, /proc/<pid>/stat, getrusage(), times(), etc. Internally the various task and cpu times are stored in timebase units, but they are converted to USER_HZ units (1/100th of a second) when reported to userspace. Some precision is therefore lost but there should not be any accumulating error, since the internal accumulation is at full precision. Signed-off-by: Paul Mackerras <paulus@samba.org>
* | Merge ../powerpc-mergePaul Mackerras2006-02-241-105/+6
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| * [PATCH] powerpc64: remove broken/bitrotted HMT supportAnton Blanchard2006-02-241-93/+4
| | | | | | | | | | | | | | | | | | | | | | HMT support is currently broken and needs to be reworked to play nicely with the SMT scheduler. Remove the bit rotten bits for the time being. I also updated an incorrect comment, we enter __secondary_hold with the physical cpu id in r3. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: Fix runlatch performance issuesAnton Blanchard2006-02-241-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The runlatch SPR can take a lot of time to write. My original runlatch code would set it on every exception entry even though most of the time this was not required. It would also continually set it in the idle loop, which is an issue on an SMT capable processor. Now we cache the runlatch value in a threadinfo bit, and only check for it in decrementer and hardware interrupt exceptions as well as the idle loop. Boot on POWER3, POWER5 and iseries, and compile tested on pmac32. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: Make UP -> SMP kexec work againMichael Ellerman2006-02-201-3/+1
| | | | | | | | | | | | | | | | | | For UP to SMP kexec to work we need to jump into pSeries_secondary_smp_init event on a UP + KEXEC kernel. The secondary cpus will not find their hw_cpu_id in the paca and so they'll jump into kexec_wait, ready for a kexec. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [PATCH] powerpc: trivial: modify comments to refer to new location of filesJon Mason2006-02-101-2/+0
|/ | | | | | | | | This patch removes all self references and fixes references to files in the now defunct arch/ppc64 tree. I think this accomplises everything wanted, though there might be a few references I missed. Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Don't use toc in decrementer_iSeries_maskedMichael Ellerman2006-02-071-2/+3
| | | | | | | | | | | Since 404849bbd2bfd62e05b36f4753f6e1af6050a824 we've been using LOAD_REG_ADDRBASE, which uses the toc pointer, in decrementer_iSeries_masked. This can explode if we take the decrementer interrupt while we're in a module, because the toc pointer in r2 will be the module's toc pointer. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Remove lppaca structure from the PACADavid Gibson2006-01-131-9/+16
| | | | | | | | | | | | | | | | | | At present the lppaca - the structure shared with the iSeries hypervisor and phyp - is contained within the PACA, our own low-level per-cpu structure. This doesn't have to be so, the patch below removes it, making a separate array of lppaca structures. This saves approximately 500*NR_CPUS bytes of image size and kernel memory, because we don't need aligning gap between the Linux and hypervisor portions of every PACA. On the other hand it means an extra level of dereference in many accesses to the lppaca. The patch also gets rid of several places where we assign the paca address to a local variable for no particular reason. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Cleanup LOADADDR etc. asm macrosDavid Gibson2006-01-131-43/+44
| | | | | | | | | | | | | | | | | | This patch consolidates the variety of macros used for loading 32 or 64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*). The idea is to make the set of macros consistent across 32 and 64 bit and to make it more obvious which is the appropriate one to use in a given situation. The new macros and their semantics are described in the comments in ppc_asm.h. In the process, we change several places that were unnecessarily using immediate loads on ppc64 to use the GOT/TOC. Likewise we cleanup a couple of places where we were clumsily subtracting PAGE_OFFSET with asm instructions to use assemble-time arithmetic or the toreal() macro instead. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: unbreak iSeries compilation againPaul Mackerras2006-01-091-0/+4
| | | | | | | We don't set CONFIG_PPC_MULTIPLATFORM on iSeries (yet). Avoid compiling in the prom_init stuff on iSeries. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Remove old comment in head.SAnton Blanchard2006-01-091-1/+1
| | | | | | | Remove a comment in head.S which is no longer relevant. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Fixups for kernel linked at 32 MBMichael Ellerman2006-01-091-6/+24
| | | | | | | | | | | | | | | | | | | | | | There's a few places where we need to fix things up for the kernel to work if it's linked at 32MB: - platforms/powermac/smp.c To start secondary cpus on pmac we patch the reset vector, which is fine. Except if we're above 32MB we don't have enough bits for an absolute branch, it needs to relative. - kernel/head_64.s - A few branches in the cpu hold code need to load the full target address and do a bctr. - after_prom_start needs to load PHYSICAL_START as the dest address, not 0. - The exception prolog needs to load the low word of the target adddress, not just the low halfword. - Fixup handling of the initial stab address. - kernel/setup_64.c smp_release_cpus() needs to write 1 to the spinloop flag near 0, not 32 MB. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Create a trampoline for the fwnmi vectorsMichael Ellerman2006-01-091-0/+2
| | | | | | | | | The fwnmi vectors can be anywhere < 32 MB, so we need to use a trampoline for them. The kdump kernel will register the trampoline addresses, which will then jump up to the real code above 32 MB. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Fix typo in head_64.SPaul Mackerras2006-01-091-1/+1
| | | | Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Remove some unneeded fields from the pacaDavid Gibson2006-01-091-1/+2
| | | | | | | | | | | | | | | | | | | This patch removes several unnecessary fields from the paca: - next_jiffy_update_tb was simply unused. Remove trivially. - The exdsi exception save area was not used. There were plans to use it, but they never seem to have gone anywhere. If they ever do, we can put it back. Remove from the paca, and from asm-offsets.c - The default_decr field was used from asm, but was only ever assigned the value of tb_ticks_per_jiffy. Just access tb_ticks_per_jiffy from asm directly instead. Built and booted on POWER5 LPAR and iSeries RS64. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: merge code values for identifying platformsPaul Mackerras2005-11-101-83/+8
| | | | | | | | | | | | This patch merges platform codes. systemcfg->platform is no longer used, systemcfg use in general is deprecated as much as possible (and renamed _systemcfg before it gets completely moved elsewhere in a future patch), _machine is now used on ppc64 along as ppc32. Platform codes aren't gone yet but we are getting a step closer. A bunch of asm code in head[_64].S is also turned into C code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] ppc64: support 64k pagesBenjamin Herrenschmidt2005-11-061-77/+223
| | | | | | | | | | | | | | | Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel base page size to 64K. The resulting kernel still boots on any hardware. On current machines with 4K pages support only, the kernel will maintain 16 "subpages" for each 64K page transparently. Note that while real 64K capable HW has been tested, the current patch will not enable it yet as such hardware is not released yet, and I'm still verifying with the firmware architects the proper to get the information from the newer hypervisors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* powerpc: Implement smp_release_cpus() in C not asmMichael Ellerman2005-11-041-18/+0
| | | | | | | | | | There's no reason for smp_release_cpus() to be asm, and most people can make more sense of C code. Add an extern declaration to smp.h and remove the custom one in machine_kexec.c Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* merge filename and modify references to iseries/lpar_map.hKelly Daly2005-11-021-1/+1
| | | | Signed-off-by: Kelly Daly <kelly@au.ibm.com>
* powerpc: Merge in 64-bit powermac support.Paul Mackerras2005-10-221-14/+11
| | | | | | | | | | This brings in a lot of changes from arch/ppc64/kernel/pmac_*.c to arch/powerpc/platforms/powermac/*.c and makes various minor tweaks elsewhere. On the powermac we now initialize ppc_md by copying the whole pmac_md structure into it, which required some changes in the ordering of initializations of individual fields of it. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Merge thread_info.hDavid Gibson2005-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge ppc32 and ppc64 versions of thread_info.h. They were pretty similar already, the chief changes are: - Instead of inline asm to implement current_thread_info(), which needs to be different for ppc32 and ppc64, we use C with an asm("r1") register variable. gcc turns it into the same asm as we used to have for both platforms. - We replace ppc32's 'local_flags' with the ppc64 'syscall_noerror' field. The noerror flag was in fact the only thing in the local_flags field anyway, so the ppc64 approach is simpler, and means we only need a load-immediate/store instead of load/mask/store when clearing the flag. - In readiness for 64k pages, when THREAD_SIZE will be less than a page, ppc64 used kmalloc() rather than get_free_pages() to allocate the kernel stack. With this patch we do the same for ppc32, since there's no strong reason not to. - For ppc64, we no longer export THREAD_SHIFT and THREAD_SIZE via asm-offsets, thread_info.h can now be safely included in asm, as on ppc32. Built and booted on G4 Powerbook (ARCH=ppc and ARCH=powerpc) and Power5 (ARCH=ppc64 and ARCH=powerpc). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Get 64-bit configs to compile with ARCH=powerpcPaul Mackerras2005-10-101-0/+1
| | | | | | | | This is a bunch of mostly small fixes that are needed to get ARCH=powerpc to compile for 64-bit. This adds setup_64.c from arch/ppc64/kernel/setup.c and locks.c from arch/ppc64/lib/locks.c. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Fix bug caused by negation of 64-bit reloc_offset valuePaul Mackerras2005-10-101-10/+10
| | | | | | | | Although both ppc32 and ppc64 have a reloc_offset function, the ppc64 one produced the opposite sign to the ppc32 one. This standardizes on the ppc32 sign and fixes the merged 64-bit code to account for that. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Use SPRN_xxx rather than xxx for SPR numbersPaul Mackerras2005-10-101-98/+98
| | | | | | | | | | This changes symbols like HID0, SPRG3, SRR0, SRR1 etc. that refer to special purpose registers to SPRN_HID0, SPRN_SPRG3, etc. Using the SPRN_ symbols clutters the namespace less, and the forthcoming merge of asm/processor.h and asm/reg.h is going to remove the non-SPRN_ versions. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Define 32/64 bit asm macros and use them in fpu.SPaul Mackerras2005-10-061-57/+1
| | | | | | | | These macros help in writing assembly code that works for both ppc32 and ppc64. With this we now have a common fpu.S. This takes out load_up_fpu from head_64.S. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: more cleanup of powerpc/kernelStephen Rothwell2005-09-301-3/+6
| | | | | | | Update head_64.S from arch/ppc64 Remove arc/ppc/kernel/fpu.S Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* powerpc: Merge enough to start building in arch/powerpc.Paul Mackerras2005-09-261-0/+2011
This creates the directory structure under arch/powerpc and a bunch of Kconfig files. It does a first-cut merge of arch/powerpc/mm, arch/powerpc/lib and arch/powerpc/platforms/powermac. This is enough to build a 32-bit powermac kernel with ARCH=powerpc. For now we are getting some unmerged files from arch/ppc/kernel and arch/ppc/syslib, or arch/ppc64/kernel. This makes some minor changes to files in those directories and files outside arch/powerpc. The boot directory is still not merged. That's going to be interesting. Signed-off-by: Paul Mackerras <paulus@samba.org>