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* [POWERPC] Make xmon disassembly optionalMichael Ellerman2006-12-046-10/+49
| | | | | | | | | | | | | | | | | | While adding spu disassembly support it struck me that we're actually carrying quite a lot of code around, just to do disassembly in the case of a crash. While on large systems it's not an issue, on smaller ones it might be nice to have xmon - but without the weight of the disassembly support. For a Cell build this saves ~230KB (!), and for pSeries ~195KB. We still support the 'di' and 'sdi' commands, however they just dump the instruction in hex. Move the definitions into a header to clean xmon.c just a tiny bit. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Add spu disassembly to xmonMichael Ellerman2006-12-042-8/+28
| | | | | | | | This patch adds a "sdi" command to xmon, to disassemble the contents of an spu's local store. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Import spu disassembly code into xmonMichael Ellerman2006-12-044-0/+829
| | | | | | | | | | | | | | | This patch imports and munges the spu disassembly code from binutils. All files originated from version 1.1 in binutils cvs. * spu.h, spu-insns.h and spu-opc.c are unchanged except for pathnames. * spu-dis.c has been edited heavily: * use printf instead of info->fprintf_func and similar. * pass the instruction in rather than reading it. * we have no equivalent to symbol_at_address_func, so we just assume there is never a symbol at the address given. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Prepare for spu disassembly in xmonMichael Ellerman2006-12-042-6/+15
| | | | | | | | | | | | | | | | In order to do disassembly of spu binaries in xmon, we need to abstract the disassembly function from ppc_inst_dump. We do this by making the actual disassembly function a function pointer that we pass to ppc_inst_dump(). To save updating all the callers, we turn ppc_inst_dump() into generic_inst_dump() and make ppc_inst_dump() a wrapper which always uses print_insn_powerpc(). Currently we pass the dialect into print_insn_powerpc(), but we always pass 0 - so just make it a local. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Add a sd command (spu dump) to xmon to dump spu local storeMichael Ellerman2006-12-041-5/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a command to xmon to dump the memory of a spu's local store. This mimics the 'd' command which dumps regular memory, but does a little hand holding by taking the user supplied address and finding that offset in the local store for the specified spu. This makes it easy for example to look at what was executing on a spu: 1:mon> ss ... Stopped spu 04 (was running) ... 1:mon> sf 4 Dumping spu fields at address c0000000019e0a00: ... problem->spu_npc_RW = 0x228 ... 1:mon> sd 4 0x228 d000080080318228 01a00c021cffc408 4020007f217ff488 |........@ ..!...| Aha, 01a00c02, which is of course rdch $2,$ch24 ! -- Updated to only do the setjmp goo around the spu access, and not around prdump because it does its own (via mread). Also the num variable is now common between sf and sd, so you don't have to keep typing the spu number in if you're repeating commands on the same spu. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Show state of spus as theyre stopped in Cell xmon helperMichael Ellerman2006-12-041-1/+4
| | | | | | | | | | After stopping spus in xmon I often find myself trawling through the field dumps to find out which spus were running. The spu stopping code actually knows what's running, so let's print it out to save the user some futzing. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] Fix sparse warning in xmon Cell codeMichael Ellerman2006-12-041-7/+15
| | | | | | | | | | | | My patch to add spu helpers to xmon (a898497088f46252e6750405504064e2dce53117) introduced a few sparse warnings, because I was dereferencing an __iomem pointer. I think the best way to handle it is to actually use the appropriate in_beXX functions. Need to rejigger the DUMP macro a little to accomodate that. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] cell: hard disable interrupts in power_save()Benjamin Herrenschmidt2006-12-041-0/+9
| | | | | | | | | | | | | | | | | | With soft-disabled interrupts in power_save, we can still get external exceptions on Cell, even if we are in pause(0) a.k.a. sleep state. When the CPU really wakes up through the 0x100 (system reset) vector, while we have already started processing the 0x500 (external) exception, we get a panic in unrecoverable_exception() because of the lost state. This occurred in Systemsim for Cell, but as far as I can see, it can theoretically occur on any machine that uses the system reset exception to get out of sleep state. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] coredump: Add SPU elf notes to coredump.Dwayne Grant McConnell2006-12-047-87/+580
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPU elf notes to the coredump. It creates a separate note for each of /regs, /fpcr, /lslr, /decr, /decr_status, /mem, /signal1, /signal1_type, /signal2, /signal2_type, /event_mask, /event_status, /mbox_info, /ibox_info, /wbox_info, /dma_info, /proxydma_info, /object-id. A new macro, ARCH_HAVE_EXTRA_NOTES, was created for architectures to specify they have extra elf core notes. A new macro, ELF_CORE_EXTRA_NOTES_SIZE, was created so the size of the additional notes could be calculated and added to the notes phdr entry. A new macro, ELF_CORE_WRITE_EXTRA_NOTES, was created so the new notes would be written after the existing notes. The SPU coredump code resides in spufs. Stub functions are provided in the kernel which are hooked into the spufs code which does the actual work via register_arch_coredump_calls(). A new set of __spufs_<file>_read/get() functions was provided to allow the coredump code to read from the spufs files without having to lock the SPU context for each file read from. Cc: <linux-arch@vger.kernel.org> Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [POWERPC] powerpc: Workaround for of_platform without "reg" nor "dcr-reg"Benjamin Herrenschmidt2006-12-041-2/+9
| | | | | | | | | | | | | | Devices with no "reg" nor "dcr-reg" property are given a bus_id which is the node name alone. This means that if more than one such device with the same names are present in the system, sysfs will have collisions when creating the symlinks and will fail registering the devices. This works around that problem by assigning successive numbers to such devices. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Distinguish POWER6 partition modes and tell userspacePaul Mackerras2006-12-046-44/+118
| | | | | | | | | | | | | | | | | This adds code to look at the properties firmware puts in the device tree to determine what compatibility mode the partition is in on POWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM entries appropriately. Specifically, we look at the cpu-version property in the cpu node(s). If that contains a "logical" PVR value (of the form 0x0f00000x), we call identify_cpu again with this PVR value. A value of 0x0f000001 indicates the partition is in POWER5+ compatibility mode, and a value of 0x0f000002 indicates "POWER6 architected" mode, with various extensions disabled. We also look for various other properties: ibm,dfp, ibm,purr and ibm,spurr. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add oprofile supportMaynard Johnson2006-12-047-5/+776
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PPU event-based and cycle-based profiling support to Oprofile for Cell. Oprofile is expected to collect data on all CPUs simultaneously. However, there is one set of performance counters per node. There are two hardware threads or virtual CPUs on each node. Hence, OProfile must multiplex in time the performance counter collection on the two virtual CPUs. The multiplexing of the performance counters is done by a virtual counter routine. Initially, the counters are configured to collect data on the even CPUs in the system, one CPU per node. In order to capture the PC for the virtual CPU when the performance counter interrupt occurs (the specified number of events between samples has occurred), the even processors are configured to handle the performance counter interrupts for their node. The virtual counter routine is called via a kernel timer after the virtual sample time. The routine stops the counters, saves the current counts, loads the last counts for the other virtual CPU on the node, sets interrupts to be handled by the other virtual CPU and restarts the counters, the virtual timer routine is scheduled to run again. The virtual sample time is kept relatively small to make sure sampling occurs on both CPUs on the node with a relatively small granularity. Whenever the counters overflow, the performance counter interrupt is called to collect the PC for the CPU where data is being collected. The oprofile driver relies on a firmware RTAS call to setup the debug bus to route the desired signals to the performance counter hardware to be counted. The RTAS call must set the routing registers appropriately in each of the islands to pass the signals down the debug bus as well as routing the signals from a particular island onto the bus. There is a second firmware RTAS call to reset the debug bus to the non pass thru state when the counters are not in use. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add routines for managing PMU interruptsKevin Corry2006-12-044-0/+96
| | | | | | | | | | | | | | | | | | | The following routines are added to arch/powerpc/platforms/cell/pmu.c: cbe_clear_pm_interrupts() cbe_enable_pm_interrupts() cbe_disable_pm_interrupts() cbe_query_pm_interrupts() cbe_pm_irq() cbe_init_pm_irq() This also adds a routine in arch/powerpc/platforms/cell/interrupt.c and some macros in cbe_regs.h to manipulate the IIC_IR register: iic_set_interrupt_routing() Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.hKevin Corry2006-12-043-87/+2
| | | | | | | | | | | | | Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: PMU register macrosKevin Corry2006-12-041-1/+22
| | | | | | | | | More macros for manipulating bits in the Cell PMU control registers. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] cell: Add symbol exports for oprofileArnd Bergmann2006-12-041-0/+13
| | | | | | | | | Add symbol-exports for the new routines in arch/powerpc/platforms/cell/pmu.c. They are needed for Oprofile, which can be built as a module. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Load isolation kernel from spu_runJeremy Kerr2006-12-044-148/+113
| | | | | | | | | | | | | | | | | | | | In order to fit with the "don't-run-spus-outside-of-spu_run" model, this patch starts the isolated-mode loader in spu_run, rather than spu_create. If spu_run is passed an isolated-mode context that isn't in isolated mode state, it will run the loader. This fixes potential races with the isolated SPE app doing a stop-and-signal before the PPE has called spu_run: bugzilla #29111. Also (in conjunction with a mambo patch), this addresses #28565, as we always set the runcntrl register when entering spu_run. It is up to libspe to ensure that isolated-mode apps are cleaned up after running to completion - ie, put the app through the "ISOLATE EXIT" state (see Ch11 of the CBEA). Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Add runcntrl read accessorsJeremy Kerr2006-12-043-0/+13
| | | | | | | | | | | | | | This change adds a read accessor for the SPE problem-state run control register. This is required for for applying (userspace) changes made to the run control register while the SPE is stopped - simply asserting the master run control bit is not sufficient. My next patch for isolated-mode setup requires this. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Use SPU master control to prevent wild SPU executionArnd Bergmann2006-12-046-36/+79
| | | | | | | | | | When the user changes the runcontrol register, an SPU might be running without a process being attached to it and waiting for events. In order to prevent this, make sure we always disable the priv1 master control when we're not inside of spu_run. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Fix return value of spufs_mfc_writeMasato Noguchi2006-12-041-0/+1
| | | | | | | | | This patch changes spufs_mfc_write() to return correct size instead of 0. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Always map local store non-guardedArnd Bergmann2006-12-041-2/+2
| | | | | | | | | | | When fixing spufs to map the 'mem' file backing store cacheable, I incorrectly set the physical mapping to use both cache-inhibited and guarded mapping, which resulted in a serious performance degradation. Debugged-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Avoid user-triggered oops in ptraceChristoph Hellwig2006-12-041-8/+7
| | | | | | | | | | | | | | | | | | | | When one of the spufs files is mapped into a process address space, regular users can use ptrace to attempt accessing them with access_process_vm(). With the way that the mappings currently work, this likely causes an oops. Setting the vm_flags to VM_IO makes sure that ptrace can not access them but returns an error code. This is not the perfect solution in case of the local store mapping, but it fixes the oops in a well-defined way. Also remove leftover VM_RESERVED flags in spufs. The VM_RESERVED flag is on it's way out and not checked by the memory managment code anymore. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Christoph Hellwig <chellwig@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Fix missing stop-and-signalMasato Noguchi2006-12-041-10/+18
| | | | | | | | | | | | | | | When there is pending signals, current spufs_run_spu() always returns -ERESTARTSYS and it is called again automatically. But, if spe already stopped by stop-and-signal or halt instruction, returning -ERESTARTSYS makes stop-and-signal/halt lost and spu run over the end-point. For your convenience, I attached a sample code to restage this bug. If there is no bug, printed NPC will be 0x4000. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Return correct event for data storage interruptArnd Bergmann2006-12-042-1/+2
| | | | | | | | | When we attempt an MFC DMA to an unmapped address, the event returned from spu_run should be SPE_EVENT_SPE_DATA_STORAGE, not SPE_EVENT_INVALID_DMA. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Replace spu.nid with spu.nodeGeoff Levand2006-12-041-2/+2
| | | | | | | | | Replace the use of the platform specific variable spu.nid with the platform independednt variable spu.node. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Read from signal files only if data is thereDwayne Grant McConnell2006-12-042-20/+22
| | | | | | | | | | | | | | | | | | | | We need to check the channel count of the signal notification registers before reading them, because it can be undefined when the count is zero. In order to read count and data atomically, we read from the saved context. This patch uses spu_acquire_saved() to force a context save before a /signal1 or /signal2 read. Because of this it is no longer necessary to have backing_ops and hw_ops versions of this function so they have been removed. Regular applications should not rely on reading this register to be fast, as it's conceptually a write-only file from the PPE perspective. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Implement /mbox_info, /ibox_info, and /wbox_info.Dwayne Grant McConnell2006-12-041-0/+90
| | | | | | | | | | | | | | | | | | | | This patch implements read only access to /mbox_info - SPU Write Outbound Mailbox /ibox_info - SPU Write Outbound Interrupt Mailbox /wbox_info - SPU Read Inbound Mailbox These files are used by gdb in order to look into the current mailbox queues without changing the contents at the same time. They are not meant for general programming use, since the access requires a context save and is therefore rather slow. It would be good to complement this patch with one that adds write support as well. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Remove /spu_tag_mask fileDwayne Grant McConnell2006-12-041-23/+0
| | | | | | | | | | | | | This patch removes the /spu_tag_mask file from spufs. The data provided by this file is also available from the /dma_info file in the dma_info_mask of the spu_dma_info struct. The file was intended to be used by gdb, but that never used it, and now it has been replaced with the more verbose dma_info file. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Add /lslr, /dma_info and /proxydma filesDwayne Grant McConnell2006-12-043-6/+137
| | | | | | | | | | | | | The /lslr file gives read access to the SPU_LSLR register in hex; 0x3fff for example The /dma_info file provides read access to the SPU Command Queue in a binary format. The /proxydma_info files provides read access access to the Proxy Command Queue in a binary format. The spu_info.h file provides data structures for interpreting the binary format of /dma_info and /proxydma_info. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Change %llx to 0x%llx.Dwayne Grant McConnell2006-12-041-6/+7
| | | | | | | | | | | | | | | | | | This patches changes /npc, /decr, /decr_status, /spu_tag_mask, /event_mask, /event_status, and /srr0 files to provide output according to the format string "0x%llx" instead of "%llx". Before this patch some files used "0x%llx" and other used "%llx" which is inconsistent and potentially confusing. A user might assume "%llx" numbers were decimal if they happened to not contain any a-f digits. This change will break any code cannot tolerate a leading 0x in the file contents. The only known users of these files are the libspe but there might also be some scripts which access these files. This risk is deemed acceptable for future consistency. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] setup_kcore(): Fix incorrect function name in panic() call.Geert Uytterhoeven2006-12-041-1/+1
| | | | | Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Don't compile arch/powerpc mpc52xx_pic driver for ARCH=ppcGrant Likely2006-12-041-1/+1
| | | | | | | arch/powerpc/sysdev/mpc52xx_pic.c breaks the ppc build Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix wraparound problem in smp-tbsync on 32-bitAdrian Cox2006-12-041-1/+1
| | | | | | | | | | The patch below fixes an arithmetic wrap-around issue on 32bit machines using smp-tbsync. Without this patch a timebase value over 0x000000007fffffff will hang the boot process while bringing up secondary CPUs. Signed-off-by: Adrian Cox <adrian@humboldt.co.uk> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Cleanup zImage handling of kernel entry with flat device treeDavid Gibson2006-12-043-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes 2 changes to clean up the flat device tree handling logic in the zImage wrapper. First, there were two callbacks from the dt_ops structure used for producing a final flat tree to pass to the kerne: dt_ops.ft_pack() which packed the flat tree (possibly a no-op) and dt_ops.ft_addr() which retreived the address of the final blob. Since they were only ever called together, this patch combines the two into a single new callback, dt_ops.finalize(). This new callback does whatever platform-dependent things are necessary to produce a final flat device tree blob, and returns the blob's addres. Second, the current logic calls the kernel with a flat device tree if one is build into the zImage wrapper, otherwise it boots the kernel with a PROM pointer, expecting the kernel to copy the OF device tree itself. This approach precludes the possibility of the platform wrapper code building a flat device tree from whatever platform-specific information firmware provides. Thus, this patch takes the more sensible approach of invoking the kernel with a flat tree if the dt_ops.finalize callback provides one (by whatever means). So, the dt_ops.finalize callback can be NULL, or can be a function which returns NULL. In either case, the zImage wrapper logic assumes that this is a platform with OF and invokes the kernel accordingly. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Small clarification of initrd handlingDavid Gibson2006-12-041-7/+14
| | | | | | | | | | | | | | | | | This patch makes the handling of the initrd (or initramfs) in the zImage wrapper a little easier to follow. Instead of passing the initrd addresses out from prep_kernel() via the cryptic a1 and a2 parameters, use the global struct add_range, 'initrd'. prep_kernel() already passes information through the 'vmlinux' addr_range struct, so this seems like a reasonable extension. Some comments also clarify the logic with prep_kernel(): we use an initrd included in the zImage if present, otherwise we use an initrd passed in by the bootloader in the a1 and a2 parameters (yaboot, at least, uses this mechanism to pass an initrd). Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Wrap cpu_die() with CONFIG_HOTPLUG_CPULinas Vepstas2006-12-042-2/+7
| | | | | | | | | | Per email discussion, it appears that rtas_stop_self() and pSeries_mach_cpu_die() should not be compiled if CONFIG_HOTPLUG_CPU is not defined. This patch adds #ifdefs around these bits of code. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make pci_read_irq_line the default on mpc7448hpc2 boardZang Roy-r619112006-12-043-87/+93
| | | | | | | | | The following patch adds a tsi108/9 pci interrupt controller host. On mpc7448hpc2 board, pci_irq_fixup function is removed, which makes the pci_read_irq_line be the default pci irq fixup. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make soft_enabled irqs preempt safeHugh Dickins2006-12-041-5/+52
| | | | | | | | | Rewrite local_get_flags and local_irq_disable to use r13 explicitly, to avoid the risk that gcc will split get_paca()->soft_enabled into a sequence unsafe against preemption. Similar care in local_irq_restore. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix slb.c for combined buildStephen Rothwell2006-12-041-7/+6
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix xmon.c for combined buildStephen Rothwell2006-12-041-25/+27
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix time.c for combined buildStephen Rothwell2006-12-041-3/+4
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix sysfs.c for combined buildStephen Rothwell2006-12-041-6/+4
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: fix irq.c for combined buildStephen Rothwell2006-12-041-1/+2
| | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Merge 32 and 64 bits asm-powerpc/io.hBenjamin Herrenschmidt2006-12-0411-66/+113
| | | | | | | | | | | | | powerpc: Merge 32 and 64 bits asm-powerpc/io.h The rework on io.h done for the new hookable accessors made it easier, so I just finished the work and merged 32 and 64 bits io.h for arch/powerpc. arch/ppc still uses the old version in asm-ppc, there is just too much gunk in there that I really can't be bothered trying to cleanup. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Remove ioremap64 and fixup_bigphys_addrBenjamin Herrenschmidt2006-12-043-25/+1
| | | | | | | | | | | | | | | In order to suppose platforms with devices above 4Gb on 32 bits platforms with a >32 bits physical address space, we used to have a special ioremap64 along with a fixup routine fixup_bigphys_addr. This shouldn't be necessary anymore as struct resource now supports 64 bits addresses even on 32 bits archs. This patch enables that option when CONFIG_PHYS_64BIT is set and removes ioremap64 and fixup_bigphys_addr. This is a preliminary work for the upcoming merge of 32 and 64 bits io.h Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Cell iommu supportJeremy Kerr2006-12-045-472/+660
| | | | | | | | | | | | | | This patch adds full cell iommu support (and iommu disabled mode). It implements mapping/unmapping of iommu pages on demand using the standard powerpc iommu framework. It also supports running with iommu disabled for machines with less than 2GB of memory. (The default is off in that case, though it can be forced on with the kernel command line option iommu=force). Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make cell use direct DMA opsBenjamin Herrenschmidt2006-12-041-73/+6
| | | | | | | | Now that the direct DMA ops supports an offset, we use that instead of defining our own. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Make direct DMA use node local allocationsBenjamin Herrenschmidt2006-12-041-5/+9
| | | | | | | | | This patch makes dma_alloc_coherent() use node local allocation when using the direct DMA ops. The node is obtained from the new device extension. If no such extension is present, the current node is used. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add an optional offset to direct DMA on 64 bitsBenjamin Herrenschmidt2006-12-041-3/+8
| | | | | | | | | | | | This patch adds an optional global offset that can be added to DMA addresses when using the direct DMA operations. That brings it a step closer to the 32 bits direct DMA operations, and makes it useable on Cell when the MMU is disabled and we are using a spider southbridge. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Cell "Spider" MMIO workaroundsBenjamin Herrenschmidt2006-12-043-2/+349
| | | | | | | | | | | This patch implements a workaround for a Spider PCI host bridge bug where it doesn't enforce some of the PCI ordering rules unless some manual manipulation of a special register is done. In order to be fully compliant with the PCI spec, I do this on every MMIO read operation. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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