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* Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpcLinus Torvalds2007-02-08140-1372/+17742
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (116 commits) [POWERPC] Add export of vgacon_remap_base [POWERPC] Remove bogus comment about page_is_ram [POWERPC] windfarm: don't die on suspend thread signal [POWERPC] Fix comment in kernel/irq.c [POWERPC] ppc: Fix booke watchdog initialization [POWERPC] PPC: Use ARRAY_SIZE macro when appropriate [POWERPC] Use ARRAY_SIZE macro when appropriate [POWERPC] Fix ppc64's writing to struct file_operations [POWERPC] ppc: use syslog macro for the printk log level [POWERPC] ppc: cs4218_tdm remove extra brace [POWERPC] Add mpc52xx/lite5200 PCI support [POWERPC] Only use H_BULK_REMOVE if the firmware supports it [POWERPC] Fixup error handling when emulating a floating point instruction [POWERPC] Enable interrupts if we are doing fp math emulation [POWERPC] Added kprobes support to ppc32 [POWERPC] Make pSeries use the H_BULK_REMOVE hypervisor call [POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspace [POWERPC] Fix performance monitor exception [POWERPC] Compile fixes for arch/powerpc dcr code [POWERPC] Maple: use mmio nvram ...
| * [POWERPC] Add export of vgacon_remap_baseMathieu Desnoyers2007-02-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The following macro : include/asm-powerpc/vga.h:#define VGA_MAP_MEM(x,s) (x + vgacon_remap_base) is used by drivers/video/console/vgacon.c which can be compiled as a module (drivers/video/vga16fb.ko). Therefore, vgacon_remap_base should be exported. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Remove bogus comment about page_is_ramJohannes Berg2007-02-081-4/+0
| | | | | | | | | | | | | | | | | | arch/powerpc/mm/mem.c states that page_is_ram is called by the code that implements /dev/mem, which isn't true. Remove the comment. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Fix comment in kernel/irq.cJohannes Berg2007-02-081-3/+3
| | | | | | | | | | | | | | | | | | | | kernel/irq.c contains a comment that speaks of -1 and -2 as interrupt numbers, but this is actually dependent on configuration options now. Replace by NO_IRQ and NO_IRQ_ENABLED. Signed-off-by: Johannes Berg <johannes@sipsolutions.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Use ARRAY_SIZE macro when appropriateAhmed S. Darwish2007-02-083-7/+7
| | | | | | | | | | | | | | | | | | Use ARRAY_SIZE macro already defined in linux/kernel.h Signed-off-by: Ahmed S. Darwish <darwish.07@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Fix ppc64's writing to struct file_operationsStephen Rothwell2007-02-081-4/+7
| | | | | | | | | | | | | | | | | | | | In preparation for marking file_operations as const. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Arjan van de Ven <arjan@infradead.org> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Add mpc52xx/lite5200 PCI supportGrant Likely2007-02-084-1/+435
| | | | | | | | | | | | Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * Merge branch 'for_paulus' of ↵Paul Mackerras2007-02-086-41/+95
| |\ | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.21
| | * [POWERPC] Fixup error handling when emulating a floating point instructionKumar Gala2007-02-071-22/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we do full FP emulation its possible that we need to post a SIGFPE based on the results of the emulation. The previous code ignored this case completely. Additionally, the Soft_emulate_8xx case had two issues. One, we should never generate a SIGFPE since the code only does data movement. Second, we were interpreting the return codes incorrectly, it returns 0 on success, 1 on illop and -EFAULT on a data access error. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] Enable interrupts if we are doing fp math emulationKumar Gala2007-02-071-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Anytime we are emulating an instruction we are going to be doing some form of get_user() to get the instruction image to decode. Since get_user() might sleep we need to ensure we have interrupts enabled or we might see something like: Debug: sleeping function called from invalid context at arch/powerpc/kernel/traps.c:697 in_atomic():0, irqs_disabled():1 Call Trace: [D6023EB0] [C0007F84] show_stack+0x58/0x174 (unreliable) [D6023EE0] [C0022C34] __might_sleep+0xbc/0xd0 [D6023EF0] [C000D158] program_check_exception+0x1d8/0x4fc [D6023F40] [C000E744] ret_from_except_full+0x0/0x4c --- Exception: 700 at 0x102a7100 LR = 0xdb9ef04 However, we want to ensure that interrupts are disabled when handling a trap exception that might be used for a kernel breakpoint. This is why ProgramCheck is marked as EXC_XFER_STD instead of EXC_XFER_EE. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] Added kprobes support to ppc32Kumar Gala2007-02-063-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | Added kprobes to ppc32 platforms that have use single_step_exception. This excludes 4xx and anything Book-E since their debug mechanisms for single stepping are completely different. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * Merge branch 'linux-2.6'Paul Mackerras2007-02-073-2/+13
| | |\
| * | | [POWERPC] Only use H_BULK_REMOVE if the firmware supports itPaul Mackerras2007-02-082-8/+15
| |/ / | | | | | | | | | | | | | | | | | | | | | The previous patch changing pSeries to use H_BULK_REMOVE broke the JS20 blade, where the firmware doesn't support H_BULK_REMOVE. This adds a firmware check so that on machines that don't have H_BULK_REMOVE, we just use the H_REMOVE call as before. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Make pSeries use the H_BULK_REMOVE hypervisor callPaul Mackerras2007-02-071-5/+46
| | | | | | | | | | | | | | | | | | | | | | | | H_BULK_REMOVE lets us remove 4 entries from the MMU hash table with one hypervisor call. This uses it in pSeries_lpar_hpte_invalidate so we can tear down mappings with fewer hypervisor calls. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Clear RI bit in MSR before restoring r13 when returning to userspacePaul Mackerras2007-02-071-26/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some instruction tracing tools use the RI (recoverable interrupt) bit in the MSR to indicate when it's safe to single-step. Currently we clear RI after restoring r13 when returning to userspace. However, if we single-step past the point where r13 is restored, we'll corrupt r13 in the exception entry code and not restore it. This moves the clearing of RI to just before r13 is restored so this doesn't happen. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Fix performance monitor exceptionLivio Soares2007-02-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To the issue: some point during 2.6.20 development, Paul Mackerras introduced the "lazy IRQ disabling" patch (very cool work, BTW). In that patch, the performance monitor unit exception was marked as "maskable", in the sense that if interrupts were soft-disabled, that exception could be ignored. This broke my PowerPC profiling code. The symptom that I see is that a varying number of interrupts (from 0 to $n$, typically closer to 0) get delivered, when, in reality, it should always be very close to $n$. The issue stems from the way masking is being done. Masking in this fashion seems to work well with the decrementer and external interrupts, because they are raised again until "really" handled. For the PMU, however, this does not apply (at least on my Xserver machine with a 970FX processor). If the PMU exception is not handled, it will _not_ be re-raised (at least on my machine). The documentation states that the PMXE bit in MMCR0 is set to 0 when the PMU exception is raised. However, software must re-set the bit to re-enable PMU exceptions. If the exception is ignored (as currently) not only is that interrupt lost, but because software does not re-set PMXE, the PMU registers are "frozen" forever. [This patch means that performance monitor exceptions are taken and handled even if irqs are off, as long as some other interrupt hasn't come along and caused interrupts to be hard-disabled. In this sense the PMU exception becomes like an NMI. The oprofile code for most powerpc processors does nothing that is unsafe in an NMI context, but the Cell oprofile code does a spin_lock_irqsave. However, that turns out to be OK because Cell doesn't actually use the performance monitor exception; performance monitor interrupts come in as a regular interrupt on Cell, so will be disabled when irqs are off. -- paulus.] Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Compile fixes for arch/powerpc dcr codeDavid Gibson2007-02-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The new dcr code does not currently compile when configured for native DCR access on ARCH=powerpc. This patch fixes the problems. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Maple: use mmio nvramNathan Lynch2007-02-072-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems supported by the maple platform (e.g. JS2x blades running SLOF) are able to use the mmio_nvram backend for reading and writing nvram. This is an improvement over the current situation -- no nvram access from userspace at all. Select MMIO_NVRAM for the maple platform. Initialize the mmio_nvram backend from maple setup code. Signed-off-by: Nathan Lynch <ntl@pobox.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: defconfigOlof Johansson2007-02-071-0/+1722
| | | | | | | | | | | | | | | | | | | | | | | | Base pasemi defconfig. Nothing special, just the native drivers plus common PCI-express/PCI cards. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: iommu supportOlof Johansson2007-02-076-5/+306
| | | | | | | | | | | | | | | | | | | | | I/O TLB support for PA6T-1682M. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: Configure DMA controller interruptsOlof Johansson2007-02-073-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA controller on PWRficient is somewhat special -- has a PCI header so it looks like it's on the root PCI (-Express) root bus, but it uses more than the default number of interrupts (and they are hardwired). We need to wire up all interrupts for the DMA controller. The generic IRQ code will only map the primary interrupt from the PCI header (128), so add 129->211 by hand. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: SMP timebase syncOlof Johansson2007-02-071-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | Timebase update is simple on PA6T, since global updates can be done from one core by writing to an SPR. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: Implement restartOlof Johansson2007-02-071-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | Implement reset on platforms/pasemi. Default is just to reset the cpu using the SDC registers. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: Idle loopsOlof Johansson2007-02-078-2/+227
| | | | | | | | | | | | | | | | | | | | | | | | | | | Powersave support on PA6T. Right now it only uses 'doze' mode, and will default to no savings (spin). Signed-off-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: Machine check handlerOlof Johansson2007-02-071-0/+43
| | | | | | | | | | | | | | | | | | | | | Print out decoded machine check information on PA6T. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] pasemi: UART udbg supportOlof Johansson2007-02-074-0/+73
| | | | | | | | | | | | | | | | | | | | | Early debug output for PA Semi UART. Uses the 2.05 CI real mode ops. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Assign all PCI busses on G3 Blue & WhitePavel Roskin2007-02-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | G3 Blue & White is misconfigured by default so that CardBus controllers in PCI slots don't work. The PCI bridge is programmed to only allow access to bus 1 but not higher busses. The patch forces the PCI busses to be reassigned if a Grackle controller is found and the machine identifies itself as "PowerMac1,1" Signed-off-by: Pavel Roskin <proski@gnu.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: add celleb_defconfigIshizaki Kou2007-02-071-0/+1408
| | | | | | | | | | | | | | | | | | | | | | | | This patch creates defconfig file for Celleb platform. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: basic supportIshizaki Kou2007-02-079-0/+551
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds base support for Celleb platform. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: support spu priv1 opsIshizaki Kou2007-02-071-0/+208
| | | | | | | | | | | | | | | | | | | | | | | | SPU support routines for Celleb platform. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: consolidate spu management opsIshizaki Kou2007-02-073-401/+448
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spu management ops in arch/platforms/cell/spu_priv1_mmio.h can be used commonly in of based platform. This patch separates spu management ops from native cell code and uses on celleb platform. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: support udbgIshizaki Kou2007-02-072-0/+99
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds udbg support for Celleb platform. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: htab routinesIshizaki Kou2007-02-071-0/+311
| | | | | | | | | | | | | | | | | | | | | | | | Adds htab routines for Celleb platform. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: support iommuIshizaki Kou2007-02-071-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | This patch creates Celleb platform dependent file to support iommu. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: setup usb host controller in SCCIshizaki Kou2007-02-071-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | USB host controller in SCC requires enable sequence. It should be done before USB host drivers start. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: support interruptsIshizaki Kou2007-02-072-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch creates Celleb platform dependent files to support interrupts. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Celleb: interfaces to the hypervisorIshizaki Kou2007-02-072-0/+507
| | | | | | | | | | | | | | | | | | | | | | | | This patch creates Celleb platform dependent files which add interfaces to call hypervisor. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] powermac: local_irq_disable() is redundant after local_irq_save()Jiri Kosina2007-02-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | arch/powerpc/platforms/powermac/smp.c::smp_core99_kick_cpu() contains local_irq_disable() call after local_irq_save(). This looks redundant. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] 86xx: local_irq_disable() is redundant after local_irq_save()Jiri Kosina2007-02-071-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/powerpc/platforms/86xx/mpc86xx_smp.c::smp_86xx_kick_cpu() contains local_irq_disable() call after local_irq_save(). This looks redundant. Signed-off-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] mpc8272ads: defconfigVitaly Bordug2007-02-071-0/+848
| | | | | | | | | | | | | | | | | | | | | | | | | | | Default config file for mpc8272ads (powerpc port).Though relevant bits went in, it is required to keep proper default configuration for the target, which seems to be missed initially. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Fix kernel build errors for mpc8272ads and mpc8560adsVitaly Bordug2007-02-075-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent update of asm-powerpc/io.h caused cpm-related stuff to break in the current kernel. Current patch fixes it, as well as other inconsistencies expressed, that do not permit targets from working properly: - Updated dts with a chosen node with interrupt controller, - fixed messed device IDs among CPM2 SoC devices, - corrected odd header name and fixed type in defines, - Added 82xx subdir to the powerpc/platforms Makefile, missed during initial commit, - new solely-powerpc header file for 8260 family (was using one from arch/ppc, this one cleaned up from the extra stuff), in fact for now a placeholder to get the board-specific includes for stuff not yet capable to live with devicetree peeks only - Fixed couple of misprints in reference mpc8272 dts. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] cpm2: CPM2 interrupt controller fixVitaly Bordug2007-02-074-88/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This contains important fixes for the CPM2 PIC code. Eliminated CPM_IRQ_OFFSET, pulling the respective interrupt numbers from the interrupt mapping. Updated devicetree files to reflect that. Changed direct IC-related IO accesses to the IO accessors. Fixed all the sense values to keep coherency with ipic. In the current code, CPM2 stuff will have no IRQs and hence could be hardly usable. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] PS3: Enable USB mass storageGeoff Levand2007-02-071-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | Update ps3_defconfig to enable USB mass storage and VFAT. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] PS3: Fix DMA scatter-gatherGeoff Levand2007-02-071-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | Add the missing pieces to support DMA scatter-gather on the PS3 system bus. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] PS3: Move system bus to platform directoryGeoff Levand2007-02-0711-8/+519
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the PS3 system bus routines from drivers/ps3 to arch/powerpc/platforms/ps3. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add "is_power_of_2" checking to log2.h.Robert P. J. Day2007-02-071-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the inline function "is_power_of_2()" to log2.h, where the value zero is *not* considered to be a power of two. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] MPIC: support more than 256 sourcesOlof Johansson2007-02-072-24/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow more than the default 256 MPIC sources. Allocates a new flag (MPIC_LARGE_VECTORS) to be used by platform code when instantiating the mpic. I picked 11 bits worth right now since it would cover the number of sources on any hardware I have seen. It can always be increased later if needed. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] PA6T PMC supportOlof Johansson2007-02-072-50/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for PA6T-style PMC registers. PMCs are completely implementation-dependent on PPC, and PA6T numbers them differently from the IBM model. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Add PMC type to cputableOlof Johansson2007-02-072-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cputable entries for which type of PMC implementation the processor has. I've only filled in the current 64-bit processors, the unfilled default value will have same behaviour as before so it can be done over time as needed. Also tidy up the dummy_perf implementation a bit, aggregating it into one function with ifdefs instead of several. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Oprofile cleanupOlof Johansson2007-02-074-15/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up the ctr_read/write a bit. It's currently defined in the include but only used in one C file each. The only exception is the classic version, so keep that in the include and define in the C file as appropriate. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
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