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* powerpc: Move cpu_setup_6xx.S and temp.c over to arch/powerpcPaul Mackerras2006-03-271-474/+0
| | | | | | | Also renamed temp.c to tau_6xx.c (for thermal assist unit) and updated the Kconfig option description and help text for CONFIG_TAU. Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTESStephen Rothwell2005-10-171-2/+2
| | | | | | instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* [PATCH] ppc32: make cur_cpu_spec a single pointer instead of an arrayKumar Gala2005-09-281-2/+0
| | | | | | | | | | Changed ppc32 so that cur_cpu_spec is just a single pointer for all CPUs. Additionally, made call_setup_cpu check to see if the cpu_setup pointer is NULL or not before calling the function. This lets remove the dummy cpu_setup calls that just return. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] merge some from Rusty's trivial patchesAdrian Bunk2005-09-101-1/+0
| | | | | | | | | | | This patch contains the most trivial from Rusty's trivial patches: - spelling fixes - remove duplicate includes Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* kbuild: m68k,parisc,ppc,ppc64,s390,xtensa use generic asm-offsets.h supportSam Ravnborg2005-09-091-1/+1
| | | | | | Delete obsoleted parts form arch makefiles and rename to asm-offsets.h Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* [PATCH] ppc32: Added cputable entry for 7448Kumar Gala2005-09-051-0/+4
| | | | | | | | | Added cputable entry for 7448 as well adding it to checks for saving and restoring of cpu state. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc: L2 cache prefetch fixes on 745xKumar Gala2005-09-011-1/+4
| | | | | | | | | | We run into problems if we blindly enable L2 prefetching without checking that the L2 cache is actually enabled. Additionaly, if we disable the L2 cache we need to ensure that we disable L2 prefetching. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: Fix errata for some G3 CPUsBenjamin Herrenschmidt2005-05-011-6/+36
| | | | | | | | | | | | | | Some G3 CPUs can crash in funny way if a store from an FPU register instruction is executed on a register that has never been initialized since power on. This patch fixes it by making sure all FP registers have been properly initialized at kernel boot and when waking from sleep. It also makes the code that decides wether HID0_BTIC and HID0_DPM are allowed on a given CPU smarter (it can actually _clear_ them now if they are not allowed instead of just setting them when they are allowed in case the firmware got them wrong) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+440
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!