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* sh: Turn on speculative return for SH7785 and SH7786Matt Fleming2010-02-181-1/+2
| | | | | Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up SH-4A boot_cpu_data.flags probing.Paul Mundt2009-06-011-3/+0
| | | | | | | | | | | This tidies up the boot_cpu_data.flags probing on SH-4A. All of them have a few things in common, which we can blindly set, rather than having each subtype have to set the same flags. We can also make assumptions about cache ways and the validity of PTEA, so this also kills off CPU_HAS_PTEA as a config option. There was also a bug in the FPU probing, which is now tidied up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Always fixup unaligned userspace accesses on sh64.Paul Mundt2009-05-081-5/+0
| | | | | | | | | | | | sh64 has traditionally had this configurable via a Kconfig option (CONFIG_SH64_USER_MISALIGNED_FIXUP). In practice it has never really been terribly useful to turn this off, so just get rid of the option entirely. We leave the sysctl around so we don't end up breaking existing root file systems, and to allow folks that really want this off to do so at their own risk. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.Paul Mundt2009-03-171-0/+3
| | | | | | | | | | | | | | | | | | | | This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores that implement the PTAEX register and respective functionality. Presently only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs). The main change is in how the PTE is written out when loading the entry in to the TLB, as well as in how the TLB entry is selectively flushed. While SH-X2 extended mode splits out the memory-mapped U and I-TLB data arrays for extra bits, extended ASID mode splits out the address arrays. While we don't use the memory-mapped data array access, the address array accesses are necessary for selective TLB flushes, so these are implemented newly and replace the generic SH-4 implementation. With this, TLB flushes in switch_mm() are almost non-existent on newer parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Disable big endian for SH-5.Paul Mundt2008-02-141-0/+1
| | | | | | All SH-5 machines are little endian. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: remove maskreg irq codeMagnus Damm2008-02-141-3/+0
| | | | | | | This patch removes the maskreg irq code since it is not in use anymore. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use def_bool where possible.Harvey Harrison2008-01-281-10/+10
| | | | | | | | | | | | | | | | | | | | Change occurances of: bool default X to: def_bool X Change ocurances of: bool "Foo" default X to: def_bool X prompt "Foo" Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Consolidate Kconfig.sh/Kconfig.sh64.Paul Mundt2008-01-281-0/+13
| | | | | | | Fold in the sh64-specific bits in to the main Kconfig.sh, and move this back as arch/sh/Kconfig. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Consolidate CPU features in Kconfig.cpu.Paul Mundt2008-01-281-0/+102
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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