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* tile: improve gxio iorpc autogenerated code styleChris Metcalf2013-09-161-14/+14
| | | | | | Fix some whitespace style issues in some auto-generated files. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* tile PCI RC: support more MSI-X interrupt vectorsChris Metcalf2013-08-061-0/+5
| | | | | | | | | To support PCIe devices with higher number of MSI-X interrupt vectors, e.g. 16 for the LSI RAID card, enhance the Gx RC stack to provide more MSI-X vectors by using the TRIO Scatter Queues, which provide 8 more vectors in addition to ~10 from the Map Mem regions. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* tile: gxio iorpc numbering change for TRIO interfaceChris Metcalf2012-09-241-11/+13
| | | | | | | | | An ABI numbering change was made in the hypervisor for Tilera's 4.1 MDE release (just shipped). It's incompatible with the previous 4.0 release ABI numbering, so we track the new numbering going forward. We plan to avoid modifying ABI numbering for these interfaces again. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: provide kernel support for the tilegx TRIO shimChris Metcalf2012-07-111-0/+97
Provide kernel support for the tilegx "Transaction I/O" (TRIO) on-chip hardware. This hardware implements the PCIe interface for tilegx; the driver changes to use TRIO for PCIe are in a subsequent commit. The change is layered on top of the tilegx GXIO IORPC subsystem. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>