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* Merge branch 'for-next' of git://git.infradead.org/users/dhowells/linux-headersLinus Torvalds2012-01-141-1/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-next' of git://git.infradead.org/users/dhowells/linux-headers: UAPI: Split trivial #if defined(__KERNEL__) && X conditionals UAPI: Don't have a #elif clause in a __KERNEL__ guard in linux/soundcard.h UAPI: Fix AHZ multiple inclusion when __KERNEL__ is removed UAPI: Make linux/patchkey.h easier to parse UAPI: Fix nested __KERNEL__ guards in video/edid.h UAPI: Alter the S390 asm include guards to be recognisable by the UAPI splitter UAPI: Guard linux/cuda.h UAPI: Guard linux/pmu.h UAPI: Guard linux/isdn_divertif.h UAPI: Guard linux/sound.h UAPI: Rearrange definition of HZ in asm-generic/param.h UAPI: Make FRV use asm-generic/param.h UAPI: Make M32R use asm-generic/param.h UAPI: Make MN10300 use asm-generic/param.h UAPI: elf_read_implies_exec() is a kernel-only feature - so hide from userspace UAPI: Don't include linux/compat.h in sparc's asm/siginfo.h UAPI: Fix arch/mips/include/asm/Kbuild to have separate header-y lines
| * UAPI: Split trivial #if defined(__KERNEL__) && X conditionalsDavid Howells2011-12-131-1/+3
| | | | | | | | | | | | | | Split trivial #if defined(__KERNEL__) && X conditionals to make automated disintegration easier. Signed-off-by: David Howells <dhowells@redhat.com>
* | Merge branch 'linux-next' of ↵Linus Torvalds2012-01-111-7/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci * 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits) x86/PCI: Expand the x86_msi_ops to have a restore MSIs. PCI: Increase resource array mask bit size in pcim_iomap_regions() PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT) PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB x86/PCI: amd: factor out MMCONFIG discovery PCI: Enable ATS at the device state restore PCI: msi: fix imbalanced refcount of msi irq sysfs objects PCI: kconfig: English typo in pci/pcie/Kconfig PCI/PM/Runtime: make PCI traces quieter PCI: remove pci_create_bus() xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus() x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented() x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources sparc/PCI: convert to pci_create_root_bus() sh/PCI: convert to pci_scan_root_bus() for correct root bus resources powerpc/PCI: convert to pci_create_root_bus() powerpc/PCI: split PHB part out of pcibios_map_io_space() ... Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due to the same patches being applied in other branches.
| * | PCI: TILE: convert pcibios_set_master() to a non-inlined functionMyron Stowe2012-01-061-7/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts TILE's architecture-specific 'pcibios_set_master()' routine to a non-inlined function. This will allow follow on patches to create a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. Converting 'pci_bios_set_master()' to a non-inlined function will allow TILE's 'pcibios_set_master()' implementation to remain architecture-specific after the generic version is introduced and thus, not change current behavior. No functional change. Acked-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* | Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhostLinus Torvalds2012-01-102-2/+3
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lib: use generic pci_iomap on all architectures Many architectures don't want to pull in iomap.c, so they ended up duplicating pci_iomap from that file. That function isn't trivial, and we are going to modify it https://lkml.org/lkml/2011/11/14/183 so the duplication hurts. This reduces the scope of the problem significantly, by moving pci_iomap to a separate file and referencing that from all architectures. * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost: alpha: drop pci_iomap/pci_iounmap from pci-noop.c mn10300: switch to GENERIC_PCI_IOMAP mn10300: add missing __iomap markers frv: switch to GENERIC_PCI_IOMAP tile: switch to GENERIC_PCI_IOMAP tile: don't panic on iomap sparc: switch to GENERIC_PCI_IOMAP sh: switch to GENERIC_PCI_IOMAP powerpc: switch to GENERIC_PCI_IOMAP parisc: switch to GENERIC_PCI_IOMAP mips: switch to GENERIC_PCI_IOMAP microblaze: switch to GENERIC_PCI_IOMAP arm: switch to GENERIC_PCI_IOMAP alpha: switch to GENERIC_PCI_IOMAP lib: add GENERIC_PCI_IOMAP lib: move GENERIC_IOMAP to lib/Kconfig Fix up trivial conflicts due to changes nearby in arch/{m68k,score}/Kconfig
| * tile: switch to GENERIC_PCI_IOMAPMichael S. Tsirkin2011-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | tile now has working stubs for ioport_map and ioremap such that the generic pci_iomap will DTRT: cast to pointer on memory and return NULL and log message on IO map. Switch it over to GENERIC_PCI_IOMAP. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * tile: don't panic on iomapMichael S. Tsirkin2011-12-041-1/+2
| | | | | | | | | | | | | | | | I think panic on iomap is there just for debugging. If we return NULL instead, the generic pci_iomap will DTRT so we don't need to roll our own. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | arch/tile: use new generic {enable,disable}_percpu_irq() routinesChris Metcalf2011-12-031-10/+0
|/ | | | | | | | We provided very similar routines internally, but now we can hook into the generic framework by supplying our routines as function pointers in the irq_chip structure instead. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: factor out <arch/opcode.h> headerChris Metcalf2011-11-039-3272/+3318
| | | | | | | | | | | | | | | | | | | | | | | | | The kernel code was using some <asm> headers that included a mix of hardware-specific information (typically found in Tilera <arch> headers) and structures, enums, and function declarations supporting the disassembly function of the tile-desc.c sources. This change refactors that code so that a hardware-specific, but OS- and application-agnostic header, is created: <arch/opcode.h>. This header is then exported to userspace along with the other <arch> headers and can be used to build userspace code; in particular, it is used by glibc as part of implementing the backtrace() function. The new header, together with a header that specifically describes the disassembly code (<asm/tile-desc.h> with _32 and _64 variants), replaces the old <asm/opcode-tile*.h> and <asm/opcode_constants*.h> headers. As part of this change, we are also renaming the 32-bit constants from TILE_xxx to TILEPRO_xxx to better reflect the fact that they are specific to the TILEPro architecture, and not to TILE-Gx and any successor "tile" architecture chips. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: add the <arch> headers to the set of installed kernel headersChris Metcalf2011-11-032-0/+19
| | | | | | | | | | These headers are similar to the <asm> headers that describe kernel APIs, but instead describe aspects of the actual hardware in an OS- and application-independent manner. We need to include them in the set of installed headers so that userspace tools (including glibc) can build purely from the provided kernel headers. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: avoid ISO namespace pollution with <asm/sigcontext.h>Chris Metcalf2011-11-032-35/+82
| | | | | | | | | | | | | | | <asm/sigcontext.h> is used by glibc's <bits/sigcontext.h> from <signal.h>, which means that it can't clutter the namespace with random symbols or #defines. However, we use <arch/abi.h> to get a suitable type to hold a machine register. This change makes <arch/abi.h> safe to use in this kind of context if __need_int_reg_t is defined prior to including the file; in that case, it only defines a few symbols that are safe in the ISO namespace (prefixed with double underscores). <asm/sigcontext.h> then uses the __uint_reg_t type instead of the normal uint_reg_t. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds2011-08-0240-43/+79
|\ | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile/mm/init.c: trivial: use BUG_ON arch/tile: remove useless set_fixmap_nocache() macro arch/tile: add hypervisor-based character driver for SPI flash ROM ioctl-number.txt: add the tile hardwall ioctl range tile: use generic-y format for one-line asm-generic headers clocksource: tile: convert to use clocksource_register_hz
| * Merge tag 'v3.0' of ↵Chris Metcalf2011-08-021-11/+0
| |\ | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-linus
| * | arch/tile: remove useless set_fixmap_nocache() macroChris Metcalf2011-06-151-6/+0
| | | | | | | | | | | | | | | | | | | | | TILE doesn't support PAGE_KERNEL_NOCACHE so the macro isn't useful; it's a copy-and-paste from the first version of this header in 2007. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * | arch/tile: add hypervisor-based character driver for SPI flash ROMChris Metcalf2011-06-101-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first version of this patch proposed an arch/tile/drivers/ directory, but the consensus was that this was probably a poor choice for a place to group Tilera-specific drivers, and that in any case grouping by platform was discouraged, and grouping by function was preferred. This version of the patch addresses various issues raised in the community, primarily the absence of sysfs integration. The sysfs integration now handles passing information on sector size, page size, and total partition size to userspace as well. In addition, we now use a single "struct cdev" to manage all the partition minor devices, and dynamically discover the correct number of partitions from the hypervisor rather than using a module_param with a default value. This driver has no particular "peer" drivers it can be grouped with. It is sort of like an MTD driver for SPI ROM, but it doesn't group well with the other MTD devices since it relies on hypervisor virtualization to handle many of the irritating aspects of flash ROM management: sector awareness, background read for sub-sector writes, bit examination to determine whether a sector erase needs to be issued, etc. It is in fact more like an EEPROM driver, but the hypervisor virtualization does require a "flush" command if you wish to commit a sector write prior to writing to a different sector, and this is sufficiently different from generic I2C/SPI EEPROMs that as a result it doesn't group well with them either. The simple character device is already in use by a range of Tilera SPI ROM management tools, as well as by customers. In addition, using the simple character device actually simplifies the userspace tools, since they don't need to manage sector erase, background read, etc. This both simplifies the code (since we can uniformly manage plain files and the SPI ROM) as well as makes the user code portable to non-Linux platforms that don't offer the same MTD ioctls. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
| * | tile: use generic-y format for one-line asm-generic headersChris Metcalf2011-06-0338-37/+38
| | | | | | | | | | | | | | | | | | | | | This lets us remove a lot of one-line wrapper header files. See commit d8ecc5cd8e227bc318513b5306ae88a474b8886d for context. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* | | atomic: cleanup asm-generic atomic*.h inclusionArun Sharma2011-07-261-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After changing all consumers of atomics to include <linux/atomic.h>, we ran into some compile time errors due to this dependency chain: linux/atomic.h -> asm/atomic.h -> asm-generic/atomic-long.h where atomic-long.h could use funcs defined later in linux/atomic.h without a prototype. This patches moves the code that includes asm-generic/atomic*.h to linux/atomic.h. Archs that need <asm-generic/atomic64.h> need to select CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it unconditionally). Compile tested on i386 and x86_64 with allnoconfig. Signed-off-by: Arun Sharma <asharma@fb.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | atomic: move atomic_add_unless to generic codeArun Sharma2011-07-262-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation for more generic atomic primitives based on __atomic_add_unless. Signed-off-by: Arun Sharma <asharma@fb.com> Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | atomic: use <linux/atomic.h>Arun Sharma2011-07-266-15/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: Arun Sharma <asharma@fb.com> Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Cc: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | asm-generic: add another generic ext2 atomic bitopsAkinobu Mita2011-07-261-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The majority of architectures implement ext2 atomic bitops as test_and_{set,clear}_bit() without spinlock. This adds this type of generic implementation in ext2-atomic-setbit.h and use it wherever possible. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Suggested-by: Andreas Dilger <adilger@dilger.ca> Suggested-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | ptrace: unify show_regs() prototypeMike Frysinger2011-07-261-2/+0
| |/ |/| | | | | | | | | | | | | | | [ poleg@redhat.com: no need to declare show_regs() in ptrace.h, sched.h does this ] Signed-off-by: Mike Frysinger <vapier@gentoo.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Fix node_start/end_pfn() definition for mm/page_cgroup.cKAMEZAWA Hiroyuki2011-06-271-11/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 21a3c96 uses node_start/end_pfn(nid) for detection start/end of nodes. But, it's not defined in linux/mmzone.h but defined in /arch/???/include/mmzone.h which is included only under CONFIG_NEED_MULTIPLE_NODES=y. Then, we see mm/page_cgroup.c: In function 'page_cgroup_init': mm/page_cgroup.c:308: error: implicit declaration of function 'node_start_pfn' mm/page_cgroup.c:309: error: implicit declaration of function 'node_end_pfn' So, fixiing page_cgroup.c is an idea... But node_start_pfn()/node_end_pfn() is a very generic macro and should be implemented in the same manner for all archs. (m32r has different implementation...) This patch removes definitions of node_start/end_pfn() in each archs and defines a unified one in linux/mmzone.h. It's not under CONFIG_NEED_MULTIPLE_NODES, now. A result of macro expansion is here (mm/page_cgroup.c) for !NUMA start_pfn = ((&contig_page_data)->node_start_pfn); end_pfn = ({ pg_data_t *__pgdat = (&contig_page_data); __pgdat->node_start_pfn + __pgdat->node_spanned_pages;}); for NUMA (x86-64) start_pfn = ((node_data[nid])->node_start_pfn); end_pfn = ({ pg_data_t *__pgdat = (node_data[nid]); __pgdat->node_start_pfn + __pgdat->node_spanned_pages;}); Changelog: - fixed to avoid using "nid" twice in node_end_pfn() macro. Reported-and-acked-by: Randy Dunlap <randy.dunlap@oracle.com> Reported-and-tested-by: Ingo Molnar <mingo@elte.hu> Acked-by: Mel Gorman <mgorman@suse.de> Signed-off-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* arch/tile: more /proc and /sys file supportChris Metcalf2011-05-271-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change introduces a few of the less controversial /proc and /proc/sys interfaces for tile, along with sysfs attributes for various things that were originally proposed as /proc/tile files. It also adjusts the "hardwall" proc API. Arnd Bergmann reviewed the initial arch/tile submission, which included a complete set of all the /proc/tile and /proc/sys/tile knobs that we had added in a somewhat ad hoc way during initial development, and provided feedback on where most of them should go. One knob turned out to be similar enough to the existing /proc/sys/debug/exception-trace that it was re-implemented to use that model instead. Another knob was /proc/tile/grid, which reported the "grid" dimensions of a tile chip (e.g. 8x8 processors = 64-core chip). Arnd suggested looking at sysfs for that, so this change moves that information to a pair of sysfs attributes (chip_width and chip_height) in the /sys/devices/system/cpu directory. We also put the "chip_serial" and "chip_revision" information from our old /proc/tile/board file as attributes in /sys/devices/system/cpu. Other information collected via hypervisor APIs is now placed in /sys/hypervisor. We create a /sys/hypervisor/type file (holding the constant string "tilera") to be parallel with the Xen use of /sys/hypervisor/type holding "xen". We create three top-level files, "version" (the hypervisor's own version), "config_version" (the version of the configuration file), and "hvconfig" (the contents of the configuration file). The remaining information from our old /proc/tile/board and /proc/tile/switch files becomes an attribute group appearing under /sys/hypervisor/board/. Finally, after some feedback from Arnd Bergmann for the previous version of this patch, the /proc/tile/hardwall file is split up into two conceptual parts. First, a directory /proc/tile/hardwall/ which contains one file per active hardwall, each file named after the hardwall's ID and holding a cpulist that says which cpus are enclosed by the hardwall. Second, a /proc/PID file "hardwall" that is either empty (for non-hardwall-using processes) or contains the hardwall ID. Finally, this change pushes the /proc/sys/tile/unaligned_fixup/ directory, with knobs controlling the kernel code for handling the fixup of unaligned exceptions. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: cleanups for tilegx compat modeChris Metcalf2011-05-191-1/+1
| | | | | | | | These changes make the syscall table line up correctly for tilegx compat mode, and remove the stale sys32_fadvise64() function, which isn't actually used by any syscall table. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: support signal "exception-trace" hookChris Metcalf2011-05-192-7/+4
| | | | | | | | | | | | | | | | This change adds support for /proc/sys/debug/exception-trace to tile. Like x86 and sparc, by default it is set to "1", generating a one-line printk whenever a user process crashes. By setting it to "2", we get a much more complete userspace diagnostic at crash time, including a user-space backtrace, register dump, and memory dump around the address of the crash. Some vestiges of the Tilera-internal version of this support are removed with this patch (the show_crashinfo variable and the arch_coredump_signal function). We retain a "crashinfo" boot parameter which allows you to set the boot-time value of exception-trace. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: use better definitions of xchg() and cmpxchg()Chris Metcalf2011-05-193-32/+44
| | | | | | | | | | | | These definitions use a ({}) construct to avoid some cases where we were getting warnings about unused return values. We also promote the definition to the common <asm/atomic.h>, since it applies to both the 32- and 64-bit atomics. In addition, define __HAVE_ARCH_CMPXCHG for TILE-Gx since it has efficient direct atomic instructions. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: finish enabling support for TILE-Gx 64-bit chipChris Metcalf2011-05-1212-1346/+2527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This support was partially present in the existing code (look for "__tilegx__" ifdefs) but with this change you can build a working kernel using the TILE-Gx toolchain and ARCH=tilegx. Most of these files are new, generally adding a foo_64.c file where previously there was just a foo_32.c file. The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx, using the existing SRCARCH mechanism in the top-level Makefile. Changes to existing files: - <asm/bitops.h> and <asm/bitops_32.h> changed to factor the include of <asm-generic/bitops/non-atomic.h> in the common header. - <asm/compat.h> and arch/tile/kernel/compat.c changed to remove the "const" markers I had put on compat_sys_execve() when trying to match some recent similar changes to the non-compat execve. It turns out the compat version wasn't "upgraded" to use const. - <asm/opcode-tile_64.h> and <asm/opcode_constants_64.h> were previously included accidentally, with the 32-bit contents. Now they have the proper 64-bit contents. Finally, I had to hack the existing hacky drivers/input/input-compat.h to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64). Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> [drivers/input]
* tile: replace mm->cpu_vm_mask with mm_cpumask()KOSAKI Motohiro2011-05-041-2/+2
| | | | | | | | We plan to change mm->cpu_vm_mask definition later. Thus, this patch convert it into proper macro. Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* tile,mn10300: add device parameter to dma_cache_sync()James Hogan2011-05-041-1/+2
| | | | | | | | | | | Since v2.6.20 "Pass struct dev pointer to dma_cache_sync()" (d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a struct dev pointer, but these appear to be missing from the tile and mn10300 implementations, so add them. Signed-off-by: James Hogan <james.hogan@imgtec.com> [cmetcalf@tilera.com: took only the "tile" portion as I don't maintain mn10300] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: clarify flush_buffer()/finv_buffer() function namesChris Metcalf2011-05-041-6/+12
| | | | | | | | | | | | | | | | | | They are only applicable for locally-homecached memory ranges, so change their names to {flush,finv}_buffer_local(). Change inv_buffer() to just do an mf instead of any kind of fancier barrier, since you're obviously not going to be waiting for anything once the local homecache is invalidated. Fix tilepro.c network driver not to bother calling finv_buffer when stopping the EPP, but just mf after memset to ensure that it will not see any packet data after we finish stopping; use finv_buffer_remote() when doing exit-time cleanup. This also fixes a (not very interesting) generic Linux build failure where drivers/scsi/st.c declares its own flush_buffer(). Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: kernel-related cleanups from removing static page sizeChris Metcalf2011-05-044-48/+17
| | | | | | | | | User space code has been able to discover the static page size by including a special <hv/pagesize.h> file. In the current release, that file is now gone, and <asm/page.h> doesn't rely on it. The getpagesize() API is now the only way for userspace to get the page size. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: various header improvements for building driversChris Metcalf2011-05-0410-10/+81
| | | | | | | | | | | | | | | | | | | | | | | This change adds a number of missing headers in asm (fb.h, parport.h, serial.h, and vga.h) using the minimal generic versions. It also adds a number of missing interfaces that showed up as build failures when trying to build various drivers not normally included in the "tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(), virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(), and __pmd(). I also added a cast in virt_to_page() since not all callers pass a pointer. I fixed <asm/stat.h> to properly include a __KERNEL__ guard for the __ARCH_WANT_STAT64 symbol, and <asm/swab.h> to use __builtin_bswap32() even for our 64-bit architecture, since the same code is produced. I added an export for get_cycles(), since it's used in some modules. And I made <arch/spr_def.h> properly include the __KERNEL__ guard, even though it's not yet exported, since it likely will be soon. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: disable SD_WAKE_AFFINE flag on CPU/NODE scheduling domainChris Metcalf2011-05-041-18/+57
| | | | | | | This allows processes to spread more effectively to multiple cores (particularly important on 64-core chips!). Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: improve support for PCI hotplugChris Metcalf2011-05-041-1/+2
| | | | | | Note that this is not complete hot-plug support; hot-unplug is not included. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: support TIF_NOTIFY_RESUMEChris Metcalf2011-05-023-1/+10
| | | | | | | | | | | This support is required for CONFIG_KEYS, NFSv4 kernel DNS, etc. The change is slightly more complex than the minimal thing, since I took advantage of having to go into the assembly code to just move a bunch of stuff into C code: specifically, the schedule(), do_async_page_fault(), do_signal(), and single_step_once() support, in addition to the TIF_NOTIFY_RESUME support. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* arch/tile: refactor backtracing codeChris Metcalf2011-05-023-59/+37
| | | | | | | | | | | | This change is the result of some work to make the backtrace code more shareable between kernel, libc, and gdb. For the kernel, some good effects are to eliminate the hacky "VirtualAddress" typedef in favor of "unsigned long", to eliminate a bunch of spurious kernel doc comments, to remove the dead "bt_read_memory" function, and to use "__tilegx__" in #ifdefs instead of "TILE_CHIP". Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
* Fix common misspellingsLucas De Marchi2011-03-312-3/+3
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* bitops: remove minix bitops from asm/bitops.hAkinobu Mita2011-03-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | minix bit operations are only used by minix filesystem and useless by other modules. Because byte order of inode and block bitmaps is different on each architecture like below: m68k: big-endian 16bit indexed bitmaps h8300, microblaze, s390, sparc, m68knommu: big-endian 32 or 64bit indexed bitmaps m32r, mips, sh, xtensa: big-endian 32 or 64bit indexed bitmaps for big-endian mode little-endian bitmaps for little-endian mode Others: little-endian bitmaps In order to move minix bit operations from asm/bitops.h to architecture independent code in minix filesystem, this provides two config options. CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k. CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu, m32r, mips, sh, xtensa). The architectures which always use little-endian bitmaps do not select these options. Finally, we can remove minix bit operations from asm/bitops.h for all architectures. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Michal Simek <monstr@monstr.eu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Hirokazu Takata <takata@linux-m32r.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* bitops: remove ext2 non-atomic bitops from asm/bitops.hAkinobu Mita2011-03-231-1/+0
| | | | | | | | | | | | As the result of conversions, there are no users of ext2 non-atomic bit operations except for ext2 filesystem itself. Now we can put them into architecture independent code in ext2 filesystem, and remove from asm/bitops.h for all architectures. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Jan Kara <jack@suse.cz> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* bitops: introduce little-endian bitops for most architecturesAkinobu Mita2011-03-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce little-endian bit operations to the big-endian architectures which do not have native little-endian bit operations and the little-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300, ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa) These architectures can just include generic implementation (asm-generic/bitops/le.h). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mm: NUMA aware alloc_thread_info_node()Eric Dumazet2011-03-221-1/+1
| | | | | | | | | | | | | | | | | | | Add a node parameter to alloc_thread_info(), and change its name to alloc_thread_info_node() This change is needed to allow NUMA aware kthread_create_on_cpu() Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: David S. Miller <davem@davemloft.net> Reviewed-by: Andi Kleen <ak@linux.intel.com> Acked-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Tejun Heo <tj@kernel.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: David Howells <dhowells@redhat.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds2011-03-1724-195/+265
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (27 commits) arch/tile: support newer binutils assembler shift semantics arch/tile: fix deadlock bugs in rwlock implementation drivers/edac: provide support for tile architecture tile on-chip network driver: sync up with latest fixes arch/tile: support 4KB page size as well as 64KB arch/tile: add some more VMSPLIT options and use consistent naming arch/tile: fix some comments and whitespace arch/tile: export some additional module symbols arch/tile: enhance existing finv_buffer_remote() routine arch/tile: fix two bugs in the backtracer code arch/tile: use extended assembly to inline __mb_incoherent() arch/tile: use a cleaner technique to enable interrupt for cpu_idle() arch/tile: sync up with <arch/sim.h> and <arch/sim_def.h> changes arch/tile: fix reversed test of strict_strtol() return value arch/tile: avoid a simulator warning during bootup arch/tile: export <asm/hardwall.h> to userspace arch/tile: warn and retry if an IPI is not accepted by the target cpu arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls arch/tile: fix __ndelay etc to work better arch/tile: bug fix: exec'ed task thought it was still single-stepping ... Fix up trivial conflict in arch/tile/kernel/vmlinux.lds.S (percpu alignment vs section naming convention fix)
| * arch/tile: support newer binutils assembler shift semanticsChris Metcalf2011-03-172-5/+22
| | | | | | | | | | | | | | | | This change supports building the kernel with newer binutils where a shift of greater than the word size is no longer interpreted silently as modulo the word size, but instead generates a warning. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * arch/tile: fix deadlock bugs in rwlock implementationChris Metcalf2011-03-101-76/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first issue fixed in this patch is that pending rwlock write locks could lock out new readers; this could cause a deadlock if a read lock was held on cpu 1, a write lock was then attempted on cpu 2 and was pending, and cpu 1 was interrupted and attempted to re-acquire a read lock. The write lock code was modified to not lock out new readers. The second issue fixed is that there was a narrow race window where a tns instruction had been issued (setting the lock value to "1") and the store instruction to reset the lock value correctly had not yet been issued. In this case, if an interrupt occurred and the same cpu then tried to manipulate the lock, it would find the lock value set to "1" and spin forever, assuming some other cpu was partway through updating it. The fix is to enforce an interrupt critical section around the tns/store pair. In addition, this change now arranges to always validate that after a readlock we have not wrapped around the count of readers, which is only eight bits. Since these changes make the rwlock "fast path" code heavier weight, I decided to move all the rwlock code all out of line, leaving only the conventional spinlock code with fastpath inlines. Since the read_lock and read_trylock implementations ended up very similar, I just expressed read_lock in terms of read_trylock. As part of this change I also eliminate support for the now-obsolete tns_atomic mode. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * drivers/edac: provide support for tile architectureChris Metcalf2011-03-103-1/+119
| | | | | | | | | | | | | | | | Add tile support for the EDAC driver, which provides unified system error (memory, PCI, etc.) reporting. For now, the TILEPro port reports memory correctable error (CE) only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * arch/tile: support 4KB page size as well as 64KBChris Metcalf2011-03-107-47/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tilera architecture traditionally supports 64KB page sizes to improve TLB utilization and improve performance when the hardware is being used primarily to run a single application. For more generic server scenarios, it can be beneficial to run with 4KB page sizes, so this commit allows that to be specified (by modifying the arch/tile/include/hv/pagesize.h header). As part of this change, we also re-worked the PTE management slightly so that PTE writes all go through a __set_pte() function where we can do some additional validation. The set_pte_order() function was eliminated since the "order" argument wasn't being used. One bug uncovered was in the PCI DMA code, which wasn't properly flushing the specified range. This was benign with 64KB pages, but with 4KB pages we were getting some larger flushes wrong. The per-cpu memory reservation code also needed updating to conform with the newer percpu stuff; before it always chose 64KB, and that was always correct, but with 4KB granularity we now have to pay closer attention and reserve the amount of memory that will be requested when the percpu code starts allocating. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * arch/tile: fix some comments and whitespaceChris Metcalf2011-03-102-2/+1
| | | | | | | | | | | | | | | | This is a grab bag of changes with no actual change to generated code. This includes whitespace and comment typos, plus a couple of stale comments being removed. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * arch/tile: enhance existing finv_buffer_remote() routineChris Metcalf2011-03-011-49/+6
| | | | | | | | | | | | | | | | | | | | | | It now takes an additional argument so it can be used to flush-and-invalidate pages that are cached using hash-for-home as well those that are cached with coherence point on a single cpu. This allows it to be used more widely for changing the coherence point of arbitrary pages when necessary. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * arch/tile: use extended assembly to inline __mb_incoherent()Chris Metcalf2011-03-011-1/+18
| | | | | | | | | | | | | | This avoids having to maintain an additional separate assembly file, and of course the inline is slightly more efficient as well. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
| * arch/tile: sync up with <arch/sim.h> and <arch/sim_def.h> changesChris Metcalf2011-03-012-12/+39
| | | | | | | | | | | | | | | | | | These headers are used by Linux but are maintained upstream. This change incorporates a few minor fixes to these headers, including a new sim_print() function, cleaner support for the sim_syscall() API, and a sim_query_cpu_speed() method. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 15:56:31 +0000