summaryrefslogtreecommitdiffstats
path: root/arch/x86/kernel/cpu/perf_event_p4.c
Commit message (Expand)AuthorAgeFilesLines
* perf, x86: Handle in flight NMIs on P4 platformCyrill Gorcunov2010-09-301-1/+5
* perf, x86: Fix handle_irq return valuesPeter Zijlstra2010-09-031-1/+1
* perf, x86, Pentium4: Clear the P4_CCCR_FORCE_OVF flagLin Ming2010-08-251-0/+2
* perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properlyCyrill Gorcunov2010-08-081-3/+6
* perf, x86: P4 PMU -- redesign cache eventsCyrill Gorcunov2010-07-051-36/+111
* perf, x86: Make a second write to performance counter if neededCyrill Gorcunov2010-06-091-0/+9
* perf, x86: P4_pmu_schedule_events -- use smp_processor_id instead of raw_Cyrill Gorcunov2010-05-191-1/+1
* perf, x86: P4 PMU -- do a real check for ESCR address being in hashCyrill Gorcunov2010-05-191-3/+4
* perf, x86: P4 PMU -- fix typo in unflagged NMI handlingCyrill Gorcunov2010-05-181-1/+1
* perf, x86: P4 PMU -- handle unflagged eventsCyrill Gorcunov2010-05-181-16/+16
* x86, perf: P4 PMU - fix counters management logicCyrill Gorcunov2010-05-151-4/+4
* x86, perf: P4 PMU -- use hash for p4_get_escr_idx()Cyrill Gorcunov2010-05-131-55/+71
* x86, perf: P4 PMU -- check for proper event index in RAW eventsCyrill Gorcunov2010-05-081-1/+10
* x86, perf: P4 PMU -- Get rid of redundant check for array indexCyrill Gorcunov2010-05-081-5/+0
* x86, perf: P4 PMU -- protect sensible procedures from preemptionCyrill Gorcunov2010-05-081-2/+6
* x86, perf: P4 PMU -- configure predefined eventsCyrill Gorcunov2010-05-081-15/+14
* perf, x86: Call x86_setup_perfctr() from .hw_config()Robert Richter2010-05-071-1/+1
* perf, x86: Fix __initconst vs constPeter Zijlstra2010-04-021-2/+2
* perf, x86: Fix up the ANY flag stuffPeter Zijlstra2010-04-021-18/+22
* perf, x86: Undo some some *_counter* -> *_event* renamesRobert Richter2010-04-021-7/+7
* perf, x86: Add Nehelem PMU programming errata workaroundPeter Zijlstra2010-03-261-1/+1
* x86, perf: Add raw events support for the P4 PMUCyrill Gorcunov2010-03-261-322/+424
* x86, perf: Fix few cosmetic dabs for P4 pmu (comments and constantify)Cyrill Gorcunov2010-03-181-1/+1
* perf, x86: Add cache events for the Pentium-4 PMULin Ming2010-03-181-6/+147
* perf, x86: Add a key to simplify template lookup in Pentium-4 PMULin Ming2010-03-181-52/+34
* x86, perf: Use apic_write unconditionallyCyrill Gorcunov2010-03-181-2/+0
* perf, x86: Enable not tagged retired instruction counting on P4sCyrill Gorcunov2010-03-151-5/+3
* x86, perf: Unmask LVTPC only if we have APIC supportedCyrill Gorcunov2010-03-131-0/+2
* perf, x86: Implement initial P4 PMU driverCyrill Gorcunov2010-03-111-0/+607