| Commit message (Expand) | Author | Age | Files | Lines |
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| * | perf, x86: Store perfctr msr addresses in config_base/event_base | Robert Richter | 2011-02-16 | 1 | -4/+4 |
| * | perf, x86: P4 PMU: Fix spurious NMI messages | Cyrill Gorcunov | 2011-02-16 | 1 | -3/+8 |
| * | perf: Fix Pentium4 raw event validation | Stephane Eranian | 2011-01-27 | 1 | -2/+10 |
| * | perf, x86: P4 PMU - Fix unflagged overflows handling | Cyrill Gorcunov | 2011-01-09 | 1 | -13/+15 |
| * | Merge branch 'perf/urgent' into perf/core | Ingo Molnar | 2010-10-05 | 1 | -1/+5 |
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| | * | perf, x86: Handle in flight NMIs on P4 platform | Cyrill Gorcunov | 2010-09-30 | 1 | -1/+5 |
| * | | Merge branch 'perf/urgent' into perf/core | Ingo Molnar | 2010-09-09 | 1 | -1/+1 |
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| | * | perf, x86: Fix handle_irq return values | Peter Zijlstra | 2010-09-03 | 1 | -1/+1 |
| * | | perf, x86, Pentium4: Add RAW events verification | Cyrill Gorcunov | 2010-09-01 | 1 | -24/+268 |
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| * | perf, x86, Pentium4: Clear the P4_CCCR_FORCE_OVF flag | Lin Ming | 2010-08-25 | 1 | -0/+2 |
| * | perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properly | Cyrill Gorcunov | 2010-08-08 | 1 | -3/+6 |
| * | perf, x86: P4 PMU -- redesign cache events | Cyrill Gorcunov | 2010-07-05 | 1 | -36/+111 |
| * | perf, x86: Make a second write to performance counter if needed | Cyrill Gorcunov | 2010-06-09 | 1 | -0/+9 |
| * | perf, x86: P4_pmu_schedule_events -- use smp_processor_id instead of raw_ | Cyrill Gorcunov | 2010-05-19 | 1 | -1/+1 |
| * | perf, x86: P4 PMU -- do a real check for ESCR address being in hash | Cyrill Gorcunov | 2010-05-19 | 1 | -3/+4 |
| * | perf, x86: P4 PMU -- fix typo in unflagged NMI handling | Cyrill Gorcunov | 2010-05-18 | 1 | -1/+1 |
| * | perf, x86: P4 PMU -- handle unflagged events | Cyrill Gorcunov | 2010-05-18 | 1 | -16/+16 |
| * | x86, perf: P4 PMU - fix counters management logic | Cyrill Gorcunov | 2010-05-15 | 1 | -4/+4 |
| * | x86, perf: P4 PMU -- use hash for p4_get_escr_idx() | Cyrill Gorcunov | 2010-05-13 | 1 | -55/+71 |
| * | x86, perf: P4 PMU -- check for proper event index in RAW events | Cyrill Gorcunov | 2010-05-08 | 1 | -1/+10 |
| * | x86, perf: P4 PMU -- Get rid of redundant check for array index | Cyrill Gorcunov | 2010-05-08 | 1 | -5/+0 |
| * | x86, perf: P4 PMU -- protect sensible procedures from preemption | Cyrill Gorcunov | 2010-05-08 | 1 | -2/+6 |
| * | x86, perf: P4 PMU -- configure predefined events | Cyrill Gorcunov | 2010-05-08 | 1 | -15/+14 |
| * | perf, x86: Call x86_setup_perfctr() from .hw_config() | Robert Richter | 2010-05-07 | 1 | -1/+1 |
| * | perf, x86: Fix __initconst vs const | Peter Zijlstra | 2010-04-02 | 1 | -2/+2 |
| * | perf, x86: Fix up the ANY flag stuff | Peter Zijlstra | 2010-04-02 | 1 | -18/+22 |
| * | perf, x86: Undo some some *_counter* -> *_event* renames | Robert Richter | 2010-04-02 | 1 | -7/+7 |
| * | perf, x86: Add Nehelem PMU programming errata workaround | Peter Zijlstra | 2010-03-26 | 1 | -1/+1 |
| * | x86, perf: Add raw events support for the P4 PMU | Cyrill Gorcunov | 2010-03-26 | 1 | -322/+424 |
| * | x86, perf: Fix few cosmetic dabs for P4 pmu (comments and constantify) | Cyrill Gorcunov | 2010-03-18 | 1 | -1/+1 |
| * | perf, x86: Add cache events for the Pentium-4 PMU | Lin Ming | 2010-03-18 | 1 | -6/+147 |
| * | perf, x86: Add a key to simplify template lookup in Pentium-4 PMU | Lin Ming | 2010-03-18 | 1 | -52/+34 |
| * | x86, perf: Use apic_write unconditionally | Cyrill Gorcunov | 2010-03-18 | 1 | -2/+0 |
| * | perf, x86: Enable not tagged retired instruction counting on P4s | Cyrill Gorcunov | 2010-03-15 | 1 | -5/+3 |
| * | x86, perf: Unmask LVTPC only if we have APIC supported | Cyrill Gorcunov | 2010-03-13 | 1 | -0/+2 |
| * | perf, x86: Implement initial P4 PMU driver | Cyrill Gorcunov | 2010-03-11 | 1 | -0/+607 |
