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path:
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arch
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x86
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kernel
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tsc_msr.c
Commit message (
Expand
)
Author
Age
Files
Lines
*
x86/cpu: Sanitize FAM6_ATOM naming
Peter Zijlstra
2018-10-02
1
-5
/
+5
*
x86/platform/intel-mid: Remove custom TSC calibration
Andy Shevchenko
2018-07-03
1
-0
/
+5
*
x86/tsc: Use SPDX identifier and update Intel copyright
Andy Shevchenko
2018-07-03
1
-4
/
+3
*
x86/tsc: Convert to use x86_match_cpu() and INTEL_CPU_FAM6()
Andy Shevchenko
2018-07-03
1
-41
/
+42
*
x86/tsc: Add missing header to tsc_msr.c
Andy Shevchenko
2018-07-03
1
-0
/
+1
*
x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs
Bin Gao
2016-11-18
1
-0
/
+19
*
x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration
Len Brown
2016-07-11
1
-1
/
+1
*
x86/tsc_msr: Add Airmont reference clock values
Len Brown
2016-07-10
1
-1
/
+4
*
x86/tsc_msr: Correct Silvermont reference clock values
Len Brown
2016-07-10
1
-3
/
+3
*
x86/tsc_msr: Update comments, expand definitions
Len Brown
2016-07-10
1
-26
/
+10
*
x86/tsc_msr: Remove debugging messages
Len Brown
2016-07-10
1
-16
/
+3
*
x86/tsc_msr: Identify Intel-specific code
Len Brown
2016-07-10
1
-0
/
+3
*
Revert "x86/tsc: Add missing Cherrytrail frequency to the table"
Len Brown
2016-07-10
1
-3
/
+0
*
x86/tsc: Add missing Cherrytrail frequency to the table
Jeremy Compostella
2016-05-12
1
-0
/
+3
*
x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO
Chen Yu
2016-05-06
1
-1
/
+1
*
x86: tsc: Add missing Baytrail frequency to the table
Mika Westerberg
2014-02-19
1
-1
/
+1
*
x86, tsc: Fallback to normal calibration if fast MSR calibration fails
Thomas Gleixner
2014-02-19
1
-14
/
+14
*
x86, tsc, apic: Unbreak static (MSR) calibration when CONFIG_X86_LOCAL_APIC=n
H. Peter Anvin
2014-01-16
1
-0
/
+2
*
x86, tsc: Add static (MSR) TSC calibration on Intel Atom SoCs
Bin Gao
2014-01-15
1
-0
/
+125