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* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-04-1913-68/+251
|\ | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 5974/1: arm/mach-at91 Makefile: remove two blanks. ARM: 6052/1: kdump: make kexec work in interrupt context ARM: 6051/1: VFP: preserve the HW context when calling signal handlers ARM: 6050/1: VFP: fix the SMP versions of vfp_{sync,flush}_hwstate ARM: 6007/1: fix highmem with VIPT cache and DMA ARM: 5975/1: AT91 slow-clock suspend: don't wait when turning PLLs off
| * ARM: 5974/1: arm/mach-at91 Makefile: remove two blanks.Ernst Schwab2010-04-141-2/+2
| | | | | | | | | | | | | | | | Cosmetic change to mach-at91 Makefile: remove two blanks introduced by earlier patches. Signed-off-by: Ernst Schwab <eschwab@online.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6052/1: kdump: make kexec work in interrupt contextMika Westerberg2010-04-141-4/+6
| | | | | | | | | | | | | | | | When crash happens in interrupt context there is no userspace context. We always use current->active_mm in those cases. Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6051/1: VFP: preserve the HW context when calling signal handlersImre Deak2010-04-143-17/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Imre Deak <imre.deak@nokia.com> Signal handlers can use floating point, so prevent them to corrupt the main thread's VFP context. So far there were two signal stack frame formats defined based on the VFP implementation, but the user struct used for ptrace covers all posibilities, so use it for the signal stack too. Introduce also a new user struct for VFP exception registers. In this too fields not relevant to the current VFP architecture are ignored. Support to save / restore the exception registers was added by Will Deacon. Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6050/1: VFP: fix the SMP versions of vfp_{sync,flush}_hwstateImre Deak2010-04-141-21/+10
| | | | | | | | | | | | | | | | | | | | | | From: Imre Deak <imre.deak@nokia.com> Recently the UP versions of these functions were refactored and as a side effect it became possible to call them for the current thread. This isn't true for the SMP versions however, so fix this up. Signed-off-by: Imre Deak <imre.deak@nokia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6007/1: fix highmem with VIPT cache and DMANicolas Pitre2010-04-146-20/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VIVT cache of a highmem page is always flushed before the page is unmapped. This cache flush is explicit through flush_cache_kmaps() in flush_all_zero_pkmaps(), or through __cpuc_flush_dcache_area() in kunmap_atomic(). There is also an implicit flush of those highmem pages that were part of a process that just terminated making those pages free as the whole VIVT cache has to be flushed on every task switch. Hence unmapped highmem pages need no cache maintenance in that case. However unmapped pages may still be cached with a VIPT cache because the cache is tagged with physical addresses. There is no need for a whole cache flush during task switching for that reason, and despite the explicit cache flushes in flush_all_zero_pkmaps() and kunmap_atomic(), some highmem pages that were mapped in user space end up still cached even when they become unmapped. So, we do have to perform cache maintenance on those unmapped highmem pages in the context of DMA when using a VIPT cache. Unfortunately, it is not possible to perform that cache maintenance using physical addresses as all the L1 cache maintenance coprocessor functions accept virtual addresses only. Therefore we have no choice but to set up a temporary virtual mapping for that purpose. And of course the explicit cache flushing when unmapping a highmem page on a system with a VIPT cache now can go, which should increase performance. While at it, because the code in __flush_dcache_page() has to be modified anyway, let's also make sure the mapped highmem pages are pinned with kmap_high_get() for the duration of the cache maintenance operation. Because kunmap() does unmap highmem pages lazily, it was reported by Gary King <GKing@nvidia.com> that those pages ended up being unmapped during cache maintenance on SMP causing segmentation faults. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 5975/1: AT91 slow-clock suspend: don't wait when turning PLLs offAnders Larsen2010-04-141-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Julien Langer <julien.langer@gmail.com> AT91: when turning off the PLLs during suspend, don't wait for the lock flag to be set. Previously the code would always run into the loop limitation of 1000 iterations because the flag is never set when turning the PLLs off. Comments from Anders Larsen: (in http://marc.info/?l=linux-kernel&m=127058929724193&w=2) Signed-off-by: Julien Langer <julien.langer@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Acked-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2010-04-156-28/+67
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86/gart: Disable GART explicitly before initialization dma-debug: Cleanup for copy-loop in filter_write() x86/amd-iommu: Remove obsolete parameter documentation x86/amd-iommu: use for_each_pci_dev Revert "x86: disable IOMMUs on kernel crash" x86/amd-iommu: warn when issuing command to uninitialized cmd buffer x86/amd-iommu: enable iommu before attaching devices x86/amd-iommu: Use helper function to destroy domain x86/amd-iommu: Report errors in acpi parsing functions upstream x86/amd-iommu: Pt mode fix for domain_destroy x86/amd-iommu: Protect IOMMU-API map/unmap path x86/amd-iommu: Remove double NULL check in check_device
| * \ Merge branch 'iommu/fixes' of ↵Ingo Molnar2010-04-136-28/+67
| |\ \ | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into x86/urgent
| | * | x86/gart: Disable GART explicitly before initializationJoerg Roedel2010-04-072-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we boot into a crash-kernel the gart might still be enabled and its caches might be dirty. This can result in undefined behavior later. Fix it by explicitly disabling the gart hardware before initialization and flushing the caches after enablement. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | * | Merge branch 'amd-iommu/fixes' into iommu/fixesJoerg Roedel2010-04-074-27/+50
| | |\ \
| | | * | x86/amd-iommu: use for_each_pci_devChris Wright2010-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace open coded version with for_each_pci_dev Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | Revert "x86: disable IOMMUs on kernel crash"Chris Wright2010-04-071-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This effectively reverts commit 61d047be99757fd9b0af900d7abce9a13a337488. Disabling the IOMMU can potetially allow DMA transactions to complete without being translated. Leave it enabled, and allow crash kernel to do the IOMMU reinitialization properly. Cc: stable@kernel.org Cc: Joerg Roedel <joerg.roedel@amd.com> Cc: Eric Biederman <ebiederm@xmission.com> Cc: Neil Horman <nhorman@tuxdriver.com> Cc: Vivek Goyal <vgoyal@redhat.com> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: warn when issuing command to uninitialized cmd bufferChris Wright2010-04-073-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To catch future potential issues we can add a warning whenever we issue a command before the command buffer is fully initialized. Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: enable iommu before attaching devicesChris Wright2010-04-071-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hit another kdump problem as reported by Neil Horman. When initializaing the IOMMU, we attach devices to their domains before the IOMMU is fully (re)initialized. Attaching a device will issue some important invalidations. In the context of the newly kexec'd kdump kernel, the IOMMU may have stale cached data from the original kernel. Because we do the attach too early, the invalidation commands are placed in the new command buffer before the IOMMU is updated w/ that buffer. This leaves the stale entries in the kdump context and can renders device unusable. Simply enable the IOMMU before we do the attach. Cc: stable@kernel.org Cc: Neil Horman <nhorman@tuxdriver.com> Cc: Vivek Goyal <vgoyal@redhat.com> Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Use helper function to destroy domainJoerg Roedel2010-03-081-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the amd_iommu_domain_destroy the protection_domain_free function is partly reimplemented. The 'partly' is the bug here because the domain is not deleted from the domain list. This results in use-after-free errors and data-corruption. Fix it by just using protection_domain_free instead. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Report errors in acpi parsing functions upstreamJoerg Roedel2010-03-011-11/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since acpi_table_parse ignores the return values of the parsing function this patch introduces a workaround and reports these errors upstream via a global variable. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Pt mode fix for domain_destroyChris Wright2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After a guest is shutdown, assigned devices are not properly returned to the pt domain. This can leave the device using stale cached IOMMU data, and result in a non-functional device after it's re-bound to the host driver. For example, I see this upon rebinding: AMD-Vi: Event logged [IO_PAGE_FAULT device=02:00.0 domain=0x0000 address=0x000000007e2a8000 flags=0x0050] AMD-Vi: Event logged [IO_PAGE_FAULT device=02:00.0 domain=0x0000 address=0x000000007e2a8040 flags=0x0050] AMD-Vi: Event logged [IO_PAGE_FAULT device=02:00.0 domain=0x0000 address=0x000000007e2a8080 flags=0x0050] AMD-Vi: Event logged [IO_PAGE_FAULT device=02:00.0 domain=0x0000 address=0x000000007e2a80c0 flags=0x0050] 0000:02:00.0: eth2: Detected Hardware Unit Hang: ... The amd_iommu_destroy_domain() function calls do_detach() which doesn't reattach the pt domain to the device. Use __detach_device() instead. Cc: stable@kernel.org Signed-off-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Protect IOMMU-API map/unmap pathJoerg Roedel2010-03-012-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a mutex to lock page table updates in the IOMMU-API path. We can't use the spin_lock here because this patch might sleep. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| | | * | x86/amd-iommu: Remove double NULL check in check_deviceJulia Lawall2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev was tested just above, so drop the second test. Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | | | | Merge git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linusLinus Torvalds2010-04-143-38/+54
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus: lguest: stop using KVM hypercall mechanism lguest: workaround cmpxchg8b_emu by ignoring cli in the guest.
| * | | | | lguest: stop using KVM hypercall mechanismRusty Russell2010-04-143-38/+54
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a partial revert of 4cd8b5e2a159 "lguest: use KVM hypercalls"; we revert to using (just as questionable but more reliable) int $15 for hypercalls. I didn't revert the register mapping, so we still use the same calling convention as kvm. KVM in more recent incarnations stopped injecting a fault when a guest tried to use the VMCALL instruction from ring 1, so lguest under kvm fails to make hypercalls. It was nice to share code with our KVM cousins, but this was overreach. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Matias Zabaljauregui <zabaljauregui@gmail.com> Cc: Avi Kivity <avi@redhat.com>
* | | | | m68k: Fix asm constraints for atomic_sub_and_test() and atomic_add_negative()Geert Uytterhoeven2010-04-141-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recently, we started seeing this on allmodconfig builds: CC mm/memcontrol.o {standard input}: Assembler messages: {standard input}:4076: Error: operands mismatch -- statement `subl 12(%fp),170(%a0)' ignored Correct the asm constraint, like done for m68knommu. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | | | | m68k: Fix `struct sigcontext' for ColdFireMaxim Kuvyrkov2010-04-141-3/+1
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LibSegFault uses piggybacks sc_fpstate field of the `struct sigcontext' and this patch avoids LibSegFault overflowing this field. Also this removes an unnecessary divergence from classic m68k. Signed-off-by: Maxim Kuvyrkov <maxim@codesourcery.com> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | | | sparc64: Add some more commentary to __raw_local_irq_save()David S. Miller2010-04-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Suggested by Peter Zijlstra Signed-off-by: David S. Miller <davem@davemloft.net>
* | | | Merge branch 'master' of /home/davem/src/GIT/linux-2.6/David S. Miller2010-04-13624-966/+2090
|\| | | | | | | | | | | | | | | | | | | Conflicts: lib/Kconfig.debug
| * | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-04-1219-77/+412
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: (21 commits) ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lock ARM: 6031/1: fix Thumb-2 decompressor ARM: 6029/1: ep93xx: gpio.c: local functions should be static ARM: 6028/1: ARM: add MAINTAINERS for U300 ARM: 6024/1: bcmring: fix missing down on semaphore in dma.c MXC: mach_armadillo5x0: Add USB Host support. ARM mach-mx3: duplicated include ARM mach-mx3: duplicated include imx31: add watchdog device on litekit board. imx3: Add watchdog platform device support MXC: mach-mx31_3ds: add support for freescale mc13783 power management device. MXC: mach-mx31_3ds: Add SPI1 device support. MXC: mach-mx31_3ds: Add support for on board NAND Flash. MXC: mach-mx31_3ds: Update variable names over recent mach name modification. imx31: fix parent clock for rtc i.MX51: remove NFC AXI static mapping i.MX51: determine silicon revision dynamically i.MX51: map TZIC dynamically i.MX51: Use correct clock for gpt ...
| | * | | ARM: Fix ioremap_cached()/ioremap_wc() for SMP platformsRussell King2010-04-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Write combining/cached device mappings are not setting the shared bit, which could potentially cause problems on SMP systems since the cache lines won't participate in the cache coherency protocol. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
| | * | | ARM: 6043/1: AT91 slow-clock resume: Don't wait for a disabled PLL to lockAnders Larsen2010-04-091-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | at91 slow-clock resume: Don't wait for a disabled PLL to lock. We run into this problem with the PLLB on the at91: ohci-at91 disables the PLLB when going to suspend. The slowclock code however tries to do the same: It saves the PLLB register value and when restoring the value during resume, it waits for the PLLB to lock again. However the PLL will never lock and the loop would run into its timeout because the slowclock code just stored and restored an empty register. This fixes the problem by only restoring PLLA/PLLB when they were enabled at suspend time. Cc: Andrew Victor <avictor.za@gmail.com> Signed-off-by: Anders Larsen <al@alarsen.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6Russell King2010-04-0814-70/+382
| | |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-mx3/mach-pcm037.c
| | | * | | MXC: mach_armadillo5x0: Add USB Host support.Alberto Panizzo2010-03-302-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add USB Host capability. The Armadillo 500 board is supplied with two USB Host connectors driven by the USB OTG and USB Host 2 ports, through two NXP isp 1504 transceivers. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | ARM mach-mx3: duplicated includeAndrea Gelmini2010-03-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-mx3/mx31lite-db.c: linux/platform_device.h is included more than once. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | ARM mach-mx3: duplicated includeAndrea Gelmini2010-03-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-mx3/mach-pcm037.c: linux/fsl_devices.h is included more than once. Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | imx31: add watchdog device on litekit board.Vladimir Zapolskiy2010-03-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for SoC build-in watchdog device on litekit board. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | imx3: Add watchdog platform device supportVladimir Zapolskiy2010-03-302-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for build-in watchdog device found on Freescale imx31 and imx35 SoCs. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | Merge branch 'mx51' into mxc-rcSascha Hauer2010-03-255-41/+83
| | | |\ \ \
| | | | * | | i.MX51: remove NFC AXI static mappingSascha Hauer2010-03-192-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This area contains the Nand Flash controller registers. There is no need to map them statically as the Nand driver uses ioremap(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | | * | | i.MX51: determine silicon revision dynamicallySascha Hauer2010-03-192-6/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale redboot passes the silicon revision via ATAG_REVISION. Remove this bootloader dependency by doing the same as redboot does in the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | | * | | i.MX51: map TZIC dynamicallySascha Hauer2010-03-192-22/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This looks cleaner and allows us to call mx51_revision later when we can use ioremap to determine the silicon revision dynamically. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | | * | | i.MX51: Use correct clock for gptSascha Hauer2010-03-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpt uses the ipg clock, not ipg_perclk Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | | * | | i.MX51 Babbage: Add uncompress outputSascha Hauer2010-03-191-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | | MXC: mach-mx31_3ds: add support for freescale mc13783 power management device.Alberto Panizzo2010-03-251-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Power Gates must to be always enabled. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | | MXC: mach-mx31_3ds: Add SPI1 device support.Alberto Panizzo2010-03-251-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | | MXC: mach-mx31_3ds: Add support for on board NAND Flash.Alberto Panizzo2010-03-252-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the using of Bad Block Table is not constantly a good behave I had made it configurable. Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | | MXC: mach-mx31_3ds: Update variable names over recent mach name modification.Alberto Panizzo2010-03-252-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alberto Panizzo <maramaopercheseimorto@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | | * | | | imx31: fix parent clock for rtcVladimir Zapolskiy2010-03-251-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to imx31 reference manual the signal from external low frequency clock is sent to RTC clock. The patch makes redundant the previously defined mxc_rtc clock. Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | | | ARM: 6031/1: fix Thumb-2 decompressorRabin Vincent2010-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 98e12b5a6e05413 ("ARM: Fix decompressor's kernel size estimation for ROM=y") broke the Thumb-2 decompressor because it added an entry in the LC0 table but didn't adjust the offset the Thumb-2 code uses to load the SP from that table. Fix it. Cc: stable <stable@kernel.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | | ARM: 6029/1: ep93xx: gpio.c: local functions should be staticHartley Sweeten2010-04-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions ep93xx_gpio_update_int_params and ep93xx_gpio_int_mask are not exported and should be static. This was overlooked when moving the code from core.c. Also, change a comment to better indicate what the code is for. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | | | | ARM: 6024/1: bcmring: fix missing down on semaphore in dma.cLeo Chen2010-04-071-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added missing down on the memMap->lock semaphore. Also fixed a return statement so that we always exit with an up (i.e. early exit via return is not allowed) Signed-off-by: Leo Hao Chen <leochen@broadcom.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | MIPS: Calculate proper ebase value for 64-bit kernelsDavid Daney2010-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they are the same thing, for a 64-bit kernel they are not. It happens to kind of work on a 64-bit kernel as they both reference the same physical memory. However since the CPU uses the CKSEG0 base, determining if a J instruction will reach always gives the wrong result unless we use the same number the CPU uses. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1093/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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