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git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Benjamin Herrenschmidt:
"So from the depth of frozen Minnesota, here's the powerpc pull request
for 3.9. It has a few interesting highlights, in addition to the
usual bunch of bug fixes, minor updates, embedded device tree updates
and new boards:
- Hand tuned asm implementation of SHA1 (by Paulus & Michael
Ellerman)
- Support for Doorbell interrupts on Power8 (kind of fast
thread-thread IPIs) by Ian Munsie
- Long overdue cleanup of the way we handle relocation of our open
firmware trampoline (prom_init.c) on 64-bit by Anton Blanchard
- Support for saving/restoring & context switching the PPR (Processor
Priority Register) on server processors that support it. This
allows the kernel to preserve thread priorities established by
userspace. By Haren Myneni.
- DAWR (new watchpoint facility) support on Power8 by Michael Neuling
- Ability to change the DSCR (Data Stream Control Register) which
controls cache prefetching on a running process via ptrace by
Alexey Kardashevskiy
- Support for context switching the TAR register on Power8 (new
branch target register meant to be used by some new specific
userspace perf event interrupt facility which is yet to be enabled)
by Ian Munsie.
- Improve preservation of the CFAR register (which captures the
origin of a branch) on various exception conditions by Paulus.
- Move the Bestcomm DMA driver from arch powerpc to drivers/dma where
it belongs by Philippe De Muyter
- Support for Transactional Memory on Power8 by Michael Neuling
(based on original work by Matt Evans). For those curious about
the feature, the patch contains a pretty good description."
(See commit db8ff907027b: "powerpc: Documentation for transactional
memory on powerpc" for the mentioned description added to the file
Documentation/powerpc/transactional_memory.txt)
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (140 commits)
powerpc/kexec: Disable hard IRQ before kexec
powerpc/85xx: l2sram - Add compatible string for BSC9131 platform
powerpc/85xx: bsc9131 - Correct typo in SDHC device node
powerpc/e500/qemu-e500: enable coreint
powerpc/mpic: allow coreint to be determined by MPIC version
powerpc/fsl_pci: Store the pci ctlr device ptr in the pci ctlr struct
powerpc/85xx: Board support for ppa8548
powerpc/fsl: remove extraneous DIU platform functions
arch/powerpc/platforms/85xx/p1022_ds.c: adjust duplicate test
powerpc: Documentation for transactional memory on powerpc
powerpc: Add transactional memory to pseries and ppc64 defconfigs
powerpc: Add config option for transactional memory
powerpc: Add transactional memory to POWER8 cpu features
powerpc: Add new transactional memory state to the signal context
powerpc: Hook in new transactional memory code
powerpc: Routines for FP/VSX/VMX unavailable during a transaction
powerpc: Add transactional memory unavaliable execption handler
powerpc: Add reclaim and recheckpoint functions for context switching transactional memory processes
powerpc: Add FP/VSX and VMX register load functions for transactional memory
powerpc: Add helper functions for transactional memory context switching
...
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Disable hard IRQ before kexec a new kernel image.
Not doing it can result in corrupted data in the memory segments
reserved for the new kernel.
Signed-off-by: Phileas Fogg <phileas-fogg@mail.ru>
CC: <stable@vger.kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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<<
Please pull mpc5xxx patches for v3.9. The bestcomm driver is
moved to drivers/dma (so it will be usable for ColdFire).
mpc5121 now provides common dtsi file and existing mpc5121 device
trees use it. There are some minor clock init and sparse fixes
and updates for various 5200 device tree files from Grant. Some
fixes for bugs in the mpc5121 DIU driver are also included here
(Andrew Morton suggested to push them via my mpc5xxx tree).
>>
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The DTC labels feature allows a dts file to reference a node without
having to reproduce the entire node hierarchy above it. We can use this
to simplify the MPC5200 board dts files by referencing the gpt nodes by
label.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
[agust: fixed gpt7 phandle in the csi node of o2d.dtsi]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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The Lite5200 evaluation board has a number of debug LEDs that Linux
doesn't know about yet. This change adds a gpio-leds stanza to the
lite5200 device tree so that the correct driver can get hooked up.
Also, make use of the dtc labels feature to reduce the number of source
lines required to add the gpio-controller property to the general
purpose timer nodes. In addition, the required #gpio-cells properties
are added to the common mpc5200b dtsi include file so that each board
doesn't need to add them explicitly. This still doesn't enable gpio
mode, 'gpio-controller' is required for that, but it means less work
needs to be done by board ports.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Fix warning:
symbol 'mpc5xxx_get_bus_frequency' was not declared. Should it be static?
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Fix warnings:
symbol 'clockctl' was not declared. Should it be static?
symbol 'rate_clks' was not declared. Should it be static?
symbol 'dev_clks' was not declared. Should it be static?
symbol 'mpc5121_clk_init' was not declared. Should it be static?
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Fix:
warning: dereference of noderef expression
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Add ability to configure chip select (CS) parameters for devices
that need different CS parameters setup after their configuration.
I.e. an FPGA device on LP bus can require different CS parameters
for its bus interface after loading firmware into it. A driver
can easily reconfigure the LPC CS parameters using this function.
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Early driver probing can fail due to not available clocks
(clk_get() fails) since the clk API init didn't take place yet.
Move clocks init before bus probing.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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The .dtsi now names all PSC nodes as "psc", so this ac97
check won't work. Check for ac97 PSC using compatible
property.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Don't use cell-index from device tree, obtain the PSC number
from PSCx register offset.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Change dts file for pdm360ng board to use common mpc5121
SoC dtsi file.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Provide common mpc5121.dtsi file for mpc5121 SoC and modify
mpc5121ads.dts to use mpc5121.dtsi.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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The bestcomm dma hardware, and some of its users like the FEC ethernet
component, is used in different FreeScale parts, including non-powerpc
parts like the ColdFire MCF547x & MCF548x families. Don't keep the
driver hidden in arch/powerpc where it is inaccessible for other arches.
.c files are moved to drivers/dma/bestcomm, while .h files are moved to
include/linux/fsl/bestcomm. Makefiles, Kconfigs and #include directives
are updated for the new file locations.
Tested by recompiling for MPC5200 with all bestcomm users enabled.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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<<
Mostly misc code cleanups in various board ports and adding support for a
new MPC85xx board - ppa8548.
>>
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Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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BSC9131RDB doesn't have SDHC enabled. As a result of this typo,
the node was not getting disabled from the device tree which was
leading to linux hang during bootup
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The MPIC code will disable coreint if it detects an insufficient
MPIC version.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This will be used by the qemu-e500 platform, as the MPIC version (and
thus whether we have coreint) depends on how QEMU is configured.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The pci controller structure has a provision to store the device structure
pointer of the corresponding platform device. Currently this information is
not stored during fsl pci controller initialization. This information is
required while dealing with iommu groups for pci devices connected to the
fsl pci controller. For the case where the pci devices can't be paritioned,
they would fall under the same device group as the pci controller.
This patch stores the platform device information in the pci controller
structure during initialization.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Initial board support for the Prodrive PPA8548 AMC module. Board
is an MPC8548 AMC platform used in RapidIO systems. This module is
also used to test/work on mainline linux RapidIO software.
PPA8548 overview:
- 1.3 GHz Freescale PowerQUICC III MPC8548 processor
- 1 GB DDR2 @ 266 MHz
- 8 MB NOR flash
- Serial RapidIO 1.2
- 1 x 10/100/1000 BASE-T front ethernet
- 1 x 1000 BASE-BX ethernet on AMC connector
Signed-off-by: Stef van Os <stef.van.os@prodrive.nl>
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Freescale DIU driver was recently updated to not require every DIU
platform function, so now we can remove the unneeded functions from
some boards.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Delete successive tests to the same location. The code tested the result
of a previous call, that itself was already tested. It is changed to test
the result of the most recent call.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)
// <smpl>
@s exists@
local idexpression y;
expression x,e;
@@
*if ( \(x == NULL\|IS_ERR(x)\|y != 0\) )
{ ... when forall
return ...; }
... when != \(y = e\|y += e\|y -= e\|y |= e\|y &= e\|y++\|y--\|&y\)
when != \(XT_GETPAGE(...,y)\|WMI_CMD_BUF(...)\)
*if ( \(x == NULL\|IS_ERR(x)\|y != 0\) )
{ ... when forall
return ...; }
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This facilitates getting the physical address of the SEC node.
Signed-off-by: Liu po <po.liu@freescale.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Synchronize this defconfig with latest kernel version.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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There is no point in applying this quirk when par_io is not present.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Move the code for this quirk to a dedicated function.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix and/or improve the compatible strings of the PCI device tree nodes for
some Freescale SOCs. This fixes some issues and improves consistency among
the SOCs.
Specifically:
1) The P1022 has a v1 PCIe controller, so the compatible property should just
say "fsl,mpc8548-pcie". U-Boot does not look for "fsl,p1022-pcie", so it
wasn't fixing up the node.
2) The P4080 has a v2.1 PCIe controller, so add that version-specific string
to the device tree. Update the kernel to also look for that string.
Currently, the kernel looks for "fsl,p4080-pcie" specifically, but
eventually that check should be deleted.
3) The P1010 device tree claims compatibility with v2.2 and v2.3, but that's
redundant. No other device tree does this. Remove the v2.2 string.
4) The kernel looks for both "fsl,p1023-pcie" and "fsl,qoriq-pcie-v2.2",
even though the P1023 device trees has always included both strings. Remove
the search for "fsl,p1023-pcie".
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The PAMU caches use the LIODNs to determine which cache lines hold the
entries for the corresponding LIODs. The LIODNs must therefore be
carefully assigned to avoid cache thrashing -- two active LIODs with
LIODNs that put them in the same cache line.
Currently, LIODNs are statically assigned by U-Boot, but this has
limitations. LIODNs are assigned even for devices that may be disabled
or unused by the kernel. Static assignments also do not allow for device
drivers which may know which LIODs can be used simultaneously. In
other words, we really should assign LIODNs dynamically in Linux.
To do that, we need to describe the PAMU device and cache topologies in
the device trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Stuart Yoder <stuart.yoder@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This board has soldered on flash, and a SODIMM flash module.
Both can be used for booting, via switching JP12 and SW2.8
and using the sbc8548-altflash.dts when booting from SODIMM.
Here we enable MTD in kernel so that we can see the bootloader
(and other flash sectors) from linux.
Normal configuration:
root@sbc8548:~# cat /proc/mtd
dev: size erasesize name
mtd0: 007a0000 00020000 "space"
mtd1: 00060000 00020000 "bootloader"
mtd2: 03f00000 00080000 "space"
mtd3: 00100000 00080000 "bootloader"
root@sbc8548:~# dd if=/dev/mtd1 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 4a 61 6e 20 31 39 |10-dirty (Jan 19|
00000020 20 32 30 31 33 20 2d 20 31 39 3a 34 30 3a 31 31 | 2013 - 19:40:11|
00000030
root@sbc8548:~# dd if=/dev/mtd3 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 44 65 63 20 31 33 |10-dirty (Dec 13|
00000020 20 32 30 31 32 20 2d 20 31 35 3a 30 30 3a 30 37 | 2012 - 15:00:07|
00000030
root@sbc8548:~#
Alternate configuration, with sbc8548-altflash.dts:
root@sbc8548:~# cat /proc/mtd
dev: size erasesize name
mtd0: 03f00000 00080000 "space"
mtd1: 00100000 00080000 "bootloader"
mtd2: 007a0000 00020000 "space"
mtd3: 00060000 00020000 "bootloader"
root@sbc8548:~# dd if=/dev/mtd1 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 44 65 63 20 31 33 |10-dirty (Dec 13|
00000020 20 32 30 31 32 20 2d 20 31 35 3a 30 30 3a 30 37 | 2012 - 15:00:07|
00000030
root@sbc8548:~# dd if=/dev/mtd3 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 4a 61 6e 20 31 39 |10-dirty (Jan 19|
00000020 20 32 30 31 33 20 2d 20 31 39 3a 34 30 3a 31 31 | 2013 - 19:40:11|
00000030
root@sbc8548:~#
Note that in the latter, the larger SODIMM device appears 1st,
as mtd0 and mtd1, as indicated in the sizes, and in the date
of the u-boot image.
The kernel configuration is the same in both cases; only the dtb
needs to be changed in accordance with the JP12/SW2.8 settings.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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By moving the two JP12 jumpers 90 degrees, and switching the
setting of SW2.8, the sbc8548 can be configured to boot off
the alternate 64MB SODIMM, which when populated with u-boot
can be a handy recovery option, in case the u-boot in the
8MB soldered on flash gets corrupted. Here we add an alternate
dts file to match that configuration.
To better highlight the differences, the output from the u-boot
"fli" command is shown for the normal configuration and then
the alternate configuration.
Normal:
-----------------------
Bank # 1: CFI conformant flash (8 x 8) Size: 8 MB in 64 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
FF800000 E FF820000 E FF840000 E FF860000 E FF880000 E
[...]
FFEE0000 E FFF00000 E FFF20000 E FFF40000 E FFF60000 E
FFF80000 FFFA0000 RO FFFC0000 RO FFFE0000 RO
Bank # 2: CFI conformant flash (32 x 8) Size: 64 MB in 128 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
EC000000 E EC080000 E EC100000 E EC180000 E EC200000 E
[...]
EFC00000 E EFC80000 E EFD00000 E EFD80000 E EFE00000 E
EFE80000 E EFF00000 EFF80000
-----------------------
Alternate:
-----------------------
Bank # 1: CFI conformant flash (32 x 8) Size: 64 MB in 128 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
FC000000 E FC080000 E FC100000 E FC180000 E FC200000 E
[...]
FFC00000 E FFC80000 E FFD00000 E FFD80000 E FFE00000 E
FFE80000 E FFF00000 RO FFF80000 RO
Bank # 2: CFI conformant flash (8 x 8) Size: 8 MB in 64 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
EF800000 E EF820000 E EF840000 E EF860000 E EF880000 E
[...]
EFEE0000 E EFF00000 E EFF20000 E EFF40000 E EFF60000 E
EFF80000 E EFFA0000 EFFC0000 EFFE0000
-----------------------
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The original memory map for the sbc8548 had the 64MB SODIMM flash
device misaligned by 8MB to allow a window of address space for
the soldered on 8MB device -- i.e.
start end CS<n> width Desc.
----------------------------------------------------------
fb80_0000 ff7f_ffff CS6 32 SODIMM flash (64MB)
ff80_0000 ffff_ffff CS0 8 Boot flash (8MB)
However, if we want to change the configuration so that it boots
off the 64MB flash, it is in turn then aligned with a 64MB boundary,
starting at fc00_0000 (and the 8MB @ fb80_0000 -> fbff_ffff).
This makes for complicated updates, since what is the beginning
of the physical device is 8MB into its address space in the default
configuration shown above.
This issue was fixed as of u-boot commit 3fd673cf363bc86ed42eff713d4
("sbc8548: relocate 64MB user flash to sane boundary") -- in which
the SODIMM was mapped to ec00_0000 (natively aligned under efff_ffff)
and so when JP12/SW2.8 are switched, it will be a a simple 0xec --> 0xfc
mapping between the two instances.
Here we make the associated changes in the localbus flash memory
map in the dts file: indicating the 64MB device starts at ec00_0000
and that the tail end of the 64MB device (last 2 sectors) can contain
a bootloader image.
The partitions for both flash devices get a clean-up; there were
non-meaningful assignments in there that probably originated from
the MPC8548CDS on which the file was based on. Now there is just
the categorization of free space and bootloader images.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Updates to u-boot allow this board to boot off of either
the 8MB soldered on flash, or the 64MB SODIMM flash.
This is achieved by changing JP12 and SW2.8 which in turn
swaps which flash device appears on /CS0 and /CS6 respectively.
Since the flash devices are not the same size, this also
changes the MTD memory map layout on the local bus.
Here we split the common chunks out into a pre and post
include, so they can be reused by an upcoming "alternative
boot" dts file; leaving only the local bus chunk behind.
No content changes are made at this point - it is just purely
the move to using include files.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Use for_each_compatible_node() macro instead of open coding it.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_msi.c:31:1: warning: symbol 'msi_head' was not declared. Should it be static?
arch/powerpc/sysdev/fsl_msi.c:138:40: warning: incorrect type in argument 1 (different base types)
arch/powerpc/sysdev/fsl_msi.c:138:40: expected restricted __be64 const [usertype] *p
arch/powerpc/sysdev/fsl_msi.c:138:40: got unsigned long long const [usertype] *[assigned] reg
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_ifc.c:66:38: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_ifc.c:66:38: expected restricted __be32 [usertype] cspr
arch/powerpc/sysdev/fsl_ifc.c:66:38: got unsigned int
arch/powerpc/sysdev/fsl_ifc.c:67:21: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_ifc.c:67:39: warning: restricted __be32 degrades to integer
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_soc.c:70:67: warning: incorrect type in argument 2 (different base types)
arch/powerpc/sysdev/fsl_soc.c:70:67: expected restricted __be32 const [usertype] *addr
arch/powerpc/sysdev/fsl_soc.c:70:67: got unsigned int const [usertype] *
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_lbc.c:77:36: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_lbc.c:77:36: expected restricted __be32 [usertype] br
arch/powerpc/sysdev/fsl_lbc.c:77:36: got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:78:36: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_lbc.c:78:36: expected restricted __be32 [usertype] or
arch/powerpc/sysdev/fsl_lbc.c:78:36: got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:80:21: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:80:38: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:111:12: warning: incorrect type in assignment (different base types)
arch/powerpc/sysdev/fsl_lbc.c:111:12: expected restricted __be32 [usertype] br
arch/powerpc/sysdev/fsl_lbc.c:111:12: got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:113:17: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:127:17: warning: restricted __be32 degrades to integer
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Kconfig option for transactional memory on powerpc.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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This adds the new transactional memory archtected state to the signal context
in both 32 and 64 bit.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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This hooks the new transactional memory code into context switching, FP/VMX/VMX
unavailable and exception return.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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We do lazy FP but not lazy TM (ie. userspace starts with MSR TM=1 FP=0). Hence
if userspace does an FP instruction during a transaction, we'll take an
fp unavailable exception.
This adds functions needed to handle this case. We have to inject the current
FP state into the checkpoint so that the hardware can decide what to do with
the transaction. We can't inject only the FP so we have to do a full treclaim
and recheckpoint to inject just the FP state. This will cause the transaction
to be marked as aborted by the hardware.
This just add the routines needed to do this for FP, VMX and VSX. It doesn't
hook them into the rest of the code yet.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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These should never happen since we always turn on MSR TM when in userspace. We
don't do lazy TM.
Hence if we hit this, we barf and kill the task as something's gone horribly
wrong.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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transactional memory processes
When we switch out a task, we need to save both the checkpointed and the
speculated state into the thread struct.
Similarly when we are switching in a task we need to load both the checkpointed
and speculated state. If the task was using FP, we non-lazily reload both the
original and the speculative FP register states. This is because the kernel
doesn't see if/when a TM rollback occurs, so if we take an FP unavoidable
later, we are unable to determine which set of FP regs need to be restored.
This simply adds these functions. It doesn't hook them into the existing code
yet.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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This adds functions to restore the state of the FP/VSX registers from
what's stored in the thread_struct. Two version for FP/VSX are required
since one restores them from transactional/checkpoint side of the
thread_struct and the other from the speculated side.
Similar functions are added for VMX registers.
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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