summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* [NET]: X86_64 checksum annotations and cleanups.Al Viro2006-12-022-19/+25
| | | | | | | | * sanitize prototypes, annotate * usual ntohs->shift Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: V850 checksum annotations and cleanups.Al Viro2006-12-022-14/+14
| | | | | | | | | * sanitize prototypes, annotate * collapse csum_partial_copy * usual ntohs->shift Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: UML checksum annotations and cleanups.Al Viro2006-12-022-68/+53
| | | | | | | | | | * sanitize prototypes, annotate * kill csum_partial_copy_fromuser * kill shift-by-16 in checksum calculations * ntohs->shift in checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: SH64 checksum annotations and cleanups.Al Viro2006-12-022-33/+18
| | | | | | | | | | * sanitize prototypes, annotate * collapse csum_partial_copy * kill csum_partial_copy_fromuser * ntohs->shift in checksum calculation Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: PARISC checksum annotations and cleanups.Al Viro2006-12-021-7/+10
| | | | | | | | * sanitized prototypes, annotated * kill shift-by-16 in checksum calculation Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: MIPS checksum annotations and cleanups.Al Viro2006-12-021-4/+4
| | | | | | | | | * sanitize prototypes, annotate * kill shift-by-16 in checksum calculations * htons->shift in l-e checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: M68Knommu checksum annotations and cleanups.Al Viro2006-12-022-15/+15
| | | | | | | | * sanitize prototypes, annotated * collapsed csum_partial_copy() Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: M68K checksum annotations and cleanups.Al Viro2006-12-021-7/+6
| | | | | | | * sanitize prototypes, annotate Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: M32R checksum annotations and cleanups.Al Viro2006-12-021-7/+5
| | | | | | | | | * sanitize prototypes, annotate * ntohs -> shift in checksum calculations in l-e case * kill shift-by-16 in checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: IA64 checksum annotations and cleanups.Al Viro2006-12-022-42/+27
| | | | | | | | | | * sanitize prototypes, annotate * ntohs -> shift in checksum calculations * kill access_ok() in csum_partial_copy_from_user * collapse do_csum_partial_copy_from_user Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: H8300 checksum annotations and cleanups.Al Viro2006-12-022-13/+18
| | | | | | | | | | * sanitize prototypes and annotate * collapse csum_partial_copy NB: csum_partial() is almost certainly still buggy. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: FRV checksum annotations.Al Viro2006-12-021-12/+12
| | | | | | | | * sanitize prototypes and annotate * collapse csum_partial_copy Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: Cris checksum annotations and cleanups.Al Viro2006-12-021-30/+32
| | | | | | | | | * sanitize prototypes and annotate * kill cast-as-lvalue abuses in csum_partial() * usual ntohs-equals-shift for checksum purposes Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: Alpha checksum annotations and cleanups.Al Viro2006-12-022-42/+26
| | | | | | | | | | | | * sanitize prototypes and annotate * kill useless access_ok() in csum_partial_copy_from_user() (the only caller checks it already). * do_csum_partial_copy_from_user() is not needed now * replace htons(len) with len << 8 - they are the same wrt checksums on little-endian. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* [NET]: Kill direct includes of asm/checksum.hAl Viro2006-12-022-2/+0
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'release' of ↵Linus Torvalds2006-12-021-5/+5
|\ | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6 * 'release' of master.kernel.org:/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: Revert "ACPI: SCI interrupt source override"
| * Revert "ACPI: SCI interrupt source override"Len Brown2006-12-021-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 281ea49b0c294649a6de47a6f8fbe5611137726b, which broke ACPI Interrupt source overrides that move the SCI from one IRQ in PIC mode to another in IOAPIC mode. If the SCI shared an interrupt line with another device, this would result in a "irq 18: nobody cared" type failure. http://bugzilla.kernel.org/show_bug.cgi?id=7601 Signed-off-by: Len Brown <len.brown@intel.com>
* | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2006-12-0179-1945/+909
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
| * | [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.Ralf Baechle2006-11-303-34/+6
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Use conditional traps for BUG_ON on MIPS II and better.Ralf Baechle2006-11-301-4/+10
| | | | | | | | | | | | | | | | | | | | | This shaves of around 4kB and a few cycles for the average kernel that has CONFIG_BUG enabled. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] mips HPT cleanup: make clocksource_mips publicAtsushi Nemoto2006-11-306-38/+28
| | | | | | | | | | | | | | | | | | | | | | | | Make clocksource_mips public and get rid of mips_hpt_read, mips_hpt_mask. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] do_IRQ cleanupAtsushi Nemoto2006-11-303-20/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have both function and macro version of do_IRQ() and the former is used only by DEC and non-preemptive kernel. This patch makes everyone use the macro version and removes the function version. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.Ralf Baechle2006-11-301-3/+7
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Remove redundant r4k_blast_icache() callsAtsushi Nemoto2006-11-301-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r4k_flush_cache_all() and r4k_flush_cache_mm() case: these are noop if the CPU did not have dc_aliases. It would mean we do not need to care about icache here. r4k_flush_cache_range case: if r4k_flush_cache_mm() did not need to care about icache, it would be same for this function. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Work around bogus gcc warnings.Ralf Baechle2006-11-301-21/+22
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Fix double inclusionsNicolas Kaiser2006-11-304-15/+4
| | | | | | | | | | | | | | | Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irqAtsushi Nemoto2006-11-3027-33/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] IRQ cleanupsAtsushi Nemoto2006-11-3036-1655/+292
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a big irq cleanup patch. * Use set_irq_chip() to register irq_chip. * Initialize .mask, .unmask, .mask_ack field. Functions for these method are already exist in most case. * Do not initialize .startup, .shutdown, .enable, .disable fields if default routines provided by irq_chip_set_defaults() were suitable. * Remove redundant irq_desc initializations. * Remove unnecessary local_irq_save/local_irq_restore, spin_lock. With this cleanup, it would be easy to switch to slightly lightwait irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ(). Though whole this patch is quite large, changes in each irq_chip are not quite simple. Please review and test on your platform. Thanks. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] mips hpt cleanup: get rid of mips_hpt_initAtsushi Nemoto2006-11-302-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently nobody outside time.c require mips_hpt_init(). Remove it and call c0_hpt_timer_init() directly if R4k counter was used for timer interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] PB1200: Remove duplicate definitionsYoichi Yuasa2006-11-301-6/+2
| | | | | | | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Oprofile: kernel support for the R10000.Ralf Baechle2006-11-303-5/+31
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Add support for kexecNicolas Schichan2006-11-308-4/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | A tiny userland application loading the kernel and invoking kexec_load for mips is available here: http://chac.le-poulpe.net/~nico/kexec/kexec-2006-10-18.tar.gz Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Don't print presence of WAIT instruction on bootup.Ralf Baechle2006-11-301-16/+3
| | | | | | | | | | | | | | | | | | Not useful and quite a big of noise on bootup of large systems. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Fast path for rdhwr emulation for TLSAtsushi Nemoto2006-11-302-1/+77
| | | | | | | | | | | | | | | | | | | | | | | | Add special short path for emulationg RDHWR which is used to support TLS. Add an extra prologue for cpu_has_vtag_icache case. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=nAtsushi Nemoto2006-11-306-3/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a patch to load 64-bit modules to CKSEG0 so that can be compiled with -msym32 option. This makes each module ~10% smaller. * introduce MODULE_START and MODULE_END * custom module_alloc() * PGD for modules * change XTLB refill handler synthesizer * enable -msym32 for modules again (revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a) New XTLB refill handler looks like this: 80000080 dmfc0 k0,C0_BADVADDR 80000084 bltz k0,800000e4 # goto l_module_alloc 80000088 lui k1,0x8046 # %high(pgd_current) 8000008c ld k1,24600(k1) # %low(pgd_current) 80000090 dsrl k0,k0,0x1b # l_vmalloc_done: 80000094 andi k0,k0,0x1ff8 80000098 daddu k1,k1,k0 8000009c dmfc0 k0,C0_BADVADDR 800000a0 ld k1,0(k1) 800000a4 dsrl k0,k0,0x12 800000a8 andi k0,k0,0xff8 800000ac daddu k1,k1,k0 800000b0 dmfc0 k0,C0_XCONTEXT 800000b4 ld k1,0(k1) 800000b8 andi k0,k0,0xff0 800000bc daddu k1,k1,k0 800000c0 ld k0,0(k1) 800000c4 ld k1,8(k1) 800000c8 dsrl k0,k0,0x6 800000cc mtc0 k0,C0_ENTRYLO0 800000d0 dsrl k1,k1,0x6 800000d4 mtc0 k1,C0_ENTRYL01 800000d8 nop 800000dc tlbwr 800000e0 eret 800000e4 dsll k1,k0,0x2 # l_module_alloc: 800000e8 bgez k1,80000008 # goto l_vmalloc 800000ec lui k1,0xc000 800000f0 dsubu k0,k0,k1 800000f4 lui k1,0x8046 # %high(module_pg_dir) 800000f8 beq zero,zero,80000000 800000fc nop 80000000 beq zero,zero,80000090 # goto l_vmalloc_done 80000004 daddiu k1,k1,0x4000 80000008 dsll32 k1,k1,0x0 # l_vmalloc: 8000000c dsubu k0,k0,k1 80000010 beq zero,zero,80000090 # goto l_vmalloc_done 80000014 lui k1,0x8046 # %high(swapper_pg_dir) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITEYoichi Yuasa2006-11-304-39/+35
| | | | | | | | | | | | | | | | | | | | | | | | This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Make free_init_pages() arguments to be physical addressesFranck Bui-Huu2006-11-301-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It allows caller of this function to not care about CKSEG0/XKPHYS address mixes. It's now automatically done by free_init_pages(). We can now safely remove hack needed by 64 bit kernels with CONFIG_BUILD_ELF64=n in free_initmem(). Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] setup.c: clean up initrd related codeFranck Bui-Huu2006-11-302-32/+48
| | | | | | | | | | | | | | | Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] setup.c: use __pa_symbol() where neededFranck Bui-Huu2006-11-301-5/+5
| | | | | | | | | | | | | | | | | | | | | It should fix the broken code in resource_init() too. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] setup.c: get ride of CPHYSADDR()Franck Bui-Huu2006-11-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | and use new __pa() implementation instead introduced by the previous patch. Indeed this macro can be used now even by the 64 bit kernels with CONFIG_BUILD_ELF64=n config. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] page.h: remove __pa() usages.Franck Bui-Huu2006-11-301-4/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __pa() was used by virt_to_page() and virt_addr_valid(). These latter are used when kernel is initialised so __pa() is not appropriate, we use virt_to_phys() instead. Futhermore __pa() is going to take care of CKSEG0/XKPHYS address mix for 64 bit kernels. This makes __pa() more complex than virt_to_phys() and this extra work is not needed by virt_to_page() and virt_addr_valid(). Eventually it consolidates virt_to_phys() prototype by making its argument 'const'. this avoids some warnings that was due to some virt_to_page() usages which pass const pointer. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2006-12-0117-700/+1055
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits) PCI: make arch/i386/pci/common.c:pci_bf_sort static PCI: ibmphp_pci.c: fix NULL dereference pciehp: remove unnecessary pci_disable_msi pciehp: remove unnecessary free_irq PCI: rpaphp: change device tree examination PCI: Change memory allocation for acpiphp slots i2c-i801: SMBus patch for Intel ICH9 PCI: irq: irq and pci_ids patch for Intel ICH9 PCI: pci_{enable,disable}_device() nestable ports PCI: switch pci_{enable,disable}_device() to be nestable PCI: arch/i386/kernel/pci-dma.c: ioremap balanced with iounmap pci/i386: style cleanups PCI: Block on access to temporarily unavailable pci device pci: fix __pci_register_driver error handling pci: clear osc support flags if no _OSC method acpiphp: fix missing acpiphp_glue_exit() acpiphp: fix use of list_for_each macro Altix: Initial ACPI support - ROM shadowing. Altix: SN ACPI hotplug support. Altix: Add initial ACPI IO support ...
| * | PCI: make arch/i386/pci/common.c:pci_bf_sort staticAdrian Bunk2006-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes the needlessly global pci_bf_sort static. Signed-off-by: Adrian Bunk <bunk@stusta.de> Acked-by: Matt Domsch <Matt_Domsch@dell.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | PCI: irq: irq and pci_ids patch for Intel ICH9Jason Gaston2006-12-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This updated patch adds the Intel ICH9 LPC and SMBus Controller DID's. Signed-off-by: Jason Gaston <jason.d.gaston@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | PCI: arch/i386/kernel/pci-dma.c: ioremap balanced with iounmapAmol Lad2006-12-011-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ioremap must be balanced by an iounmap and failing to do so can result in a memory leak. Tested (compilation only): - using allmodconfig - making sure the files are compiling without any warning/error due to new changes Signed-off-by: Amol Lad <amol@verismonetworks.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | pci/i386: style cleanupsRandy Dunlap2006-12-011-21/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mostly CodingStyle cleanups for arch/i386/pci/i386.c: - fit in 80 columns; - use a #defined value instead of an inline constant; Also change one resource_size_t (DBG) printk from %08lx to %lx since it can be more than 32 bits (more than 8 hexits). Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | Altix: Initial ACPI support - ROM shadowing.John Keller2006-12-013-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support a shadowed ROM when running with an ACPI capable PROM. Define a new dev.resource flag IORESOURCE_ROM_BIOS_COPY to describe the case of a BIOS shadowed ROM, which can then be used to avoid pci_map_rom() making an unneeded call to pci_enable_rom(). Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | Altix: Add initial ACPI IO supportJohn Keller2006-12-0110-570/+945
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First phase in introducing ACPI support to SN. In this phase, when running with an ACPI capable PROM, the DSDT will define the root busses and all SN nodes (SGIHUB, SGITIO). An ACPI bus driver will be registered for the node devices, with the acpi_pci_root_driver being used for the root busses. An ACPI vendor descriptor is now used to pass platform specific information for both nodes and busses, eliminating the need for the current SAL calls. Also, with ACPI support, SN fixup code is no longer needed to initiate the PCI bus scans, as the acpi_pci_root_driver does that. However, to maintain backward compatibility with non-ACPI capable PROMs, none of the current 'fixup' code can been deleted, though much restructuring has been done. For example, the bulk of the code in io_common.c is relocated code that is now common regardless of what PROM is running, while io_acpi_init.c and io_init.c contain routines specific to an ACPI or non ACPI capable PROM respectively. A new pci bus fixup platform vector has been created to provide a hook for invoking platform specific bus fixup from pcibios_fixup_bus(). The size of io_space[] has been increased to support systems with large IO configurations. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | PCI: Delete unused extern in powermac/pci.cMatthew Wilcox2006-12-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file no longer uses pci_cache_line_size, so delete the declaration Signed-off-by: Matthew Wilcox <matthew@wil.cx> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | PCI: Use pci_generic_prep_mwi on sparc64Matthew Wilcox2006-12-011-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The setting of the CACHE_LINE_SIZE register in sparc64's pci initialisation code isn't quite adequate as the device may have incompatible requirements. The generic code tests for this, so switch sparc64 over to using it. Since sparc64 has different L1 cache line size and PCI cache line size, it would need to override the generic code like i386 and ia64 do. We know what the cache line size is at compile time though, so introduce a new optional constant PCI_CACHE_LINE_BYTES. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: David Miller <davem@davemloft.net> Acked-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 12:31:16 +0000