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* ARM: S5P: Add Support System MMUDonguk Ryu2011-01-138-0/+548
| | | | | | | | | | | | This patch adds support System MMU which supports address transition from virtual address to physical address. Basically, each hardware block is connected System MMU block can use directly vitrual address when it accesses physical memory not using physical address. Signed-off-by: Donguk Ryu <du.ryu@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> [kgene.kim@samsung.com: removed useless codes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* ARM: SAMSUNG: Add support for clock debugging through debug-fs interfaceAmit Daniel Kachhap2011-01-122-0/+95
| | | | | | | | This patch adds support for clock information exposed to debug-fs interface. Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> [kgene.kim@samsung.com: removed useless empty lines] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* Merge branch 'next-s3c24xx' into for-nextKukjin Kim2011-01-0621-18/+261
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| * ARM: S3C24XX: Add support UART3 for S3C2443 and S3C2416Abhilash Kesavan2011-01-062-0/+14
| | | | | | | | | | | | | | | | | | Both S3C2443 and S3C2416 support 4 UART channels, this patch adds support for the missing uart channel. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: SAMSUNG: Don't export __init functions to modulesYauhen Kharuzhy2011-01-062-3/+0
| | | | | | | | | | | | | | | | | | | | | | There are few functions marked as __init, but exported to modules in devices declaration files. s3c_nand_set_platdata() and s3c24xx_ts_set_platdata() are used only by boards init code now, so remove EXPORT_SYMBOL() for them. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C2443: Implement GPIO pull-up/down configuration methodsYauhen Kharuzhy2011-01-065-1/+57
| | | | | | | | | | | | | | | | | | | | S3C2443 has two-bits pull-up/pull-down configuration fields in GPIO registers, but values are differ from other SoCs with two-bits configuration. gpio-cfg-helpers.h already has prototypes for s3c2443-style pull-up/down methods, so implement them. Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C2416: Add support of SD/MMC card detect on SMDK2416Yauhen Kharuzhy2011-01-061-0/+16
| | | | | | | | | | | | | | | | Enable card detect by GPIO pin on hsmmc1 device (SD0 on SMDK2416 board) and enable card polling on hsmmc0 (SD1). Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C2416: Add platform helpers for setup SDHCIYauhen Kharuzhy2011-01-066-0/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | Samsung S3C2416 has two SDHCI controllers compatible with other Samsung's SoCs (S3C64XX, S5PC100 etc...). Add required platform setup code that the devices can be used with sdhci-s3c driver. Signed-off-by: Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com> [kgene.kim@samsung.com: change to __raw_{readl,writel} from {readl,writel}] [kgene.kim@samsung.com: build error fixes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * ARM: S3C24XX: Add address map and clock definitions for HSMMC0Yauhen Kharuzhy2011-01-068-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge branch 'dev/cleanup-clocks' into for-nextKukjin Kim2011-01-057-98/+23
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| * | ARM: S5PV310: Tidy init+disable clock usage and s3c24xx_register_clocks cleanupKukjin Kim2011-01-041-15/+4
| | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using and cleanups the return of s3c24xx_register_clocks() because it includes it. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S5PV210: Tidy init+disable clock usage and s3c24xx_register_clocks cleanupKukjin Kim2011-01-041-15/+4
| | | | | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using and cleanups the return of s3c24xx_register_clocks() because it includes it. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S5PC100: Tidy register and disable clock usageKukjin Kim2011-01-041-13/+3
| | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S5P6450: Tidy register and disable clock usageKukjin Kim2011-01-041-13/+3
| | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S5P6442: Tidy register and disable clock usageKukjin Kim2011-01-041-13/+3
| | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S5P6440: Tidy register and disable clock usageKukjin Kim2011-01-041-13/+3
| | | | | | | | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S3C64XX: Tidy register and disable clock usageKukjin Kim2011-01-041-16/+3
| |/ | | | | | | | | | | | | | | This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge branch 'next-s3c64xx' into for-nextKukjin Kim2011-01-031-0/+1
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| * | ARM: S3C64XX: Clear DMA_HALT upon startJassi Brar2011-01-031-0/+1
| |/ | | | | | | | | | | | | | | | | The stop function sets the DMA_HALT bit, which prevents the DMA transfer to resume after stop, for example during audio PAUSE/PLAY cycle. Clear the HALT bit during start. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | Merge branch 'next-samsung-irq_data' into for-nextKukjin Kim2011-01-0316-354/+345
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| * | ARM: SAMSUNG: some GENERIC_HARDIRQS_NO_DEPRECATED build fixesLennert Buytenhek2011-01-032-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When GENERIC_HARDIRQS_NO_DEPRECATED is enabled, a number of struct irq_desc members stop being directly accessible, and need to be accessed via the irq_data struct instead -- this patch fixes up the plat-samsung sites that still access those members directly. Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S5P: irq_data conversionLennert Buytenhek2011-01-035-106/+111
| | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | ARM: S3C24XX: irq_data conversionLennert Buytenhek2011-01-039-243/+229
| | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca> [kgene.kim@samsung.com: coding-style fixes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | Merge branch 'next-s5pv310' into for-nextKukjin Kim2011-01-038-9/+711
|\ \ \ | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-s5pv310/Makefile
| * \ \ Merge branch 'dev/s5pv310-cpufreq' into next-s5pv310Kukjin Kim2011-01-038-9/+711
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| | * | | ARM: S5PV310: Update Kconfig and Makefile for supporting CPUFREQSunyoung Kang2010-12-232-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds ARCH_HAS_CPUFREQ in Kconfig of ARCH_S5PV310 and updates Makefile for supporting build S5PV310 CPUFREQ driver. Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S5PV310: Add FOUT APLL get rate functionJaecheol Lee2010-12-231-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FOUT APLL clock is used as a source of ARM core clock. So we need that the clock source can be changed dynamically by using CPUFREQ driver. This patch can give correct frequency when calling clk_get_rate() function. Signed-off-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Sangwook Ju <sw.ju@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S5PV310: Update CPUFREQSangwook Ju2010-12-231-141/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates following of CPUFREQ. - Updated DVFS table and divider value - Added common function - Added some function for changing APLL and setting Signed-off-by: Sangwook Ju <sw.ju@samsung.com> Reviewed-by: Jaecheol Lee <jc.lee@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S5PV310: Add support CPUFREQSunyoung Kang2010-12-231-0/+561
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support CPUFREQ driver for S5PV310 and S5PC210. This can support DVFS(Dynamic Voltage and Frequency Scaling). The voltage scaling depends on existence of regulator. Sigend-off-by: Sunyoung Kang <sy0816.kang@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S5PV310: Add DMC registers and map_descSunyoung Kang2010-12-233-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DMC io mapping for access it and adds registers. This is used in checking DRAM memory type. Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S5PV310: Define missing CMU register for CPUFREQSangwook Ju2010-12-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds missing CMU(Clock Management Unit) registers for updated S5PV310 CPUFREQ driver. Signed-off-by: Sangwook Ju <sw.ju@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: S5PV310: Update CMU registers for CPUFREQSunyoung Kang2010-12-232-8/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds CMU(Clock Management Unit) registers for S5PV310/S5PC210 CPUFREQ driver and modifies some register names according to datasheet. Signed-off-by: Sunyoung Kang <sy0816.kang@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | | Merge branch 'next-s5pv310' into for-nextKukjin Kim2010-12-3113-10/+317
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-s5pv310/Kconfig arch/arm/mach-s5pv310/Makefile arch/arm/mach-s5pv310/mach-smdkc210.c arch/arm/mach-s5pv310/mach-smdkv310.c arch/arm/plat-samsung/include/plat/devs.h
| * | | | Merge branch 'dev/s5pv310-irq' into next-s5pv310Kukjin Kim2010-12-313-4/+24
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| | * | | | ARM: S5PV310: Add irq_mask to handle combiner irqs properlyChanghwan Youn2010-12-081-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 4 combiner groups use same registers to handle the interrupt. In previous implementation, the whole registers are checked to find which interupt is occurred and thus interrupt in other groups can be detected. This patch adds irq_mask to solve this problem. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | ARM: S5PV310: Limit the irqs which support cascade interruptChanghwan Youn2010-12-081-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the interrupt combiner. This patch limits the irqs which should be initialized to support cascade interrupt. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | ARM: S5PV310: Add Interrupt of MCTChanghwan Youn2010-12-081-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds IRQ_MCT0, IRQ_MCT1, IRQ_MCT_L0, and IRQ_MCT_L1. (MCT: Multi-Core Timer). And updated MAX_COMBINER_NR. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5PV310: Universal SDHCI devices supportKyungmin Park2010-12-302-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Universal (C210) board has 3 SDHCI devices. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: minor edit of title] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5PV310: Add support Power DomainChanghwan Youn2010-12-3010-0/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support Power Domain for S5PV310 and S5PC210. Signed-off-by: Changhwan Youn <chaos.youn at samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5PV310: Set bit 22 in the PL310 (cache controller) AuxCtlr registerChanghwan Youn2010-12-301-1/+1
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is applied according to the commit 1a8e41cd672f894bbd74874eac601e6cedf838fb (ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register). Actually, S5PV310 has same cache controller(PL310). Following is from Catalin Marinas' commit. Clearing bit 22 in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. Signed-off-by: Changhwan Youn <chaos.youn@samsung.com> Cc: <stable@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | | Merge branch 'next-s5pv210' into for-next-newKukjin Kim2010-12-302-4/+79
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/mach-s5pv210/mach-smdkv210.c
| * | | | | ARM: S5PV210: Add frame buffer display support for SMDKV210Thomas Abraham2010-12-302-0/+76
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable frame buffer display support for SMDKV210 board. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Jonghun Han <jonghun.han@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* | | | | Merge branch 'next-s5p64x0' into for-next-newKukjin Kim2010-12-307-72/+231
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| * | | | | ARM: S5P6440: Change the name for MMC Special ClockAbhilash Kesavan2010-12-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the name of mmc spcial clock from mmc_bus to sclk_mmc to be in line with the naming across the S5P SoCs Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> [kgene.kim@samsung.com: minor edit of title] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5P64X0: Change GPIOlib initialization to core_initcallAbhilash Kesavan2010-12-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the gpiolib initialization from arch_initcall to core_initcall will allow us to make use of gpio functions in smdk64x0_machine_init function. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5P64X0: Add clock support for RTCAtul Dahiya2010-12-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds RTC clock for S5P6450. Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5P64X0: Rename GPIOlib file to gpiolib.cKukjin Kim2010-12-302-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames S5P64X0 GPIOlib file according to other S5P SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5P64X0: Cleanup S5P64X0 GPIOlib adding 2bit chipsKukjin Kim2010-12-301-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes S5P6440 and S5P6450 GPIOlib adding 2bit chips. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: SAMSUNG: Cleanup GPIOlib adding 2bit chipsKukjin Kim2010-12-302-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds samsung_gpiolib_add_2bit_chips() for cleanup regarding GPIOlib adding 2bit chips. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: S5P64X0: Add GPIOlib support for S5P6450Kukjin Kim2010-12-303-68/+217
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Already can support S5P6440 GPIOlib but S5P6450. This patch changes regarding S5P6440 GPIO definitions so that can be used it from S5P6450 and adds S5P6450 GPIO chips. Tested-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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