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* ARM: tegra30: cpuidle: add powered-down state for secondary CPUsJoseph Lo2012-11-158-0/+253
| | | | | | | | | | | | | | | | This supports power-gated idle on secondary CPUs for Tegra30. The secondary CPUs can go into powered-down state independently. When CPU goes into this state, it saves it's contexts and puts itself to flow controlled WFI state. After that, it will been power gated. Be aware of that, you may see the legacy power state "LP2" in the code which is exactly the same meaning of "CPU power down". Based on the work by: Scott Williams <scwilliams@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: cpuidle: add CPU resume functionJoseph Lo2012-11-153-0/+67
| | | | | | | | | | | | | | | | | | The CPU suspending on Tegra means CPU power gating. We add a resume function for taking care the CPUs that resume from power gating status. This function was been hooked to the reset handler. We take care everything here before go into kernel. Be aware of that, you may see the legacy power status "LP2" in the code which is exactly the same meaning of "CPU power down". Based on the work by: Scott Williams <scwilliams@nvidia.com> Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: cpuidle: separate cpuidle driver for different chipsJoseph Lo2012-11-155-34/+184
| | | | | | | | The different Tegra chips may have different CPU idle states and data. Individual CPU idle driver make it more easy to maintain. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"Joseph Lo2012-11-153-2/+1
| | | | | | | | For the naming consistency under the mach-tegra, we re-name the file of "sleep-tXX" to "sleep-tegraXX" (e.g., sleep-t30 to sleep-tegra30). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATEJoseph Lo2012-11-151-39/+3
| | | | | | | | The Tegra CPU idle LP3 state is doing ARM WFI only. So it's same with the common ARM_CPUIDLE_WFI_STATE. Using it to replace LP3 now. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add Tegra30 host1x clock supportThierry Reding2012-11-151-2/+3
| | | | | | | Setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add AUXDATA for Tegra30 host1xThierry Reding2012-11-151-0/+9
| | | | | | | | | Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add Tegra20 host1x clock supportThierry Reding2012-11-151-3/+8
| | | | | | | | | Extend the pll_d frequency table with a few entries to support common HDMI and LVDS display modes and setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add AUXDATA for Tegra20 host1xThierry Reding2012-11-151-0/+9
| | | | | | | | | Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Tegra30 speedo-based process identificationDanny Huang2012-11-154-2/+309
| | | | | | | | | This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add speedo-based process identificationDanny Huang2012-11-154-8/+140
| | | | | | | | | Detect CPU and core process ID by checking speedo corner tables. This can provide a more accurate process ID. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra2/Tegra20/ in log print] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: flexible spare fuse read functionDanny Huang2012-11-152-7/+14
| | | | | | | | Change the spare fuse base from a definition to a variable. It provides flexibilty to read spare fuse on different chip. Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Implement 6395/1 for TegraPeter De Schrijver2012-11-141-1/+1
| | | | | | | | | | This patch implements ARM linux patch 6395/1 for Tegra. See commit 1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register" for details. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> [swarren: added commit subject for referenced patch] Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dtLaxman Dewangan2012-11-131-0/+2
| | | | | | | | | | Add OF_DEV_AUXDATA for sflash controller driver for Tegra20 board dt files. Set the parent clock of sflash controller to PLLP and configure clock to 20MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: enable data prefetch on L2Joseph Lo2012-11-091-1/+1
| | | | | | | | Enable the data prefetch on L2. The bit28 in aux ctrl register. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
* ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dtLaxman Dewangan2012-11-052-0/+20
| | | | | | | | | | Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30 board dt files. Set the parent clock of slink controller to PLLP and configure clock to 100MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: common: using OF api for L2 cache initJoseph Lo2012-11-051-7/+4
| | | | | | | Moving L2 cache init to DT support. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: dt: add L2 cache controllerJoseph Lo2012-11-052-0/+18
| | | | | | | Add L2 cache controller binding into DT for Tegra. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra30: clocks: add AHB and APB clocksJoseph Lo2012-11-054-0/+157
| | | | | | | Adding the AHB and APB bus clock for Tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: set up wlan clocks for tegra dtWei Ni2012-11-052-0/+8
| | | | | | | Set up the wlan clock tree for Tegra20 and Tegra30. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: move irammap.h to mach-tegraStephen Warren2012-11-054-5/+3
| | | | | | | | | | | | Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../irammap.h" becaue of this change. Both these usages will be removed shortly, when Tegra's DEBUG_LL implementation is updated not to pass information through IRAM. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: move iomap.h to mach-tegraStephen Warren2012-11-0522-31/+22
| | | | | | | | | | | | | | Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: remove <mach/dma.h>Stephen Warren2012-11-052-57/+0
| | | | | | | | | | | | | | | Remove includes of <mach/dma.h> from sound/soc; nothing from it is used. Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA transfers made by this file don't need flow-control with any peripheral, there's no need to set any slave ID. Once those changes are made, there are no remaining users of <mach/dma.h> so remove it. Drivers should get this information from device tree. This removal is necessary for single zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/Stephen Warren2012-11-051-19/+0
| | | | | | | | | We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible to enable single zImage. Move tegra-ahb.h to a more central location (suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c include the header to ensure client and provider agree on the prototype. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: remove unnecessary includes of <mach/*.h>Stephen Warren2012-11-0510-17/+2
| | | | | | | This should make it easier to delete or move <mach/*.h>; something that is useful for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* ARM: tegra: update *.dts for regulator-compatible deprecationStephen Warren2012-11-057-357/+112
| | | | | | | | | Commit 13511de "regulator: deprecate regulator-compatible DT property" now allows for simpler content within the regulators node within a PMIC. Modify all the Tegra device tree files to take advantage of this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
* Merge tag 'frv-fixes-20121102' of ↵Linus Torvalds2012-11-026-32/+14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-frv Pull FRV fixes from David Howells: "A collection of small fixes for the FRV architecture." * tag 'frv-fixes-20121102' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-frv: frv: fix the broken preempt frv: switch to saner kernel_execve() semantics FRV: Fix the new-style kernel_thread() stuff FRV: Fix the preemption handling FRV: gcc-4.1.2 also inlines weak functions FRV: Don't objcopy the GNU build_id note FRV: Add missing linux/export.h #inclusions
| * frv: fix the broken preemptAl Viro2012-11-021-20/+3
| | | | | | | | | | | | | | | | | | Just get %icc2 into the state we would have after local_irq_disable() and physical IRQ having happened since then. Then we can simply use preempt_schedule_irq() and be done with the whole mess. Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * frv: switch to saner kernel_execve() semanticsAl Viro2012-11-023-6/+1
| | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * FRV: Fix the new-style kernel_thread() stuffDavid Howells2012-11-021-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel_thread() changes for FRV don't work, and FRV fails to boot, starting with: commit 02ce496f152df87be081a64796498942c433a2fd Author: Al Viro <viro@zeniv.linux.org.uk> Date: Tue Sep 18 22:18:51 2012 -0400 Subject: frv: split ret_from_fork, simplify kernel_thread() a lot The problem is that the userspace registers are completely cleared when a kernel thread is created and all subsequent user threads are then copied from that. Unfortunately, however, the TBR and PSR registers are restored from the pt_regs and the values they should be set to are clobbered by the memset. Instead, copy across the old user registers as normal, and then merely alter GR8 and GR9 in it if we're going to execute a kernel thread. Signed-off-by: David Howells <dhowells@redhat.com>
| * FRV: Fix the preemption handlingDavid Howells2012-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the preemption handling in FRV code where the PREEMPT_ACTIVE value is incorrectly loaded into the threadinfo flags rather than the threadinfo preemption count. Unfortunately, the code cannot be simply converted to use preempt_schedule_irq() as is because FRV uses virtual interrupt disablement to cut down on the cost of actually disabling interrupts and thus local_irq_enable() doesn't actually enable interrupts. Reported-by: Al Viro <viro@ZenIV.linux.org.uk> Signed-off-by: David Howells <dhowells@redhat.com> cc: Al Viro <viro@ZenIV.linux.org.uk>
| * FRV: Don't objcopy the GNU build_id noteDavid Howells2012-11-021-4/+6
| | | | | | | | | | | | | | Don't let objcopy transfer the GNU build_id note into the loadable image as it is located at address 0 and the image ends up >3G in size. Signed-off-by: David Howells <dhowells@redhat.com>
| * FRV: Add missing linux/export.h #inclusionsDavid Howells2012-11-021-0/+1
| | | | | | | | | | | | Add missing linux/export.h #inclusions to the FRV arch. Signed-off-by: David Howells <dhowells@redhat.com>
* | Merge tag 'stable/for-linus-3.7-rc4-tag' of ↵Linus Torvalds2012-11-023-11/+25
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen Pull Xen bugfixes from Konrad Rzeszutek Wilk: - Use appropriate macros instead of hand-rolling our own (ARM). - Fixes if FB/KBD closed unexpectedly. - Fix memory leak in /dev/gntdev ioctl calls. - Fix overflow check in xenbus_file_write. - Document cleanup. - Performance optimization when migrating guests. * tag 'stable/for-linus-3.7-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: xen/mmu: Use Xen specific TLB flush instead of the generic one. xen/arm: use the __HVC macro xen/xenbus: fix overflow check in xenbus_file_write() xen-kbdfront: handle backend CLOSED without CLOSING xen-fbfront: handle backend CLOSED without CLOSING xen/gntdev: don't leak memory from IOCTL_GNTDEV_MAP_GRANT_REF x86: remove obsolete comment from asm/xen/hypervisor.h
| * | xen/mmu: Use Xen specific TLB flush instead of the generic one.Konrad Rzeszutek Wilk2012-10-311-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As Mukesh explained it, the MMUEXT_TLB_FLUSH_ALL allows the hypervisor to do a TLB flush on all active vCPUs. If instead we were using the generic one (which ends up being xen_flush_tlb) we end up making the MMUEXT_TLB_FLUSH_LOCAL hypercall. But before we make that hypercall the kernel will IPI all of the vCPUs (even those that were asleep from the hypervisor perspective). The end result is that we needlessly wake them up and do a TLB flush when we can just let the hypervisor do it correctly. This patch gives around 50% speed improvement when migrating idle guest's from one host to another. Oracle-bug: 14630170 CC: stable@vger.kernel.org Tested-by: Jingjie Jiang <jingjie.jiang@oracle.com> Suggested-by: Mukesh Rathor <mukesh.rathor@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
| * | xen/arm: use the __HVC macroStefano Stabellini2012-10-301-9/+5
| | | | | | | | | | | | | | | | | | | | | Use the new __HVC macro in hypercall.S. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
| * | x86: remove obsolete comment from asm/xen/hypervisor.hOlaf Hering2012-10-301-1/+0
| | | | | | | | | | | | | | | Signed-off-by: Olaf Hering <olaf@aepfle.de> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
* | | Merge tag 'xtensa-next-20121101' of git://github.com/czankel/xtensa-linuxLinus Torvalds2012-11-0110-132/+104
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull Xtensa fixes from Chris Zankel: "Some important bug fixes. With the change to uapi, there was a bug introduced that results in an empty syscall table (mult-inclusion bug). Switching to the generic thread/execve allowed us to fix a bug we had in vfork()." * tag 'xtensa-next-20121101' of git://github.com/czankel/xtensa-linux: xtensa: switch to generic sys_execve() xtensa: switch to generic kernel_execve() xtensa: switch to generic kernel_thread() xtensa: reset windowbase/windowstart when cloning the VM xtensa: use physical addresses for bus addresses xtensa: allow multi-inclusion for uapi/unistd.h
| * | xtensa: switch to generic sys_execve()Max Filippov2012-10-254-27/+3
| | | | | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * | xtensa: switch to generic kernel_execve()Max Filippov2012-10-252-17/+2
| | | | | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * | xtensa: switch to generic kernel_thread()Max Filippov2012-10-255-63/+61
| | | | | | | | | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
| * | xtensa: reset windowbase/windowstart when cloning the VMChris Zankel2012-10-251-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we copy a user thread with CLONE_VM, we also have to reset windowbase and windowstart to start a pristine stack frame. Otherwise, overflows can happen using the address 0 as the stack pointer. Also add a special case for vfork, which continues on the parent stack until it calls execve. Because this could be a call8, we need to spill the stack pointer of the previus frame (if still 'live' in the register file). Signed-off-by: Chris Zankel <chris@zankel.net>
| * | xtensa: use physical addresses for bus addressesChris Zankel2012-10-251-0/+4
| | | | | | | | | | | | | | | | | | | | | Define virt_to_bus and bus_to_virt as virt_to_phys, and phys_to_virt, respectively. Signed-off-by: Chris Zankel <chris@zankel.net>
| * | xtensa: allow multi-inclusion for uapi/unistd.hChris Zankel2012-10-253-25/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xtensa implements a method that allows to generate a arbitrary output for each system call by defining the __SYSCALL(number, function, num_args). This usually requires to include uapi/unistd.h twice. Instead of removing the guard agains multiple inclusion entirely, allow to include unistd.h again only if __SYSCALL is defined. Note that __SYSCALL gets always undefined at the end of the file. Signed-off-by: Chris Zankel <chris@zankel.net>
* | | KVM: x86: fix vcpu->mmio_fragments overflowXiao Guangrong2012-10-311-26/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After commit b3356bf0dbb349 (KVM: emulator: optimize "rep ins" handling), the pieces of io data can be collected and write them to the guest memory or MMIO together Unfortunately, kvm splits the mmio access into 8 bytes and store them to vcpu->mmio_fragments. If the guest uses "rep ins" to move large data, it will cause vcpu->mmio_fragments overflow The bug can be exposed by isapc (-M isapc): [23154.818733] general protection fault: 0000 [#1] SMP DEBUG_PAGEALLOC [ ......] [23154.858083] Call Trace: [23154.859874] [<ffffffffa04f0e17>] kvm_get_cr8+0x1d/0x28 [kvm] [23154.861677] [<ffffffffa04fa6d4>] kvm_arch_vcpu_ioctl_run+0xcda/0xe45 [kvm] [23154.863604] [<ffffffffa04f5a1a>] ? kvm_arch_vcpu_load+0x17b/0x180 [kvm] Actually, we can use one mmio_fragment to store a large mmio access then split it when we pass the mmio-exit-info to userspace. After that, we only need two entries to store mmio info for the cross-mmio pages access Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* | | Merge tag 'fixes-for-3.7' of ↵Linus Torvalds2012-10-2854-86/+217
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull arm-soc fixes from Arnd Bergmann: "Bug fixes for a number of ARM platforms, mostly OMAP, imx and at91. These come a little later than I had hoped but unfortunately we had a few of these patches cause regressions themselves and had to work out how to deal with those in the meantime." * tag 'fixes-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits) Revert "ARM i.MX25: Fix PWM per clock lookups" ARM: versatile: fix versatile_defconfig ARM: mvebu: update defconfig with 3.7 changes ARM: at91: fix at91x40 build ARM: socfpga: Fix socfpga compilation with early_printk() enabled ARM: SPEAr: Remove unused empty files MAINTAINERS: Add arm-soc tree entry ARM: dts: mxs: add the "clock-names" for gpmi-nand ARM: ux500: Correct SDI5 address and add some format changes ARM: ux500: Specify AMBA Primecell IDs for Nomadik I2C in DT ARM: ux500: Fix build error relating to IRQCHIP_SKIP_SET_WAKE ARM: at91: drop duplicated config SOC_AT91SAM9 entry ARM: at91/i2c: change id to let i2c-at91 work ARM: at91/i2c: change id to let i2c-gpio work ARM: at91/dts: at91sam9g20ek_common: Fix typos in buttons labels. ARM: at91: fix external interrupt specification in board code ARM: at91: fix external interrupts in non-DT case ARM: at91: at91sam9g10: fix SOC type detection ARM: at91/tc: fix typo in the DT document ARM: AM33XX: Fix configuration of dmtimer parent clock by dmtimer driverDate:Wed, 17 Oct 2012 13:55:55 -0500 ...
| * | | Revert "ARM i.MX25: Fix PWM per clock lookups"Arnd Bergmann2012-10-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 92063cee118655d25b50d04eb77b012f3287357a, it was applied prematurely, causing this build error for imx_v4_v5_defconfig: arch/arm/mach-imx/clk-imx25.c: In function 'mx25_clocks_init': arch/arm/mach-imx/clk-imx25.c:206:26: error: 'pwm_ipg_per' undeclared (first use in this function) arch/arm/mach-imx/clk-imx25.c:206:26: note: each undeclared identifier is reported only once for each function it appears in Sascha Hauer explains: > There are several gates missing in clk-imx25.c. I have a patch which > adds support for them and I seem to have missed that the above depends > on it. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: versatile: fix versatile_defconfigArnd Bergmann2012-10-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the introduction of CONFIG_ARCH_MULTIPLATFORM, versatile is no longer the default platform, so we need to enable CONFIG_ARCH_VERSATILE explicitly in order for that to be selected rather than the multiplatform configuration. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: mvebu: update defconfig with 3.7 changesThomas Petazzoni2012-10-271-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The split of 370 and XP into two Kconfig options and the multiplatform kernel support has changed a few Kconfig symbols, so let's update the mvebu_defconfig file with the latest changes. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | ARM: at91: fix at91x40 buildArnd Bergmann2012-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | patch 738a0fd7 "ARM: at91: fix external interrupts in non-DT case" fixed a run-time error on some at91 platforms but did not apply the same change to at91x40, which now doesn't build. This changes at91x40 in the same way that the other platforms were changed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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