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* ARM: config: aspeed: Add I2C, VUART, LPC SnoopJoel Stanley2017-08-232-2/+6
* ARM: configs: aspeed: Update Aspeed G4 with VMSPLIT_2GCédric Le Goater2017-08-231-0/+1
* Merge branch 'work.mount' of git://git.kernel.org/pub/scm/linux/kernel/git/vi...Linus Torvalds2017-07-151-3/+19
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| * spufs: Implement show_optionsDavid Howells2017-07-111-3/+19
* | Merge branch 'work.uaccess-unaligned' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2017-07-1521-406/+145
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| * | kill {__,}{get,put}_user_unaligned()Al Viro2017-07-0311-343/+0
| * | binfmt_flat: flat_{get,put}_addr_from_rp() should be able to failAl Viro2017-07-0310-63/+145
* | | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2017-07-15127-1771/+2206
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| * | | MIPS: Fix MIPS I ISA /proc/cpuinfo reportingMaciej W. Rozycki2017-07-111-1/+1
| * | | MIPS: Fix minimum alignment requirement of IRQ stackMatt Redfearn2017-07-111-1/+1
| * | | MIPS: generic: Support MIPS Boston development boardsPaul Burton2017-07-115-0/+311
| * | | MIPS: DTS: img: Don't attempt to build-in all .dtb filesPaul Burton2017-07-111-2/+1
| * | | MIPS: Traced negative syscalls should return -ENOSYSJames Hogan2017-07-111-0/+7
| * | | MIPS: Correct forced syscall errorsJames Hogan2017-07-111-1/+1
| * | | MIPS: Negate error syscall return in traceJames Hogan2017-07-111-1/+1
| * | | MIPS: Drop duplicate HAVE_SYSCALL_TRACEPOINTS selectJames Hogan2017-07-111-1/+0
| * | | MIPS16e2: Provide feature overrides for non-MIPS16 systemsMaciej W. Rozycki2017-07-1116-0/+16
| * | | MIPS: MIPS16e2: Report ASE presence in /proc/cpuinfoMaciej W. Rozycki2017-07-111-0/+1
| * | | MIPS: MIPS16e2: Subdecode extended LWSP/SWSP instructionsMaciej W. Rozycki2017-07-051-2/+37
| * | | MIPS: MIPS16e2: Identify ASE presenceMaciej W. Rozycki2017-07-054-0/+7
| * | | MIPS: VDSO: Fix a mismatch between comment and preprocessor constantAleksandar Markovic2017-06-291-1/+1
| * | | MIPS: VDSO: Add implementation of gettimeofday() fallbackGoran Ferenc2017-06-291-1/+23
| * | | MIPS: VDSO: Add implementation of clock_gettime() fallbackGoran Ferenc2017-06-291-3/+22
| * | | MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse()Goran Ferenc2017-06-292-6/+6
| * | | MIPS: Use current_cpu_type() in m4kc_tlbp_war()Paul Burton2017-06-291-2/+1
| * | | MIPS: Allow storing pgd in C0_CONTEXT for MIPSr6Paul Burton2017-06-291-1/+1
| * | | MIPS: Handle tlbex-tlbp race conditionPaul Burton2017-06-291-1/+37
| * | | MIPS: Add CPU shared FTLB feature detectionPaul Burton2017-06-293-0/+56
| * | | MIPS: CPS: Handle spurious VP starts more gracefullyPaul Burton2017-06-291-1/+6
| * | | MIPS: CPS: Handle cores not powering down more gracefullyPaul Burton2017-06-291-3/+24
| * | | MIPS: CPS: Prevent multi-core with dcache aliasingPaul Burton2017-06-291-3/+5
| * | | MIPS: CPS: Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6Paul Burton2017-06-291-0/+1
| * | | MIPS: CM: WARN on attempt to lock invalid VP, not BUGPaul Burton2017-06-291-1/+1
| * | | MIPS: CM: Avoid per-core locking with CM3 & higherPaul Burton2017-06-291-6/+32
| * | | MIPS: Skip IPI setup if we only have 1 CPUPaul Burton2017-06-291-0/+3
| * | | MIPS: Use `pr_debug' for messages from `__compute_return_epc_for_insn'Maciej W. Rozycki2017-06-291-6/+6
| * | | MIPS: math-emu: For MFHC1/MTHC1 also return SIGILL right awayMaciej W. Rozycki2017-06-291-3/+2
| * | | MIPS: Fix a typo: s/preset/present/ in r2-to-r6 emulation error messageMaciej W. Rozycki2017-06-291-1/+1
| * | | MIPS: Send SIGILL for R6 branches in `__compute_return_epc_for_insn'Maciej W. Rozycki2017-06-291-20/+15
| * | | MIPS: Send SIGILL for linked branches in `__compute_return_epc_for_insn'Maciej W. Rozycki2017-06-291-8/+4
| * | | MIPS: Rename `sigill_r6' to `sigill_r2r6' in `__compute_return_epc_for_insn'Maciej W. Rozycki2017-06-291-8/+8
| * | | MIPS: Send SIGILL for BPOSGE32 in `__compute_return_epc_for_insn'Maciej W. Rozycki2017-06-291-3/+4
| * | | MIPS: Fix unaligned PC interpretation in `compute_return_epc'Maciej W. Rozycki2017-06-291-4/+1
| * | | MIPS: Actually decode JALX in `__compute_return_epc_for_insn'Maciej W. Rozycki2017-06-291-0/+1
| * | | MIPS: math-emu: Prevent wrong ISA mode instruction emulationMaciej W. Rozycki2017-06-291-0/+38
| * | | MIPS: Use queued spinlocks (qspinlock)Paul Burton2017-06-294-232/+4
| * | | MIPS: Use queued read/write locks (qrwlock)Paul Burton2017-06-294-224/+4
| * | | MIPS: cmpxchg: Rearrange __xchg() arguments to match xchg()Paul Burton2017-06-291-2/+3
| * | | MIPS: cmpxchg: Implement 1 byte & 2 byte cmpxchg()Paul Burton2017-06-292-0/+64
| * | | MIPS: cmpxchg: Implement 1 byte & 2 byte xchg()Paul Burton2017-06-293-3/+60