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* ARM: SAMSUNG: Modify board files to use new PWM platform deviceTomasz Figa2013-08-1211-31/+25
| | | | | | | | | | | | This patch modifies any board files using the legacy PWM device to use the new device instead. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Rework private data handling in dev-backlightTomasz Figa2013-08-121-22/+29
| | | | | | | | | | | | This patch modifies dev-backlight helpers to get private data using container_of instead of abusing platform_data field of PWM device. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Remove unused PWM timer IRQ chip codeTomasz Figa2013-08-0611-161/+6
| | | | | | | | | | | | | As the need for an IRQ chip handling PWM timer interrupt chaining is gone now, this patch removes all the code made unnecessary. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Remove old samsung-time driverTomasz Figa2013-08-064-426/+0
| | | | | | | | | | | | This patch removes the old samsung-time driver, since all its users have been migrated to the new samsung_pwm_timer clocksource driver. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Move all platforms to new clocksource driverTomasz Figa2013-08-0612-24/+89
| | | | | | | | | | | | | This patch moves all Samsung platforms using PWM clocksource from legacy samsung-time to new samsung-pwm-timer driver. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Set PWM platform dataTomasz Figa2013-08-065-0/+54
| | | | | | | | | | | | | This patch adds PWM platform data needed for legacy (non-DT) platforms to handle SoC-specific bits of the PWM/timer block. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Add new PWM platform deviceTomasz Figa2013-08-063-0/+40
| | | | | | | | | | | | This patch adds new samsung_device_pwm platform device that represents the whole PWM/timer block and includes memory and IRQ resources. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
* ARM: SAMSUNG: Unify base address definitions of timer blockTomasz Figa2013-08-065-0/+6
| | | | | | | | | | | | | | | This patch makes all defintions of timer block base address use the same prefix to allow using the common name to define platform device resource. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Mark Brown <broonie@linaro.org> Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
* Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-08-033-28/+31
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull arm fixes fixes from Russell King: "This fixes a couple of problems with commit 48be69a026b2 ("ARM: move signal handlers into a vdso-like page"), one of which was originally discovered via my testing originally, but the fix for it was never actually committed. The other shows up on noMMU builds, and such platforms are extremely rare and as such are not part of my nightly testing" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: fix nommu builds with 48be69a02 (ARM: move signal handlers into a vdso-like page) ARM: fix a cockup in 48be69a02 (ARM: move signal handlers into a vdso-like page)
| * Merge branch 'security-fixes' into fixesRussell King2013-08-033-28/+31
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| | * ARM: fix nommu builds with 48be69a02 (ARM: move signal handlers into a ↵Russell King2013-08-032-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vdso-like page) Olof reports that noMMU builds error out with: arch/arm/kernel/signal.c: In function 'setup_return': arch/arm/kernel/signal.c:413:25: error: 'mm_context_t' has no member named 'sigpage' This shows one of the evilnesses of IS_ENABLED(). Get rid of it here and replace it with #ifdef's - and as no noMMU platform can make use of sigpage, depend on CONIFG_MMU not CONFIG_ARM_MPU. Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: fix a cockup in 48be69a02 (ARM: move signal handlers into a vdso-like page)Russell King2013-08-032-26/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, I never committed the fix to a nasty oops which can occur as a result of that commit: ------------[ cut here ]------------ kernel BUG at /home/olof/work/batch/include/linux/mm.h:414! Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 490 Comm: killall5 Not tainted 3.11.0-rc3-00288-gabe0308 #53 task: e90acac0 ti: e9be8000 task.ti: e9be8000 PC is at special_mapping_fault+0xa4/0xc4 LR is at __do_fault+0x68/0x48c This doesn't show up unless you do quite a bit of testing; a simple boot test does not do this, so all my nightly tests were passing fine. The reason for this is that install_special_mapping() expects the page array to stick around, and as this was only inserting one page which was stored on the kernel stack, that's why this was blowing up. Reported-by: Olof Johansson <olof@lixom.net> Tested-by: Olof Johansson <olof@lixom.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'merge' of ↵Linus Torvalds2013-08-028-25/+73
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc fixes from Ben Herrenschmidt: "Here is not quite a handful of powerpc fixes for rc3. The windfarm fix is a regression fix (though not a new one), the PMU interrupt rename is not a fix per-se but has been submitted a long time ago and I kept forgetting to put it in (it puts us back in sync with x86), the other perf bit is just about putting an API/ABI bit definition in the right place for userspace to consume, and finally, we have a fix for the VPHN (Virtual Partition Home Node) feature (notification that the hypervisor is moving nodes around) which could cause lockups so we may as well fix it now" * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/windfarm: Fix noisy slots-fan on Xserve (rm31) powerpc: VPHN topology change updates all siblings powerpc/perf: Export PERF_EVENT_CONFIG_EBB_SHIFT to userspace powerpc: Rename PMU interrupts from CNT to PMI
| * | | powerpc: VPHN topology change updates all siblingsRobert Jennings2013-08-012-15/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an associativity level change is found for one thread, the siblings threads need to be updated as well. This is done today for PRRN in stage_topology_update() but is missing for VPHN in update_cpu_associativity_changes_mask(). This patch will correctly update all thread siblings during a topology change. Without this patch a topology update can result in a CPU in init_sched_groups_power() getting stuck indefinitely in a loop. This loop is built in build_sched_groups(). As a result of the thread moving to a node separate from its siblings the struct sched_group will have its next pointer set to point to itself rather than the sched_group struct of the next thread. This happens because we have a domain without the SD_OVERLAP flag, which is correct, and a topology that doesn't conform with reality (threads on the same core assigned to different numa nodes). When this list is traversed by init_sched_groups_power() it will reach the thread's sched_group structure and loop indefinitely; the cpu will be stuck at this point. The bug was exposed when VPHN was enabled in commit b7abef0 (v3.9). Cc: <stable@vger.kernel.org> [v3.9+] Reported-by: Jan Stancek <jstancek@redhat.com> Signed-off-by: Robert Jennings <rcj@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc/perf: Export PERF_EVENT_CONFIG_EBB_SHIFT to userspaceMichael Ellerman2013-08-015-9/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use bit 63 of the event code for userspace to request that the event be counted using EBB (Event Based Branches). Export this value, making it part of the API - though only on processors that support EBB. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | powerpc: Rename PMU interrupts from CNT to PMIMichael Ellerman2013-08-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Back in commit 89713ed "Add timer, performance monitor and machine check counts to /proc/interrupts" we added a count of PMU interrupts to the output of /proc/interrupts. At the time we named them "CNT" to match x86. However in commit 89ccf46 "Rename 'performance counter interrupt'", the x86 guys renamed theirs from "CNT" to "PMI". Arguably changing the name could break someone's script, but I think the chance of that is minimal, and it's preferable to have a name that 1) is somewhat meaningful, and 2) matches x86. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-08-0234-234/+385
|\ \ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "I've thought long and hard about what to say for this pull request, and I really can't work out anything sane to say to summarise much of these commits. The problem is, for most of these are, yet again, lots of small bits scattered around the place without any real overall theme to them" Most notable is probably the kuser page helper improvements. * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: (22 commits) ARM: Add .text annotations where required after __CPUINIT removal ARM: 7803/1: Fix deadlock scenario with smp_send_stop() ARM: make vectors page inaccessible from userspace ARM: move signal handlers into a vdso-like page ARM: allow kuser helpers to be removed from the vector page ARM: update FIQ support for relocation of vectors ARM: use linker magic for vectors and vector stubs ARM: move vector stubs ARM: poison memory between kuser helpers ARM: poison the vectors page ARM: 7801/1: v6: prevent gcc 4.5 from reordering extended CP15 reads above is_smp() test ARM: 7800/1: ARMv7-M: Fix name of NVIC handler function ARM: Fix sorting of machine- initializers ARM: 7791/1: a.out: remove partial a.out support ARM: 7790/1: Fix deferred mm switch on VIVT processors ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on non-Cortex-A15 ARM: 7787/1: virt: ensure visibility of __boot_cpu_mode ARM: 7788/1: elf: fix lpae hwcap feature reporting in proc/cpuinfo ARM: 7786/1: hyp: fix macro parameterisation ARM: 7785/1: mm: restrict early_alloc to section-aligned memory ...
| * | | Merge branch 'security-fixes' into fixesRussell King2013-08-0113-99/+253
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| | * | ARM: make vectors page inaccessible from userspaceRussell King2013-08-013-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If kuser helpers are not provided by the kernel, disable user access to the vectors page. With the kuser helpers gone, there is no reason for this page to be visible to userspace. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: move signal handlers into a vdso-like pageRussell King2013-08-016-31/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the signal handlers into a VDSO page rather than keeping them in the vectors page. This allows us to place them randomly within this page, and also map the page at a random location within userspace further protecting these code fragments from ROP attacks. The new VDSO page is also poisoned in the same way as the vector page. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: allow kuser helpers to be removed from the vector pageRussell King2013-07-313-9/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a kernel configuration option to allow the kernel user helpers to be removed from the vector page, thereby preventing their use with ROP (return orientated programming) attacks. This option is only visible for CPU architectures which natively support all the operations which kernel user helpers would normally provide, and must be enabled with caution. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: update FIQ support for relocation of vectorsRussell King2013-07-312-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FIQ should no longer copy the FIQ code into the user visible vector page. Instead, it should use the hidden page. This change makes that happen. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: use linker magic for vectors and vector stubsRussell King2013-07-312-18/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use linker magic to create the vectors and vector stubs: we can tell the linker to place them at an appropriate VMA, but keep the LMA within the kernel. This gets rid of some unnecessary symbol manipulation, and have the linker calculate the relocations appropriately. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: move vector stubsRussell King2013-07-314-30/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the machine vector stubs into the page above the vector page, which we can prevent from being visible to userspace. Also move the reset stub, and place the swi vector at a location that the 'ldr' can get to it. This hides pointers into the kernel which could give valuable information to attackers, and reduces the number of exploitable instructions at a fixed address. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: poison memory between kuser helpersRussell King2013-07-311-9/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Poison the memory between each kuser helper. This ensures that any branch between the kuser helpers will be appropriately trapped. Cc: <stable@vger.kernel.org> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: poison the vectors pageRussell King2013-07-311-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fill the empty regions of the vectors page with an exception generating instruction. This ensures that any inappropriate branch to the vector page is appropriately trapped, rather than just encountering some code to execute. (The vectors page was filled with zero before, which corresponds with the "andeq r0, r0, r0" instruction - a no-op.) Cc: <stable@vger.kernel.org> Acked-by Nicolas Pitre <nico@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: Add .text annotations where required after __CPUINIT removalRussell King2013-08-012-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8bd26e3a7 (arm: delete __cpuinit/__CPUINIT usage from all ARM users) caused some code to leak into sections which are discarded through the removal of __CPUINIT annotations. Add appropriate .text annotations to bring these back into the kernel text. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7803/1: Fix deadlock scenario with smp_send_stop()Stephen Boyd2013-08-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If one process calls sys_reboot and that process then stops other CPUs while those CPUs are within a spin_lock() region we can potentially encounter a deadlock scenario like below. CPU 0 CPU 1 ----- ----- spin_lock(my_lock) smp_send_stop() <send IPI> handle_IPI() disable_preemption/irqs while(1); <PREEMPT> spin_lock(my_lock) <--- Waits forever We shouldn't attempt to run any other tasks after we send a stop IPI to a CPU so disable preemption so that this task runs to completion. We use local_irq_disable() here for cross-arch consistency with x86. Reported-by: Sundarajan Srinivasan <sundaraj@codeaurora.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7801/1: v6: prevent gcc 4.5 from reordering extended CP15 reads above ↵Paul Walmsley2013-07-311-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | is_smp() test Commit 621a0147d5c921f4cc33636ccd0602ad5d7cbfbc ("ARM: 7757/1: mm: don't flush icache in switch_mm with hardware broadcasting") breaks the boot on OMAP2430SDP with omap2plus_defconfig. Tracked to an undefined instruction abort from the CP15 read in cache_ops_need_broadcast(). It turns out that gcc 4.5 reorders the extended CP15 read above the is_smp() test. This breaks ARM1136 r0 cores, since they don't support several CP15 registers that later ARM cores do. ARM1136JF-S TRM section 3.2.1 "Register allocation" has the details. So mark the extended CP15 read as clobbering memory, which prevents the compiler from reordering it before the is_smp() test. Russell states that the code generated from this approach is preferable to marking the inline asm as volatile. Remove the existing condition code clobber as it's obsolete, per Nico's post: http://www.spinics.net/lists/arm-kernel/msg261208.html This patch is a collaboration with Will Deacon and Russell King. Comments from Paul Walmsley: Russell, if you accept this one, might you also add Will's ack from the lists: Comments from Paul Walmsley: I'd also be obliged if you could add a Cc: line for Jonathan Austin, since he helped test: Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7800/1: ARMv7-M: Fix name of NVIC handler functionUwe Kleine-König2013-07-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The name changed in response to review comments for the nvic irqchip driver when the original name was already accepted into Russell King's tree. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: Fix sorting of machine- initializersRussell King2013-07-271-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | So, there's a comment I put at the top of this, which people seem to fail to read. So let's fix it for them instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7791/1: a.out: remove partial a.out supportWill Deacon2013-07-265-85/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a.out support on ARM requires that argc, argv and envp are passed in r0-r2 respectively, which requires hacking load_aout_binary to prevent argc being clobbered by the return code. Whilst mainline kernels do set the registers up in start_thread, the aout loader has never carried the hack in mainline. Initialising the registers in this way actually goes against the libc expectations for ELF binaries, where argc, argv and envp are passed on the stack, with r0 being used to hold a pointer to an exit function for cleaning up after the dynamic linker if required. If the pointer is NULL, then it is ignored. When execing an ELF binary, Linux currently zeroes r0, then sets it to argc and then finally clobbers it with the return value of the execve syscall, so we actually end up with: r0 = 0 stack[0] = argc r1 = stack[1] = argv r2 = stack[2] = envp libc treats r1 and r2 as undefined. The clobbering of r0 by sys_execve works for user-spawned threads, but when executing an ELF binary from a kernel thread (via call_usermodehelper), the execve is performed on the ret_from_fork path, which restores r0 from the saved pt_regs, resulting in argc being presented to the C library. This has horrible consequences when the application exits, since we have an exit function registered using argc, resulting in a jump to hyperspace. This patch solves the problem by removing the partial a.out support from arch/arm/ altogether. Cc: <stable@vger.kernel.org> Cc: Ashish Sangwan <ashishsangwan2@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7790/1: Fix deferred mm switch on VIVT processorsCatalin Marinas2013-07-263-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit b9d4d42ad9 (ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on pre-ARMv6 CPUs), the mm switching on VIVT processors is done in the finish_arch_post_lock_switch() function to avoid whole cache flushing with interrupts disabled. The need for deferred mm switch is stored as a thread flag (TIF_SWITCH_MM). However, with preemption enabled, we can have another thread switch before finish_arch_post_lock_switch(). If the new thread has the same mm as the previous 'next' thread, the scheduler will not call switch_mm() and the TIF_SWITCH_MM flag won't be set for the new thread. This patch moves the switch pending flag to the mm_context_t structure since this is specific to the mm rather than thread. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Marc Kleine-Budde <mkl@pengutronix.de> Tested-by: Marc Kleine-Budde <mkl@pengutronix.de> Cc: <stable@vger.kernel.org> # 3.5+ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on non-Cortex-A15Fabio Estevam2013-07-263-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 93dc688 (ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)) causes the following undefined instruction error on a mx53 (Cortex-A8): Internal error: Oops - undefined instruction: 0 [#1] SMP ARM CPU: 0 PID: 275 Comm: modprobe Not tainted 3.11.0-rc2-next-20130722-00009-g9b0f371 #881 task: df46cc00 ti: df48e000 task.ti: df48e000 PC is at check_and_switch_context+0x17c/0x4d0 LR is at check_and_switch_context+0xdc/0x4d0 This problem happens because check_and_switch_context() calls dummy_flush_tlb_a15_erratum() without checking if we are really running on a Cortex-A15 or not. To avoid this issue, only call dummy_flush_tlb_a15_erratum() inside check_and_switch_context() if erratum_a15_798181() returns true, which means that we are really running on a Cortex-A15. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7787/1: virt: ensure visibility of __boot_cpu_modeMark Rutland2013-07-262-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Secondary CPUs write to __boot_cpu_mode with caches disabled, and thus a cached value of __boot_cpu_mode may be incoherent with that in memory. This could lead to a failure to detect mismatched boot modes. This patch adds flushing to ensure that writes by secondaries to __boot_cpu_mode are made visible before we test against it. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7788/1: elf: fix lpae hwcap feature reporting in proc/cpuinfoTetsuyuki Kobayashi2013-07-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit a469abd0f868 ("ARM: elf: add new hwcap for identifying atomic ldrd/strd instructions") added a new hwcap to identify LPAE on CPUs which support it. Whilst the hwcap data is correct, the string reported in /proc/cpuinfo actually matches on HWCAP_VFPD32, which was missing an entry in the string table. This patch fixes this problem by adding a "vfpd32" string at the correct offset, preventing us from falsely advertising LPAE on CPUs which do not support it. [will: added commit message] Acked-by: Will Deacon <will.deacon@arm.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7786/1: hyp: fix macro parameterisationMark Rutland2013-07-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, compare_cpu_mode_with_primary uses a mixture of macro arguments and hardcoded registers, and does so incorrectly, as it stores (__boot_cpu_mode_offset | BOOT_CPU_MODE_MISMATCH) to (__boot_cpu_mode + &__boot_cpu_mode_offset), which could corrupt an arbitrary portion of memory. This patch fixes up compare_cpu_mode_with_primary to use the macro arguments, correctly updating __boot_cpu_mode. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Christoffer Dall <cdall@cs.columbia.edu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7785/1: mm: restrict early_alloc to section-aligned memoryRussell King2013-07-221-5/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When map_lowmem() runs, and processes a memory bank whose start or end is not section-aligned, memory must be allocated to store the 2nd-level page tables. Those allocations are made by calling memblock_alloc(). At this point, the only memory that is free *and* mapped is memory which has already been mapped by map_lowmem() itself. For this reason, we must calculate the first point at which map_lowmem() will need to allocate memory, and set the memblock allocation limit to a lower address, so that memblock_alloc() is guaranteed to return memory that is already mapped. This patch enhances sanity_check_meminfo() to calculate that memory address, and pass it to memblock_set_current_limit(), rather than just assuming the limit is arm_lowmem_limit. The algorithm applied is: * Default memblock_limit to arm_lowmem_limit in the absence of any other limit; arm_lowmem_limit is the highest memory that is mapped by map_lowmem(). * While walking the list of memblocks, if the start of a block is not aligned, 2nd-level page tables will need to be allocated to map the first few pages of the block. Hence, the memblock_limit must be before the start of the block. * Similarly, if the end of any block is not aligned, 2nd-level page tables will need to be allocated to map the last few pages of the block. Hence, the memblock_limit must point at the end of the block, rounded down to section-alignment. * The memory blocks are assumed to be sorted in address order, so the first unaligned block start or end is used to set the limit. With this algorithm, the start or end of almost any bank can be non- section-aligned. The only exception is that the start of bank 0 must be section-aligned, since otherwise memory would need to be allocated when mapping the start of bank 0, which occurs before any free memory is mapped. [swarren, wrote commit description, rewrote calculation of memblock_limit] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2Will Deacon2013-07-223-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ae8a8b9553bd ("ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead") added early function returns for page table cache flushing operations on ARMv7 SMP CPUs. Unfortunately, when targetting Thumb-2, these `mov pc, lr' sequences assemble to 2 bytes which can lead to corruption of the instruction stream after code patching. This patch fixes the alternates to use wide (32-bit) instructions for Thumb-2, therefore ensuring that the patching code works correctly. Cc: <stable@vger.kernel.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: document DEBUG_UNCOMPRESS Kconfig optionRussell King2013-07-221-2/+12
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This non-user visible option lacked any kind of documentation. This is quite common for non-user visible options; certian people can't understand the point of documenting such options with help text. However, here we have a case in point: developers don't understand the option either, as they were thinking that when the option is not set, the decompressor should produce no output what so ever. This is incorrect, as the purpose of this option is to control whether a multiplatform kernel uses the kernel debugging macros to produce output or not. So let's document this via help rather than commentry to prevent others falling into this misunderstanding. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | Merge branch 'parisc-3.11-rc4' of ↵Linus Torvalds2013-08-028-110/+354
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc updates from Helge Deller: "The majority of lines changed are due the addition of a defconfig for the C8000 machine. Even the fix in parisc/kernel/cache.c file is actually ony a 10-line fix, but the change became bigger (and much nicer) to avoid errors of the checkpatch script. Here is the short-changelog: This round of parisc updates includes mostly fixes for the C8000 workstation. We have a new defconfig file for this machine, as well as fixes for it's serial port, the AGP driver and the cache routines to cope with the vmas of the FireGL card in a C8000. The sys32.h header file was not used and as such it's now gone" * 'parisc-3.11-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Fix interrupt routing for C8000 serial ports parisc: Remove arch/parisc/kernel/sys32.h header parisc: add defconfig for c8000 machine parisc: agp/parisc-agp: allow binding of user memory to the AGP GART parisc: Fix cache routines to ignore vma's with an invalid pfn
| * | | parisc: Fix interrupt routing for C8000 serial portsThomas Bogendoerfer2013-07-312-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't use dev->mod_index for selecting the interrupt routing entry, because it's not an index into interrupt routing table. It will be even wrong on a machine with 2 CPUs (4 cores). But all needed information is contained in the PAT entries for the serial ports. mod[0] contains the iosapic address and mod_info has some indications for the interrupt input (at least it looks like it). This patch implements the searching for the right iosapic and uses this interrupt input information. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: <stable@vger.kernel.org> # 3.10 Signed-off-by: Helge Deller <deller@gmx.de>
| * | | parisc: Remove arch/parisc/kernel/sys32.h headerJohn David Anglin2013-07-314-46/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The KERNEL_SYSCALL define is not used anymore so the header can be removed. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
| * | | parisc: add defconfig for c8000 machineHelge Deller2013-07-311-0/+279
| | | | | | | | | | | | | | | | Signed-off-by: Helge Deller <deller@gmx.de>
| * | | parisc: Fix cache routines to ignore vma's with an invalid pfnJohn David Anglin2013-07-311-64/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The parisc architecture does not have a pte special bit. As a result, special mappings are handled with the VM_PFNMAP and VM_MIXEDMAP flags. VM_MIXEDMAP mappings may or may not have a "struct page" backing. When pfn_valid() is false, there is no "struct page" backing. Otherwise, they are treated as normal pages. The FireGL driver uses the VM_MIXEDMAP without a backing "struct page". This treatment caused a panic due to a TLB data miss in update_mmu_cache. This appeared to be in the code generated for page_address(). We were in fact using a very circular bit of code to determine the physical address of the PFN in various cache routines. This wasn't valid when there was no "struct page" backing. The needed address can in fact be determined simply from the PFN itself without using the "struct page". The attached patch updates update_mmu_cache(), flush_cache_mm(), flush_cache_range() and flush_cache_page() to check pfn_valid() and to directly compute the PFN physical and virtual addresses. Signed-off-by: John David Anglin <dave.anglin@bell.net> Cc: <stable@vger.kernel.org> # 3.10 Signed-off-by: Helge Deller <deller@gmx.de>
* | | | Merge tag 'please-pull-fix-mce-regression' of ↵Linus Torvalds2013-08-021-2/+2
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull MCE fix from Tony Luck: "Fix a regression in mce-severity.c" * tag 'please-pull-fix-mce-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: x86/mce: Fix mce regression from recent cleanup
| * | | | x86/mce: Fix mce regression from recent cleanupTony Luck2013-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 33d7885b594e169256daef652e8d3527b2298e75 x86/mce: Update MCE severity condition check We simplified the rules to recognise each classification of recoverable machine check combining the instruction and data fetch rules into a single entry based on clarifications in the June 2013 SDM that all recoverable events would be reported on the unaffected processor with MCG_STATUS.EIPV=0 and MCG_STATUS.RIPV=1. Unfortunately the simplified rule has a couple of bugs. Fix them here. Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | | | Merge tag 'pci-v3.11-fixes-1' of ↵Linus Torvalds2013-08-028-8/+8
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "Yinghai fixed a couple regressions: one resource assignment problem introduced in v3.10 that showed up with SR-IOV on powerpc, and another SR-IOV hot-remove issue related to refcounting changes we merged for v3.11. Yinghai is still working on another SR-IOV-related fix or two, which will be simpler if pciehp is non-modular, so I included the Kconfig changes now to get them in earlier. Finally, a minor fix for the ARM Marvell EBU host bridge driver that was merged for v3.11 Hotplug: PCI: pciehp: Fix null pointer deref when hot-removing SR-IOV device PCI: hotplug: Convert to be builtin only, not modular PCI: pciehp: Convert pciehp to be builtin only, not modular Resource allocation: PCI: Retry allocation of only the resource type that failed ARM: PCI: mvebu: Disable prefetchable memory support in PCI-to-PCI bridge" * tag 'pci-v3.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: mvebu: Disable prefetchable memory support in PCI-to-PCI bridge PCI: Retry allocation of only the resource type that failed PCI: pciehp: Convert pciehp to be builtin only, not modular PCI: hotplug: Convert to be builtin only, not modular PCI: pciehp: Fix null pointer deref when hot-removing SR-IOV device
| * | | | | PCI: hotplug: Convert to be builtin only, not modularBjorn Helgaas2013-07-258-8/+8
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert CONFIG_HOTPLUG_PCI from tristate to bool. This only affects the hotplug core; several of the hotplug drivers can still be modules. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Yinghai Lu <yinghai@kernel.org>
* | | | | Merge branch 'akpm' (patches from Andrew Morton)Linus Torvalds2013-07-311-0/+1
|\ \ \ \ \ | |_|_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge more patches from Andrew Morton: "A bunch of fixes. Plus Joe's printk move and rework. It's not a -rc3 thing but now would be a nice time to offload it, while things are quiet. I've been sitting on it all for a couple of weeks, no issues" * emailed patches from Andrew Morton <akpm@linux-foundation.org>: vmpressure: make sure there are no events queued after memcg is offlined vmpressure: do not check for pending work to prevent from new work vmpressure: change vmpressure::sr_lock to spinlock printk: rename struct log to struct printk_log printk: use pointer for console_cmdline indexing printk: move braille console support into separate braille.[ch] files printk: add console_cmdline.h printk: move to separate directory for easier modification drivers/rtc/rtc-twl.c: fix: rtcX/wakealarm attribute isn't created mm: zbud: fix condition check on allocation size thp, mm: avoid PageUnevictable on active/inactive lru lists mm/swap.c: clear PageActive before adding pages onto unevictable list arch/x86/platform/ce4100/ce4100.c: include reboot.h mm: sched: numa: fix NUMA balancing when !SCHED_DEBUG rapidio: fix use after free in rio_unregister_scan() .gitignore: ignore *.lz4 files MAINTAINERS: dynamic debug: Jason's not there... dmi_scan: add comments on dmi_present() and the loop in dmi_scan_machine() ocfs2/refcounttree: add the missing NULL check of the return value of find_or_create_page() mm: mempolicy: fix mbind_range() && vma_adjust() interaction
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-28 18:44:12 +0000