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* Merge branch 'cleanup/kconfig' into next/driversArnd Bergmann2014-03-1833-228/+12
|\ | | | | | | | | | | | | This resolves a conflict between the new sti reset controller driver and the Kconfig cleanup. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: virt: select ARM_AMBARob Herring2014-02-191-1/+2
| | | | | | | | | | | | | | | | Guests can use AMBA bus devices such as the PL011 uart, so enable the AMBA bus for mach-virt. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Russell King <linux@arm.linux.org.uk>
| * ARM: virt: make mach-virt just a kconfig optionRob Herring2014-02-195-55/+6
| | | | | | | | | | | | | | | | | | The mach code for mach-virt is no longer needed, so we can remove all of mach-virt except the kconfig entry. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
| * ARM: vt8500: enable V6K instead of plain V6Rob Herring2014-02-191-1/+0
| | | | | | | | | | | | | | | | | | The wm8750 is an ARM1176 which has all the V6K extensions except for SMP, so V6K should be selected instead. Dropping the select will use the default for ARCH_MULTI_V6 which is V6K. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Tony Prisk <linux@prisktech.co.nz>
| * ARM: cns3xxx: enable V6K instead of plain V6Rob Herring2014-02-191-1/+0
| | | | | | | | | | | | | | | | | | The cns3xxx is an ARM11MPCore which has all the V6K extensions, so V6K should be selected instead. Dropping the select will use the default for ARCH_MULTI_V6 which is V6K. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Anton Vorontsov <anton@enomsg.org>
| * ARM: bcm2835: enable V6K instead of plain V6Rob Herring2014-02-191-1/+0
| | | | | | | | | | | | | | | | | | The bcm2835 is an ARM1176 which has all the V6K extensions except for SMP, so V6K should be selected instead. Dropping the select will use the default for ARCH_MULTI_V6 which is V6K. Signed-off-by: Rob Herring <robh@kernel.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
| * ARM: Select V6K instead of V6 by default for multi-platformRob Herring2014-02-194-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | MULTI_V6 should default to V6K as it is more optimal than V6. Any platform which is not V6K should select CPU_V6 which will enable the less optimal code paths. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Anton Vorontsov <anton@enomsg.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: select MIGHT_HAVE_CACHE_L2X0 for V6 and V7 multi-platformRob Herring2014-02-1911-10/+1
| | | | | | | | | | | | | | | | | | | | Many V6 and V7 platforms have an L2x0 cache, so make CONFIG_MIGHT_HAVE_CACHE_L2X0 visible for V6 and V7 multi-platform builds. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: select HAVE_SMP for V7 multi-platformRob Herring2014-02-1919-19/+1
| | | | | | | | | | | | | | | | | | All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7 multi-platform builds. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
| * ARM: centralize common multi-platform kconfig optionsRob Herring2014-02-1930-138/+2
| | | | | | | | | | | | | | | | | | | | | | | | Multi-platform requires various kconfig options to be selected, so platforms don't need to select them individually. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
* | Merge tag 'sti-reset-for-v3.15' of ↵Arnd Bergmann2014-03-181-0/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.stlinux.com/devel/kernel/linux-sti into next/drivers Merge "STi Reset controller support" from Srinivas Kandagatla: * tag 'sti-reset-for-v3.15' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: STi: Add reset controller support to mach-sti KconfigStephen Gallimore2014-03-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch selects reset controller support for ARCH_STI and selects the reset controllers for STiH415 and STiH416 SoCs. Signed-off-by: Stephen Gallimore <stephen.gallimore@st.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
* | | Merge branch 'sti/dt' into next/driversArnd Bergmann2014-03-188-0/+601
|\| | | | | | | | | | | | | | | | | This is apparently a dependency for the STi reset controller driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | ARM: STi: STIH416: Add IR support.Srinivas Kandagatla2014-03-112-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds IRB support to STiH416 platforms. Tested on B2000 and B2020 development board Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STIH415: Add IR support.Srinivas Kandagatla2014-03-112-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds IRB support to STiH415 platforms. Tested on B2000 and B2020 development boards. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH416: Add ethernet support.Srinivas Kandagatla2014-03-113-0/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to STiH416 SOC, which has two ethernet snps,dwmac controllers version 3.710. With this patch B2000 and B2020 boards can boot with ethernet in MII and RGMII modes. Tested on both B2020 and B2000. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH415: Add ethernet support.Srinivas Kandagatla2014-03-115-0/+218
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to STiH415 SOC, which has two ethernet snps,dwmac controllers version 3.610. With this patch B2000 and B2020 boards can boot with ethernet in MII and RGMII modes. Tested on both B2020 and B2000. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH416: Add soft reset controller support.Srinivas Kandagatla2014-03-111-0/+5
| | | | | | | | | | | | | | | | | | | | | This patch adds soft reset controller support for STiH415 and adds new softreset lines required for other device tree nodes in the header file. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH416: Add reset controller support.Srinivas Kandagatla2014-03-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a reset controller node to the SOC device tree and also adds new header files with reset lines required for other device tree nodes. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH415: Add soft reset controller support.Srinivas Kandagatla2014-03-111-0/+5
| | | | | | | | | | | | | | | | | | | | | This patch adds soft reset controller support for STiH415 and adds new softreset lines required for other device tree nodes in the header file. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH415: Add reset controller support.Srinivas Kandagatla2014-03-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds a reset controller node to the SOC device tree and also adds new header files with reset lines required for other device tree nodes. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH415: Add interrupt support for pin controllerSrinivas Kandagatla2014-03-111-0/+75
| | | | | | | | | | | | | | | | | | This patch adds interrupt support for STiH415 pin controllers. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
| * | ARM: STi: STiH416: Add interrupt support for pin controllerSrinivas Kandagatla2014-03-111-0/+81
| | | | | | | | | | | | | | | | | | This patch adds interrupt support for STiH416 pin controllers. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
* | | Merge tag 'socfpga_updates_for_3.15_v2' of ↵Arnd Bergmann2014-03-178-26/+171
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.rocketboards.org/linux-socfpga-next into next/drivers Merge "SOCFPGA updates for 3.15 version 2" from Dinh Nguyen: *Update SOCFPGA DTS to include ethernet, sd/mmc, and clock fixes *Add stmmac ethernet glue layer *Update socfpga_defconfig to include sd/mmc, and micrel_phy * tag 'socfpga_updates_for_3.15_v2' of git://git.rocketboards.org/linux-socfpga-next: dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | dts: socfpga: Add sysmgr node so the gmac can use to referenceDinh Nguyen2014-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit[7e0b4cd dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.] references the sysmgr through its phandle. This patch adds the appropriate sysmgr node for the gmac to use. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
| * | | dts: socfpga: Add support for SD/MMC on the SOCFPGA platformDinh Nguyen2014-03-094-3/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce "altr,socfpga-dw-mshc" to enable Altera's SOCFPGA platform specific implementation of the dw_mmc driver. Also add the "syscon" binding to the "altr,sys-mgr" node. The clock driver can use the syscon driver to toggle the register for the SD/MMC clock phase shift settings. Finally, fix an indentation error for the sysmgr node. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Tested-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Chris Ball <chris@printf.net>
| * | | dts: socfpga: Update clock entry to support multiple parentsDinh Nguyen2014-03-021-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The periph_pll and sdram_pll can have multiple parents. Update the device tree to list all the possible parents for the PLLs. Add an entry for the the f2s_sdram_ref_clk, which is a possible parent for the sdram_pll. Also remove the clock-frequency entry in the f2s_periph_ref_clk, as this property should be placed in dts file. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
| * | | ARM: socfpga: Update socfpga_defconfigDinh Nguyen2014-03-021-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_MICREL_PHY=y CONFIG_EXT3_FS=y CONFIG_NFS_FS=y CONFIG_ROOT_NFS=y CONFIG_MMC=y CONFIG_MMC_DW=y Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
| * | | dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.Dinh Nguyen2014-03-025-17/+103
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the dts bindings documenation for the Altera SOCFPGA glue layer for the Synopsys STMMAC ethernet driver. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: David S. Miller <davem@davemloft.net> --- v3: Remove stray empty line at end of socfpga_cyclone5_socdk.dts v2: Use the dwmac-sti as an example for a glue layer and split patch up to have dts as a separate patch. Also cc dts maintainers since there is a new binding.
* | | Merge tag 'renesas-clock4-for-v3.15' of ↵Olof Johansson2014-03-171-7/+8
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Merge "Fourth Round of Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman: r8a7791 (R-Car M2) SoC * Correct SCIFA3-5 clocks * tag 'renesas-clock4-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: shmobile: r8a7791: Fix SCIFA3-5 clocksGeert Uytterhoeven2014-03-131-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MSTP clocks for SCIFA3-5 are MSTP1106-1108, not MSTP1105-1107 Also reinsert them at the correct position to preserve sort order. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'renesas-clock3-for-v3.15' of ↵Olof Johansson2014-03-171-1/+1
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Merge "Third Round of Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman: r7s72100 (RZ/A1H) SoC * Correct bus clock calculation * tag 'renesas-clock3-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r7s72100: fix bus clock calculation Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: shmobile: r7s72100: fix bus clock calculationWolfram Sang2014-03-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The picture in the datasheet is a little misleading, yet the divider of the bus_clk is 1/3 and not 2/3. Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'renesas-clock2-for-v3.15' of ↵Olof Johansson2014-03-172-1/+25
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman: r8a7790 (R-Car H2) SoC - Add sound SCU clock support r8a7791 (R-Car M2) SoC - Remove legacy clock aliases for DT devices * tag 'renesas-clock2-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7790: add sound SCU clock support ARM: shmobile: r8a7791: Remove legacy clock aliases for DT devices Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: shmobile: r8a7790: add sound SCU clock supportKuninori Morimoto2014-02-241-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed to use SRC (= Sampling Rate Converter). MSTP1017 is defined top of MSTPxxx list to avoid runtime error, since it is parent clock of MSTP1031 - MSTP1022 Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7791: Remove legacy clock aliases for DT devicesLaurent Pinchart2014-02-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the r8a7791 DT platforms use the common clock framework, there's no need to manually create clock aliases for devices instantiated through DT, as those devices will reference their clocks directly in the device tree. Remove those aliases. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'renesas-clock-for-v3.15' of ↵Olof Johansson2014-03-175-16/+134
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Merge "Renesas ARM Based SoC Clock Updates for v3.15" from Simon Horman: * r7s72100 SoC (RZ/A1H) - Add clock for SH Ethernet - Add RSPI clocks * r8a7791 (R-Car M2) - Add QSPI and SDHI clocks * r8a7790 (R-Car H2) - Add audio clock - Remove legacy DT clocks - Correct SYS DMAC clock defines * tag 'renesas-clock-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Remove legacy r8a7790 DT clocks ARM: shmobile: Add r8a7791 legacy SDHI clocks ARM: shmobile: r8a7790: Correct SYS DMAC clock defines ARM: shmobile: r7s72100: Add clock for r7s72100-ether ARM: shmobile: r8a7791 clock: add QSPI clocks ARM: shmobile: r7s72100 clock: Add RSPI clocks for DT ARM: shmobile: r7s72100 clock: Add RSPI clocks ARM: shmobile: r8a7790: add audio clock ARM: shmobile: r8a7778: add audio clock in new style Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | ARM: shmobile: Remove legacy r8a7790 DT clocksMagnus Damm2014-02-241-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DT device case is handled by CCF these days, so get rid of DT devices from the legacy clocks for r8a7790. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: Add r8a7791 legacy SDHI clocksMagnus Damm2014-02-241-2/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add legacy r8a7791 SDHI clocks. This to allow the SDHI devices to be used by legacy Koelsch board support. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r7s72100: Add clock for r7s72100-etherSimon Horman2014-02-241-0/+4
| | | | | | | | | | | | | | | | | | | | Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7791 clock: add QSPI clocksGeert Uytterhoeven2014-02-241-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QSPI clock divider value depends on the MD1, MD2, and MD3 mode switches. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r7s72100 clock: Add RSPI clocks for DTGeert Uytterhoeven2014-02-241-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT-style ("%08x.spi") clocks, as Genmai doesn't use the common clock framework yet. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r7s72100 clock: Add RSPI clocksGeert Uytterhoeven2014-02-241-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7790: add audio clockKuninori Morimoto2014-02-242-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current audio clock doesn't have dependency to device/driver, but, it is not good design for DT support. To avoid branch merge conflict issue, it uses this load map, and this patch is 1) part. 1) add old/new style clock in platform 2) add new style clock method in driver 3) remove old tyle clock from platform Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | ARM: shmobile: r8a7778: add audio clock in new styleKuninori Morimoto2014-02-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current audio clock doesn't have dependency to device/driver, but, it is not good design for DT support. To avoid branch merge conflict issue, it uses this load map, and this patch is 1) part. 1) add new style clock in platform 2) add new style clock method in driver 3) remove old tyle clock from platform Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | | | Merge tag 'omap-for-v3.15/crossbar-signed' of ↵Olof Johansson2014-03-083-2/+7
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers Merge OMAP crossbar support from Tony Lindgren: Add support for GIC crossbar that routes interrupts on newer omaps. Looks like people wanted these merged via the omap tree as it's the only user for the GIC crossbar. * tag 'omap-for-v3.15/crossbar-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: DRA: Enable Crossbar IP support for DRA7XX ARM: OMAP4+: Correct Wakeup-gen code to use physical irq number DRIVERS: IRQCHIP: CROSSBAR: Add support for Crossbar IP DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: DRA: Enable Crossbar IP support for DRA7XXSricharan R2014-02-052-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the crossbar IP support for DRA7xx soc. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | ARM: OMAP4+: Correct Wakeup-gen code to use physical irq numberSricharan R2014-02-051-2/+2
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wakeup gen mask/unmask callback uses the irq element of the irq_data to setup. The irq is the linux virtual irq number and is same as the hardware irq number only when the parent irqchip is setup as a legacy domain. When it is used as a linear domain, the virtual irqs are allocated dynamically and wakeup gen code cannot rely on these numbers to access the irq registers. Instead use the hwirq element of the irq_data which represent the physical irq number. Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* | | | Merge branch 'qcom/cleanup' into next/driversArnd Bergmann2014-02-2522-687/+215
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * qcom/cleanup: ARM: qcom: Rename various msm prefixed functions to qcom clocksource: qcom: split building of legacy vs multiplatform support ARM: qcom: Split Qualcomm support into legacy and multiplatform clocksource: qcom: Move clocksource code out of mach-msm ARM: msm: kill off hotplug.c ARM: msm: Remove pen_release usage ARM: dts: msm: split out msm8660 and msm8960 soc into dts include This cleanup branch is a dependency for the following qcom driver changes. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | | ARM: qcom: Rename various msm prefixed functions to qcomKumar Gala2014-02-062-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As mach-qcom will support a number of different Qualcomm SoC platforms we replace the msm prefix on function names with qcom to be a bit more generic. Signed-off-by: Kumar Gala <galak@codeaurora.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-25 22:36:28 +0000