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* Blackfin: fix framebuffer mmap bug for nommuThomas Chou2009-10-082-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch added a special get_unmapped_area for framebuffer which was hooked to the file ops in drivers/video/fbmem.c. This is needed since v2.6.29-rc1 where nommu vma management was updated, and mmap of framebuffer caused kernel BUG panic. You may turn on "Debug the global anon/private NOMMU mapping region tree" config to such message. As Documentation/nommu-mmap.txt said, "To provide shareable character device support, a driver must provide a file->f_op->get_unmapped_area() operation. The mmap() routines will call this to get a proposed address for the mapping." With this change, user space should call mmap for framebuffer using shared map. Or it can try shared map first, then private map if failed. This shared map usage is now consistent between mmu and nommu. The sys_ file may not be a good place for this patch. But there is a similar one for sparc. I tested a similar patch on nios2nommu, though I don't have a blackfin board to test. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: includecheck fix: mach-bf548, ezkit.cJaswinder Singh Rajput2009-10-081-1/+0
| | | | | | | | | Fix the following 'make includecheck' warning: arch/blackfin/mach-bf548/boards/ezkit.c: linux/input.h is included more than once. Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: drop cs_change_per_word settingMike Frysinger2009-10-085-8/+0
| | | | | | | | Structs get initialized to 0 already, and we want to punt this field, so scrub it from all of our boards. Reported-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bf533-ezkit: convert to physmap/jedec_probeMike Frysinger2009-10-081-25/+41
| | | | | | | Now that the common jedec_probe supports the ST PSD4256G6V, no need to use the custom stm_flash driver. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: convert adv7393 resources to new i2c frameworkMichael Hennerich2009-10-085-50/+31
| | | | | | | | Now that the driver has been updated, convert the board resources to the new i2c framework for managing slaves. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: fix missed cache config renamesGraf Yang2009-10-071-2/+2
| | | | | | | | Looks like the big Kconfig cache split/rename missed one spot in the SMP cache lock headers. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: cplbinfo: drop d_path() hacksMike Frysinger2009-10-071-13/+12
| | | | | | | | | | | The cplbinfo was using d_path() to figure out which cpu/cplb was being parsed. As Al pointed out, this isn't exactly reliable as it assumes the static VFS path to be unchanged, and it's just poor form. So use the proc_create_data() to properly (and internally) pass the exact cpu/cplb requested to the parser function. Reported-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: asm/irq.h: pull in mach/anomaly.h for anomaly definesMike Frysinger2009-10-071-0/+2
| | | | | | | The asm/irq.h header uses anomaly defines, but doesn't make sure to explicitly include the anomaly header for them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: BF51x: add PTP MMR definesBarry Song2009-10-072-0/+69
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* Blackfin: mass clean up of copyright/licensing infoRobin Getz2009-10-07248-4298/+893
| | | | | | | | | | | | | | | | | | Bill Gatliff & David Brownell pointed out we were missing some copyrights, and licensing terms in some of the files in ./arch/blackfin, so this fixes things, and cleans them up. It also removes: - verbose GPL text(refer to the top level ./COPYING file) - file names (you are looking at the file) - bug url (it's in the ./MAINTAINERS file) - "or later" on GPL-2, when we did not have that right It also allows some Blackfin-specific assembly files to be under a BSD like license (for people to use them outside of Linux). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: convert to use arch_gettimeoffset()john stultz2009-10-072-65/+8
| | | | | | | | | | | | | | | Convert Blackfin to use GENERIC_TIME via the arch_getoffset() infrastructure, reducing the amount of arch specific code we need to maintain. I've taken my best swing at converting this, but I'm not 100% confident I got it right. My cross-compiler is now out of date (gcc4.2) so I wasn't able to check if it compiled. Any assistance from arch maintainers or testers to get this merged would be great. Signed-off-by: John Stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'kvm-updates/2.6.32' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2009-10-058-30/+106
|\ | | | | | | | | | | | | | | | | | | | | | | | | * 'kvm-updates/2.6.32' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: add support for change_pte mmu notifiers KVM: MMU: add SPTE_HOST_WRITEABLE flag to the shadow ptes KVM: MMU: dont hold pagecount reference for mapped sptes pages KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUID KVM: VMX: flush TLB with INVEPT on cpu migration KVM: fix LAPIC timer period overflow KVM: s390: fix memsize >= 4G KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctly KVM: SVM: Fix tsc offset adjustment when running nested
| * KVM: add support for change_pte mmu notifiersIzik Eidus2009-10-042-9/+54
| | | | | | | | | | | | | | | | | | | | this is needed for kvm if it want ksm to directly map pages into its shadow page tables. [marcelo: cast pfn assignment to u64] Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: MMU: add SPTE_HOST_WRITEABLE flag to the shadow ptesIzik Eidus2009-10-042-7/+26
| | | | | | | | | | | | | | | | | | | | | | this flag notify that the host physical page we are pointing to from the spte is write protected, and therefore we cant change its access to be write unless we run get_user_pages(write = 1). (this is needed for change_pte support in kvm) Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: MMU: dont hold pagecount reference for mapped sptes pagesIzik Eidus2009-10-041-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using mmu notifiers, we are allowed to remove the page count reference tooken by get_user_pages to a specific page that is mapped inside the shadow page tables. This is needed so we can balance the pagecount against mapcount checking. (Right now kvm increase the pagecount and does not increase the mapcount when mapping page into shadow page table entry, so when comparing pagecount against mapcount, you have no reliable result.) Signed-off-by: Izik Eidus <ieidus@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: Prevent overflow in KVM_GET_SUPPORTED_CPUIDAvi Kivity2009-10-041-0/+2
| | | | | | | | | | | | | | | | | | The number of entries is multiplied by the entry size, which can overflow on 32-bit hosts. Bound the entry count instead. Reported-by: David Wagner <daw@cs.berkeley.edu> Cc: stable@kernel.org Signed-off-by: Avi Kivity <avi@redhat.com>
| * KVM: VMX: flush TLB with INVEPT on cpu migrationMarcelo Tosatti2009-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | It is possible that stale EPTP-tagged mappings are used, if a vcpu migrates to a different pcpu. Set KVM_REQ_TLB_FLUSH in vmx_vcpu_load, when switching pcpus, which will invalidate both VPID and EPT mappings on the next vm-entry. Cc: stable@kernel.org Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: fix LAPIC timer period overflowAurelien Jarno2009-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | Don't overflow when computing the 64-bit period from 32-bit registers. Fixes sourceforge bug #2826486. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Cc: stable@kernel.org Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: s390: fix memsize >= 4GChristian Borntraeger2009-10-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | commit 628eb9b8a8f3 KVM: s390: streamline memslot handling introduced kvm_s390_vcpu_get_memsize. This broke guests >=4G, since this function returned an int. This patch changes the return value to a long. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
| * KVM: SVM: Handle tsc in svm_get_msr/svm_set_msr correctlyJoerg Roedel2009-10-041-6/+17
| | | | | | | | | | | | | | | | | | | | When running nested we need to touch the l1 guests tsc_offset. Otherwise changes will be lost or a wrong value be read. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * KVM: SVM: Fix tsc offset adjustment when running nestedJoerg Roedel2009-10-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | When svm_vcpu_load is called while the vcpu is running in guest mode the tsc adjustment made there is lost on the next emulated #vmexit. This causes the tsc running backwards in the guest. This patch fixes the issue by also adjusting the tsc_offset in the emulated hsave area so that it will not get lost. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* | Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-10-053-1/+5
|\ \ | | | | | | | | | | | | | | | * 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Clear sticky FSR register after saving it to func parametr microblaze: UMS is used only for MMU kernel
| * | microblaze: Clear sticky FSR register after saving it to func parametrMichal Simek2009-10-052-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previous patch d63678d607d0e37ec7abe5ceb545d7e8aab956a4 clear it for noMMU kernel. This one do it for MMU. Correct noMMU version Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: UMS is used only for MMU kernelMichal Simek2009-10-051-0/+2
| |/ | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2009-10-056-59/+547
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc: using HZ needs an include of linux/param.h sparc32: convert to asm-generic/hardirq.h sparc64: Cache per-cpu %pcr register value in perf code. sparc64: Fix comment typo in perf_event.c sparc64: Minor coding style fixups in perf code. sparc64: Add a basic conflict engine in preparation for multi-counter support. sparc64: Increase vmalloc size to fix percpu regressions. sparc64: Add initial perf event conflict resolution and checks. sparc: Niagara1 perf event support. sparc: Add Niagara2 HW cache event support. sparc: Support all ultra3 and ultra4 derivatives. sparc: Support HW cache events.
| * | sparc: using HZ needs an include of linux/param.hStephen Rothwell2009-10-051-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc32: convert to asm-generic/hardirq.hChristoph Hellwig2009-10-012-13/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From: Christoph Hellwig <hch@lst.de> [akpm@linux-foundation.org: /arch/sparc/include/asm/irq_32.h: move NR_IRQS definition] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Cache per-cpu %pcr register value in perf code.David S. Miller2009-09-291-17/+42
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Fix comment typo in perf_event.cDavid S. Miller2009-09-291-1/+1
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Minor coding style fixups in perf code.David S. Miller2009-09-281-7/+5
| | | | | | | | | | | | | | | | | | | | | These got introduced during the counter --> event tree-wide renaming. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Add a basic conflict engine in preparation for multi-counter support.David S. Miller2009-09-281-5/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware counter ->event_base state records and encoding of the "struct perf_event_map" entry used for the event. We use this to make sure that when we have more than 1 event, both can be scheduled into the hardware at the same time. As usual, structure of code is largely cribbed from powerpc. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Increase vmalloc size to fix percpu regressions.David S. Miller2009-09-282-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we now use the embedding percpu allocator we have to make the vmalloc area at least as large as the stretch can be between nodes. Besides some minor asm adjustments, this turned out to be pretty trivial. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Add initial perf event conflict resolution and checks.David S. Miller2009-09-271-5/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | Cribbed from powerpc code, as usual. :-) Currently it is only used to validate that all counters have the same user/kernel/hv attributes. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Niagara1 perf event support.David S. Miller2009-09-261-0/+119
| | | | | | | | | | | | | | | | | | | | | This chip is extremely limited, and many of the events supported are approximations at best. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Add Niagara2 HW cache event support.David S. Miller2009-09-261-0/+88
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Support all ultra3 and ultra4 derivatives.David S. Miller2009-09-261-10/+13
| | | | | | | | | | | | | | | | | | | | | For the generic events we support, all of these chips have the same encodings as ultra3i. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc: Support HW cache events.David S. Miller2009-09-261-6/+139
| | | | | | | | | | | | | | | | | | First supported chip for HW cache events is Ultra-IIIi. Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2009-10-056-21/+35
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: Don't leak 64-bit kernel register values to 32-bit processes x86, SLUB: Remove unused CONFIG FAST_CMPXCHG_LOCAL x86: earlyprintk: Fix regression to handle serial,ttySn as 1 arg x86: Don't generate cmpxchg8b_emu if CONFIG_X86_CMPXCHG64=y x86: Fix csum_ipv6_magic asm memory clobber x86: Optimize cmpxchg64() at build-time some more
| * | | x86: Don't leak 64-bit kernel register values to 32-bit processesJan Beulich2009-10-011-13/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While 32-bit processes can't directly access R8...R15, they can gain access to these registers by temporarily switching themselves into 64-bit mode. Therefore, registers not preserved anyway by called C functions (i.e. R8...R11) must be cleared prior to returning to user mode. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: <stable@kernel.org> LKML-Reference: <4AC34D73020000780001744A@vpn.id2.novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86, SLUB: Remove unused CONFIG FAST_CMPXCHG_LOCALJaswinder Singh Rajput2009-10-011-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused CONFIG FAST_CMPXCHG_LOCAL from Kconfig. Reported-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Acked-by: Christoph Lameter <cl@linux-foundation.org> Cc: Pekka Enberg <penberg@cs.helsinki.fi> Cc: Matt Mackall <mpm@selenic.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: "Robert P. J. Day" <rpjday@crashcourse.ca> Cc: linux-mm@kvack.org LKML-Reference: <1253981501.4568.61.camel@ht.satnam> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86: earlyprintk: Fix regression to handle serial,ttySn as 1 argJason Wessel2009-10-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c953094 ("early_printk: Allow more than one early console") introduced a regression in the parsing of the earlyprintk= kernel arguments. If you specify "earlyprintk=serial,ttyS0,115200" as a kernel argument, the "serial,ttyS" should be parsed as a single argument and not as "serial" and then "ttyS". Also update the documentation to reflect you can specify the ttyS directly without the "serial" argument. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Cc: Len Brown <lenb@kernel.org> Cc: Greg KH <gregkh@suse.de> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Johannes Weiner <hannes@cmpxchg.org> LKML-Reference: <4ABB7D5E.6000301@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86: Don't generate cmpxchg8b_emu if CONFIG_X86_CMPXCHG64=yEric Dumazet2009-10-012-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conditionaly compile cmpxchg8b_emu.o and EXPORT_SYMBOL(cmpxchg8b_emu). This reduces the kernel size a bit. Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <4AC43E7E.1000600@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86: Fix csum_ipv6_magic asm memory clobberSamuel Thibault2009-10-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just like ip_fast_csum, the assembly snippet in csum_ipv6_magic needs a memory clobber, as it is only passed the address of the buffer, not a memory reference to the buffer itself. This caused failures in Hurd's pfinetv4 when we tried to compile it with gcc-4.3 (bogus checksums). Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Acked-by: David S. Miller <davem@davemloft.net> Cc: Andi Kleen <andi@firstfloor.org> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | x86: Optimize cmpxchg64() at build-time some moreLinus Torvalds2009-10-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Try to avoid the 'alternates()' code when we can statically determine that cmpxchg8b is fine. We already have that CONFIG_x86_CMPXCHG64 (enabled by PAE support), and we could easily also enable it for some of the CPU cases. Note, this patch only adds CMPXCHG8B for the obvious Intel CPU's, not for others. (There was something really messy about cmpxchg8b and clone CPU's, so if you enable it on other CPUs later, do it carefully.) If we avoid that asm-alternative thing when we can assume the instruction exists, we'll generate less support crud, and we'll avoid the whole issue with that extra 'nop' for padding instruction sizes etc. LKML-Reference: <alpine.LFD.2.01.0909301743150.6996@localhost.localdomain> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2009-10-057-53/+52
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68knommu: fix rename of pt_regs offset defines breakage m68knommu: remove duplicated #include m68knommu: show KiB rather than pages in "Freeing initrd memory:" message
| * | | m68knommu: fix rename of pt_regs offset defines breakageGreg Ungerer2009-09-305-51/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f159ee782990aacb5494738c98f13a2aa61dbb4a ("locking, m68k/asm-offsets: Rename pt_regs offset defines") breaks the m68knommu entry code that relies on these define names. Fix the files to match the new define names. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove duplicated #includeHuang Weiyi2009-09-301-1/+0
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: show KiB rather than pages in "Freeing initrd memory:" messageLennart Sorensen2009-09-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix "Freeing initrd memory:" message m68knommu to show kilobytes as claimed rather than number of pages. Signed-off-by: Lennart Sorensen <lsorense@csclub.uwaterloo.ca> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | | | Merge branch 'for-linus' of git://www.linux-m32r.org/git/takata/linux-2.6_devLinus Torvalds2009-10-037-13/+34
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://www.linux-m32r.org/git/takata/linux-2.6_dev: m32r: Fix IPI function calls for SMP m32r: Fix set_memory() for DISCONTIGMEM m32r: add rtc_lock variable m32r: define ioread* and iowrite* macros m32r: export delay loop symbols m32r: fix tme_handler
| * | | | m32r: Fix IPI function calls for SMPToshihiro HANAWA2009-10-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the m32r SMP kernel after 2.6.27. A part of the following patch breaks m32r SMP operation. > m32r: convert to generic helpers for IPI function calls > commit 7b7426c8a615cf61df9a77b9df7d5b75d91e3fa0 In the above patch, a CALL_FUNC_SINGLE_IPI was newly introduced, but the its IPI vector number was wrong in the patch code. The m32r SMP kernel hanged-up during boot operation, because the CPU_BOOT_IPI was called instead of CALL_FUNC_SINGLE_IPI (CPU_BOOT_IPI had no side effect at that time because the 2nd core had already been started up), as a result, csd_unlock() was not called, then a dead lock occurred in csd_lock_wait() after the detection of Compact Flash memory as IDE generic disk. Signed-off-by: Toshihiro HANAWA <hanawa@ccs.tsukuba.ac.jp> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
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