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* Merge branch 'parisc-for-3.10' of ↵Linus Torvalds2013-05-269-57/+57
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc fixes from Helge Deller: "This time we made the kernel- and interruption stack allocation reentrant which fixed some strange kernel crashes (specifically protection ID traps). Furthemore this patchset fixes the interrupt stack in UP and SMP configurations by using native locking instructions. And finally usage of floating point calculations on parisc were disabled in the MPILIB." * 'parisc-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: fix irq stack on UP and SMP parisc/superio: Use module_pci_driver to register driver parisc: make interrupt and interruption stack allocation reentrant parisc: show number of FPE and unaligned access handler calls in /proc/interrupts parisc: add additional parisc git tree to MAINTAINERS file parisc: use PAGE_SHIFT instead of hardcoded value 12 in pacache.S parisc: add rp5470 entry to machine database MPILIB: disable usage of floating point registers on parisc
| * parisc: fix irq stack on UP and SMPHelge Deller2013-05-243-41/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The logic to detect if the irq stack was already in use with raw_spin_trylock() is wrong, because it will generate a "trylock failure on UP" error message with CONFIG_SMP=n and CONFIG_DEBUG_SPINLOCK=y. arch_spin_trylock() can't be used either since in the CONFIG_SMP=n case no atomic protection is given and we are reentrant here. A mutex didn't worked either and brings more overhead by turning off interrupts. So, let's use the fastest path for parisc which is the ldcw instruction. Counting how often the irq stack was used is pretty useless, so just drop this piece of code. Signed-off-by: Helge Deller <deller@gmx.de>
| * parisc: make interrupt and interruption stack allocation reentrantJohn David Anglin2013-05-242-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The get_stack_use_cr30 and get_stack_use_r30 macros allocate a stack frame for external interrupts and interruptions requiring a stack frame. They are currently not reentrant in that they save register context before the stack is set or adjusted. I have observed a number of system crashes where there was clear evidence of stack corruption during interrupt processing, and as a result register corruption. Some interruptions can still occur during interruption processing, however external interrupts are disabled and data TLB misses don't occur for absolute accesses. So, it's not entirely clear what triggers this issue. Also, if an interruption occurs when Q=0, it is generally not possible to recover as the shadowed registers are not copied. The attached patch reworks the get_stack_use_cr30 and get_stack_use_r30 macros to allocate stack before doing register saves. The new code is a couple of instructions shorter than the old implementation. Thus, it's an improvement even if it doesn't fully resolve the stack corruption issue. Based on limited testing, it improves SMP system stability. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
| * parisc: show number of FPE and unaligned access handler calls in ↵Helge Deller2013-05-244-0/+14
| | | | | | | | | | | | | | | | | | /proc/interrupts Show number of floating point assistant and unaligned access fixup handler in /proc/interrupts file. Signed-off-by: Helge Deller <deller@gmx.de>
| * parisc: use PAGE_SHIFT instead of hardcoded value 12 in pacache.SHelge Deller2013-05-241-6/+6
| | | | | | | | | | | | additionally clean up some whitespaces & tabs. Signed-off-by: Helge Deller <deller@gmx.de>
| * parisc: add rp5470 entry to machine databaseHelge Deller2013-05-241-0/+1
| | | | | | | | Signed-off-by: Helge Deller <deller@gmx.de>
* | score: remove redundant kcore_list entriesKyle McMartin2013-05-251-2/+0
| | | | | | | | | | | | | | | | | | | | kcore_vmalloc is in fs/proc/kcore.c and kcore_mem is unused across the tree. Noticed while grepping the tree for some other kcore stuff. (score looks pretty unmaintained to me.) Signed-off-by: Kyle McMartin <kyle@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge tag 'arc-v3.10-fixes' of ↵Linus Torvalds2013-05-2511-70/+41
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: - Fallouts/wreckage of Cache Flush optimizations / aliasing dcache support - Fix for an interesting bug where piped input to grep was getting mysteriously clobbered * tag 'arc-v3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: lazy dcache flush broke gdb in non-aliasing configs ARC: Use enough bits for determining page's cache color ARC: Brown paper bag bug in macro for checking cache color ARC: copy_(to|from)_user() to honor usermode-access permissions ARC: [mm] Prevent stray dcache lines after__sync_icache_dcach() ARC: [TB10x] Remove redundant abilis,simple-pinctrl mechanism
| * | ARC: lazy dcache flush broke gdb in non-aliasing configsVineet Gupta2013-05-252-19/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gdbserver inserting a breakpoint ends up calling copy_user_page() for a code page. The generic version of which (non-aliasing config) didn't set the PG_arch_1 bit hence update_mmu_cache() didn't sync dcache/icache for corresponding dynamic loader code page - causing garbade to be executed. So now aliasing versions of copy_user_highpage()/clear_page() are made default. There is no significant overhead since all of special alias handling code is compiled out for non-aliasing build Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Use enough bits for determining page's cache colorVineet Gupta2013-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses 2 bits for determining page's dcache color, thus sorting pages into 4 bins, whereas the aliasing dcache really has 2 bins (8k page, 64k dcache - 4 way-set-assoc). This can cause extraneous flushes - e.g. color 0 and 2. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: Brown paper bag bug in macro for checking cache colorVineet Gupta2013-05-232-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VM_EXEC check in update_mmu_cache() was getting optimized away because of a stupid error in definition of macro addr_not_cache_congruent() The intention was to have the equivalent of following: if (a || (1 ? b : 0)) but we ended up with following: if (a || 1 ? b : 0) And because precedence of '||' is more that that of '?', gcc was optimizing away evaluation of <a> Nasty Repercussions: 1. For non-aliasing configs it would mean some extraneous dcache flushes for non-code pages if U/K mappings were not congruent. 2. For aliasing config, some needed dcache flush for code pages might be missed if U/K mappings were congruent. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: copy_(to|from)_user() to honor usermode-access permissionsVineet Gupta2013-05-233-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This manifested as grep failing psuedo-randomly: -------------->8--------------------- [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ [ARCLinux]$ ip address show lo | grep inet inet 127.0.0.1/8 scope host lo -------------->8--------------------- ARC700 MMU provides fully orthogonal permission bits per page: Ur, Uw, Ux, Kr, Kw, Kx The user mode page permission templates used to have all Kernel mode access bits enabled. This caused a tricky race condition observed with uClibc buffered file read and UNIX pipes. 1. Read access to an anon mapped page in libc .bss: write-protected zero_page mapped: TLB Entry installed with Ur + K[rwx] 2. grep calls libc:getc() -> buffered read layer calls read(2) with the internal read buffer in same .bss page. The read() call is on STDIN which has been redirected to a pipe. read(2) => sys_read() => pipe_read() => copy_to_user() 3. Since page has Kernel-write permission (despite being user-mode write-protected), copy_to_user() suceeds w/o taking a MMU TLB-Miss Exception (page-fault for ARC). core-MM is unaware that kernel erroneously wrote to the reserved read-only zero-page (BUG #1) 4. Control returns to userspace which now does a write to same .bss page Since Linux MM is not aware that page has been modified by kernel, it simply reassigns a new writable zero-init page to mapping, loosing the prior write by kernel - effectively zero'ing out the libc read buffer under the hood - hence grep doesn't see right data (BUG #2) The fix is to make all kernel-mode access permissions mirror the user-mode ones. Note that the kernel still has full access to pages, when accessed directly (w/o MMU) - this fix ensures that kernel-mode access in copy_to_from() path uses the same faulting access model as for pure user accesses to keep MM fully aware of page state. The issue is peudo-random because it only shows up if the TLB entry installed in #1 is present at the time of #3. If it is evicted out, due to TLB pressure or some-such, then copy_to_user() does take a TLB Miss Exception, with a routine write-to-anon COW processing installing a fresh page for kernel writes and also usable as it is in userspace. Further the issue was dormant for so long as it depends on where the libc internal read buffer (in .bss) is mapped at runtime. If it happens to reside in file-backed data mapping of libc (in the page-aligned slack space trailing the file backed data), loader zero padding the slack space, does the early cow page replacement, setting things up at the very beginning itself. With gcc 4.8 based builds, the libc buffer got pushed out to a real anon mapping which triggers the issue. Reported-by: Anton Kolesov <akolesov@synopsys.com> Cc: <stable@vger.kernel.org> # 3.9 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [mm] Prevent stray dcache lines after__sync_icache_dcach()Vineet Gupta2013-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flush and INVALIDATE the dcache page. This helper is only used for writeback of CODE pages to memory. So there's no value in keeping the dcache lines around. Infact it is risky as a writeback on natural eviction under pressure can cause un-needed writeback with weird issues on aliasing dcache configurations. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| * | ARC: [TB10x] Remove redundant abilis,simple-pinctrl mechanismChristian Ruppert2013-05-154-32/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TB10x platform port includes a custom mechanism using to set up default pin controller configurations using abilis,simple-default pin configurations of nodes compatible with abilis,simple-pinctrl. This mechanism is redundant with the Linux standard "default" pin configuration, see commit ab78029ecc347debbd737f06688d788bd9d60c1d "drivers/pinctrl: grab default handles from device core". This patch removes the TB10x custom mechanism in favour of the Linux standard. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
* | | Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds2013-05-253-3/+2
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM fixes from Russell King: "Just three this time, all really quite small" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7729/1: vfp: ensure VFP_arch is non-zero when VFP is not supported ARM: 7727/1: remove the .vm_mm value from gate_vma ARM: 7723/1: crypto: sha1-armv4-large.S: fix SP handling
| * | | ARM: 7729/1: vfp: ensure VFP_arch is non-zero when VFP is not supportedWill Deacon2013-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit d3f79584a8b5 ("ARM: cleanup undefined instruction entry code") improved the register scheduling when handling undefined instructions. A side effect of this is that r5 is now used as a temporary, whilst the VFP probing code relies on r5 containing a non-zero value when VFP is not supported. This patch fixes the VFP detection code so that we don't rely on the contents of r5. Without this patch, Linux dies loudly on CPUs without VFP support. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7727/1: remove the .vm_mm value from gate_vmaSteven Capper2013-05-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If one reads /proc/$PID/smaps, the mmap_sem belonging to the address space of the task being examined is locked for reading. All the pages of the vmas belonging to the task's address space are then walked with this lock held. If a gate_vma is present in the architecture, it too is examined by the fs/proc/task_mmu.c code. As gate_vma doesn't belong to the address space of the task though, its pages are not walked. A recent cleanup (commit f6604efe) of the gate_vma initialisation code set the vm_mm value to &init_mm. Unfortunately a non-NULL vm_mm value in the gate_vma will cause the task_mmu code to attempt to walk the pages of the gate_vma (with no mmap-sem lock held). If one enables Transparent Huge Page support and vm debugging, this will then cause OOPses as pmd_trans_huge_lock is called without mmap_sem being locked. This patch removes the .vm_mm value from gate_vma, restoring the original behaviour of the task_mmu code. Signed-off-by: Steve Capper <steve.capper@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | ARM: 7723/1: crypto: sha1-armv4-large.S: fix SP handlingArd Biesheuvel2013-05-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the SHA1 asm code ABI conformant by making sure all stack accesses occur above the stack pointer. Origin: http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=1a9d60d2 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | Merge tag 'fixes-for-linus' of ↵Linus Torvalds2013-05-2446-207/+176
|\ \ \ \ | |_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "We didn't have any fixes sent up for -rc2, so this is a slightly larger batch. A bit all over the place platform-wise; OMAP, at91, marvell, renesas, sunxi, ux500, etc. I tried to summarize highlights but there isn't a whole lot to point out. Lots of little things fixed all over. A couple of defconfig updates due to new/changing options." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: at91/sama5: fix incorrect PMC pcr div definition ARM: at91/dt: fix macb pinctrl_macb_rmii_mii_alt definition ARM: at91: at91sam9n12: move external irq declatation to DT ARM: shmobile: marzen: Use error values in usb_power_* ARM: tegra: defconfig fixes ARM: nomadik: fix IRQ assignment for SMC ethernet ARM: vt8500: Add missing NULL terminator in dt_compat clk: tegra: add ac97 controller clock clk: tegra: remove USB from clk init table ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node ARM: plat-orion: Fix num_resources and id for ge10 and ge11 ARM: OMAP2+: hwmod: Remove sysc slave idle and auto idle apis SERIAL: OMAP: Remove the slave idle handling from the driver ARM: OMAP2+: serial: Remove the un-used slave idle hooks ARM: OMAP2+: hwmod-data: UART IP needs software control to manage sidle modes ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active ARM: OMAP2+: hwmod: Fix sidle programming in _enable_sysc()/_idle_sysc() arm: mvebu: fix the 'ranges' property to handle PCIe ARM: mvebu: select ARCH_REQUIRE_GPIOLIB for mvebu platform ARM: AM33XX: Add missing .clkdm_name to clkdiv32k_ick clock ...
| * | | Merge tag 'sunxi-fixes-for-3.10' of git://github.com/mripard/linux into fixesOlof Johansson2013-05-243-3/+6
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Maxime Ripard: Small set of fixes for 3.10: - Fix build breakage in pinctrl driver when no other architecture is selected - Fix Mini X-plus device tree build * tag 'sunxi-fixes-for-3.10' of git://github.com/mripard/linux: ARM: sunxi: select ARCH_REQUIRE_GPIOLIB ARM: sunxi: Fix Mini X-plus device tree build Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: sunxi: select ARCH_REQUIRE_GPIOLIBMaxime Ripard2013-05-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_ARCH_SUNXI currently doesn't enable a gpiolib, which causes build problems when building a kernel with only the sunxi platform enabled. Select ARCH_REQUIRE_GPIOLIB to solve this. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar>
| | * | | ARM: sunxi: Fix Mini X-plus device tree buildMaxime Ripard2013-05-132-3/+5
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b00adbe0 ("ARM: sunxi: Rename uart nodes to serial") changed the node names in the DTSI, changes that were not accordingly made to the Mini X-Plus device tree. This breakage slipped through because it was not properly declared in the Makefile. Fix both issues. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixesOlof Johansson2013-05-244-10/+5
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Nicolas Ferre: - One definition fix that can lead to mis-clock some AT91 peripherals on SAMA5. - Two DT related fixes. * tag 'at91-fixes' of git://github.com/at91linux/linux-at91: ARM: at91/sama5: fix incorrect PMC pcr div definition ARM: at91/dt: fix macb pinctrl_macb_rmii_mii_alt definition ARM: at91: at91sam9n12: move external irq declatation to DT Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: at91/sama5: fix incorrect PMC pcr div definitionJosh Wu2013-05-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| | * | | ARM: at91/dt: fix macb pinctrl_macb_rmii_mii_alt definitionBoris BREZILLON2013-05-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PA24 pin is wrongly assigned to peripheral B. In the current config there is 2 ETX3 pins (PA11 and PA24) and no ETXER pin (PA22). Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
| | * | | ARM: at91: at91sam9n12: move external irq declatation to DTJean-Christophe PLAGNIOL-VILLARD2013-05-242-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| * | | | Merge tag 'renesas-boards-marzen-fixes-for-v3.10' of ↵Olof Johansson2013-05-221-3/+3
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes From Simon Horman: Correct USB PHY initialisation on the marzen board. * tag 'renesas-boards-marzen-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: marzen: Use error values in usb_power_* Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: shmobile: marzen: Use error values in usb_power_*Simon Horman2013-05-221-3/+3
| | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the marzen board code as if USB PHY isn't enabled they phy will have a value set by ERR_PTR() rather than be NULL. Without this patch a NULL pointer dereference and kernel panic occurs on initialisation of USB on marzen. This resolves a regression introduced in 3.10-rc1 by b7fa5c2aec5be083eb2719b405089703608e9bc6 ("usb: phy: return -ENXIO when PHY layer isn't enabled"). Tested-by: Nguyen Hong Ky <nh-ky@jinso.co.jp> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | | | Merge tag 'omap-fixes-a-for-3.10-rc' of ↵Olof Johansson2013-05-227-120/+48
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes From Paul Walmsley: Fix the OMAP serial driver to work correctly on OMAP4 when booting with DT. * tag 'omap-fixes-a-for-3.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending: ARM: OMAP2+: hwmod: Remove sysc slave idle and auto idle apis SERIAL: OMAP: Remove the slave idle handling from the driver ARM: OMAP2+: serial: Remove the un-used slave idle hooks ARM: OMAP2+: hwmod-data: UART IP needs software control to manage sidle modes ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active ARM: OMAP2+: hwmod: Fix sidle programming in _enable_sysc()/_idle_sysc() Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: OMAP2+: hwmod: Remove sysc slave idle and auto idle apisSantosh Shilimkar2013-05-192-71/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the OMAP serial driver sysc cleanup patches in this series, we can now remove the hwmod external apis for sysc fiddling. While at this, also remove unused sysc auto idle api from hwmod code. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | ARM: OMAP2+: serial: Remove the un-used slave idle hooksSantosh Shilimkar2013-05-191-31/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UART IP idle handling now taken care by runtime pm backend(hwmod) indirectly and OMAP serial driver is also cleaned up accordingly. So remove the un-used slave idle platforms hooks now. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | ARM: OMAP2+: hwmod-data: UART IP needs software control to manage sidle modesSantosh Shilimkar2013-05-194-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP UART IP needs software control for slave idle modes based on functional state of the IP. i.e The IP slave idle settings should be set to 'noidle' when being used and then put back to 'smart_idle' when unused. Currently this is handled by the driver with function pointers implemented in platform code. This however breaks in case of device tree because of missing idle handling APIs. Previous patches in this series added a flag HWMOD_SWSUP_SIDLE_ACTIVE which takes care of the mentioned requirement. Hence add the flag for all UART IPs to take advantage of feature supported by framework. Subsequent patches removes the slave idle handling from driver code. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in activeRajendra Nayak2013-05-192-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some IPs (like UART) need the sidle mode to be controlled in SW only while they are active. Once they go inactive, they need the IP to be put back in HW control so they are also wakeup capable. The flag HWMOD_SWSUP_SIDLE takes care of IPs which need the sidle mode to be *always* controlled in SWSUP. We now have a need to control IPs sidle mode in SWSUP only while its active. So define a new flag 'HWMOD_SWSUP_SIDLE_ACT' to help the framework know about these new IP requirements. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | ARM: OMAP2+: hwmod: Fix sidle programming in _enable_sysc()/_idle_sysc()Rajendra Nayak2013-05-191-17/+25
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | _enable_sysc() and _idle_sysc() handle the midle mode programming correctly and program HWMOD_IDLEMODE_SMART or HWMOD_IDLEMODE_SMART_WKUP respectively for supported IPs (The ones which support hardware controlled midle modes) However the same programming logic is missing when it comes to sidle mode programming. Here they seem to just set HWMOD_IDLEMODE_SMART (Again for the ones which support hardware controlled sidle modes) This problem was hidden due to the fact that a call to _enable_wakeup() in those same functions would overwrite the idlemodes and program them correctly (to HWMOD_IDLEMODE_SMART_WKUP in the supported cases) So fix the sidlemode handling correctly in these functions and handle the _enable_wakeup() for SIDLEMODE supported IPs same as the way its handled for MIDLEMODE supported ones. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
| * | | | ARM: tegra: defconfig fixesAlexandre Courbot2013-05-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AK8975 Kconfig option was renamed during the 3.10 merge window. Adjust tegra_defconfig to enable the new name, so it's not missing useful features. Tegra DRM support used to be enabled in the default Tegra configuration, but it now depends on CONFIG_TEGRA_HOST1X which is disabled by default. Enable CONFIG_TEGRA_HOST1X so that DRM support is compiled in again. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> [swarren, squashed Alex's and my changes together] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | ARM: nomadik: fix IRQ assignment for SMC ethernetLinus Walleij2013-05-201-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The assignment of IRQ for the SMC91x ethernet adapter had two problems making it non-working: - It was not put into the ethernet device node. Let's do this by using the board-specific overlay, so we can make other overlays on other Nomadik boards. - The IRQ number was actually completely wrong, this was the number for NHK8815, not S8815. After this ethernet starts working on the USB S8815. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | Merge tag 'ux500-arm-soc-v3.10-fixes' of ↵Olof Johansson2013-05-205-11/+10
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes From Linus Walleij, some ux500 fixes for the v3.10-rc series: - Fixes up the debug UART - Fix dangerous platform data double-assignment - Fix auxdata for the ethernet device - Select REGULATOR to satisfy Kconfig * tag 'ux500-arm-soc-v3.10-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: select REGULATOR ARM: ux500: Provide device enumeration number suffix for SMSC911x ARM: ux500: Fix incorrect DEBUG UART virtual addresses ARM: ux500: Remove duplicated assignment of ab8500_platdata Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: ux500: select REGULATOREmilio López2013-05-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MACH_MOP500 selects REGULATOR_FIXED_VOLTAGE but not REGULATOR. This patch makes it select the latter too. Seen as: warning: (MACH_DOVE_DT && ARCH_KIRKWOOD_DT && MACH_AMS_DELTA && MACH_MOP500 && TPS6105X) selects REGULATOR_FIXED_VOLTAGE which has unmet direct dependencies (REGULATOR) Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ux500: Provide device enumeration number suffix for SMSC911xLee Jones2013-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First Ethernet device has a ".0" appended onto the device name. Since on a non-DT boot the ethernet will be named "smsc911x.0" and since the clocks are not converted to device tree these names need to be matched when providing the name from auxdata. Signed-off-by: Lee Jones <lee.jones@linaro.org> [edited commit message] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ux500: Fix incorrect DEBUG UART virtual addressesLee Jones2013-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent move to rid header files which were hindering multiplatform support forced address allocations out of the headers and into the files which were using them. We also lost some useful macros such as IO_ADDRESS(), so physical -> virtual addressing has been carried out manually in this case. Unfortunately the incorrect value was converted. This patch rectifies the error and ensures earlyprintk works again. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | * | | | ARM: ux500: Remove duplicated assignment of ab8500_platdataLee Jones2013-05-143-7/+5
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since: "05ec260 mfd: db8500-prcmu: update resource passing", the AB8500's platform data 'ab8500_platdata' is passed directly as an attribute to 'db8500_prcmu_pdata', so there's no requirement to assign it a second time. In fact, it's only due to an ordering issue that the entire 'db8500_prcmu_pdata' data structure isn't completely over-written by the assignment in u8500_init_devices(). Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | | Merge tag 'imx-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Olof Johansson2013-05-203-5/+32
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into fixes From Shawn Guo, imx fixes for 3.10: - A few imx6 clock fixes. Nothing is extremely important, but since we're still in early -rc, I send them for 3.10 inclusion. - Having bootloader handle ARM errata, we will need to replicate the diagnostic register of boot cpu into secondary cores, since bootloader only sets up boot cpu. Otherwise, errata workaround simply does not work. * tag 'imx-fixes-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx: fix typo in gpu3d_shader_sels ARM: imx: replicate the diagnostic register of boot cpu into secondary cores ARM i.MX6: correct MLB clock configuration ARM i.MX6q: Fix periph_clk2_sel and periph2_clk2_sel clocks Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: imx: fix typo in gpu3d_shader_selsShawn Guo2013-05-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no clock pll2_pfd9_720m. Instead it should be pll3_pfd0_720m. Fix the typo in gpu3d_shader_sels. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
| | * | | | ARM: imx: replicate the diagnostic register of boot cpu into secondary coresShawn Guo2013-05-122-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The diagnostic register holds the errata bits. Mostly bootloader does not bring up secondary cores, so that when errata bits are set in bootloader, they are set only for boot cpu. But on a SMP configuration, it should be equally done on every single core. Set up the diagnostic register for secondary cores by replicating the register from boot cpu. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
| | * | | | ARM i.MX6: correct MLB clock configurationDirk Behme2013-05-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the i.MX6 Dual/Quad technical reference manual (Figure 18-2. Clock Tree - Part 1) the MLB clock is directly feed by the AXI_CLK_ROOT. This is called 'axi' in our code. Note that the clock of the MLB IP block on the i.MX6 is completely independent of the PLL8 (MLB PLL). The MLB PLL isn't responsible for feeding the MLB IP block with a clock. Instead, it's used internally by the MLB module to sync the bus clock in case the MLB 6-pin interface is enabled: MediaLB Control 0 Register, MLB150_MLBC0[5], MLBPEN: 1 MediaLB 6-pin interface enabled. MLB PLL and MLB PHY is enabled in this case. I.e. the PLL8 MLB PLL has to be handled by the MLB driver and isn't needed for clocking the MLB module itself. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Jiada Wang <Jiada_Wang@mentor.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | ARM i.MX6q: Fix periph_clk2_sel and periph2_clk2_sel clocksPhilipp Zabel2013-05-121-3/+4
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The periph_clk2_sel mux can be set to pll3, osc/pll1_ref_clk, or osc/ pll2_burn_in_clk. The periph2_clk2_sel mux can be set to pll3 or pll2. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * | | | Merge tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux into ↵Olof Johansson2013-05-208-29/+15
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixes From Jason Cooper, mvebu fixes for v3.10 (round 2): - mvebu (and orion SoCs) - remove init_dma_coherent_pool_size() - mvebu - fix ranges DT property - fix DT reg value for L2 cache - select ARCH_REQUIRE_GPIOLIB - orion legacy - fix num_resources and id for ge10 and ge11 * tag 'fixes-3.10-2' of git://git.infradead.org/users/jcooper/linux: ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node ARM: plat-orion: Fix num_resources and id for ge10 and ge11 arm: mvebu: fix the 'ranges' property to handle PCIe ARM: mvebu: select ARCH_REQUIRE_GPIOLIB for mvebu platform ARM: mvebu: Fix ranges entry on XP GP board ARM: Orion: Remove redundant init_dma_coherent_pool_size() Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache nodeGregory CLEMENT2013-05-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During the conversion to the internal-regs' subnode, the L2-cache node haven not been converted (due to a wrong choice made by myself during the resolution of the merge conflict when I rebased the commit). This leads to wrong address for L2 cache which prevent it to be used on Armada 370. This commit fix the address reg of the e L2-cache node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | ARM: plat-orion: Fix num_resources and id for ge10 and ge11Gregory CLEMENT2013-05-201-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When platform data were moved from arch/arm/mach-mv78xx0/common.c to arch/arm/plat-orion/common.c with the commit "7e3819d ARM: orion: Consolidate ethernet platform data", there were few typo made on gigabit Ethernet interface ge10 and ge11. This commit writes back their initial value, which allows to use this interfaces again. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.0.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| | * | | | arm: mvebu: fix the 'ranges' property to handle PCIeThomas Petazzoni2013-05-192-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 82a682676 ('ARM: dts: mvebu: Convert all the mvebu files to use the range property') all the device nodes of Armada 370/XP are under a common 'ranges' property that translates the device register addresses into their absolute address, thanks to the base address of the internal register space. However, beyond just the register areas, there are also PCIe I/O and memory regions, whose addresses should be properly translated. This patch fixes the Armada 370 and XP ranges property to take PCIe into account properly. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-24 12:40:59 +0000