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* Merge branch 'omap2-upstream' into develRussell King2008-04-19176-10686/+18960
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| * ARM: OMAP2: New DPLL clock frameworkRoman Tereshonkov2008-04-144-109/+410
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These changes is the result of the discussion with Paul Walmsley. His ideas are included into this patch. Remove DPLL output divider handling from DPLLs and CLKOUTX2 clocks, and place it into specific DPLL output divider clocks (e.g., dpll3_m2_clk). omap2_get_dpll_rate() now returns the correct DPLL rate, as represented by the DPLL's CLKOUT output. Also add MPU and IVA2 subsystem clocks, along with high-frequency bypass support. Add support for DPLLs function in locked and bypass clock modes. Signed-off-by: Roman Tereshonkov <roman.tereshonkov@nokia.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Add 34xx clock codePaul Walmsley2008-04-142-0/+236
| | | | | | | | | | | | | | | | | | This patch add 34xx clock code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Add 34xx clocksPaul Walmsley2008-04-141-0/+2704
| | | | | | | | | | | | | | | | | | This patch defines 34xx clocks. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Remove old PRCM register access codePaul Walmsley2008-04-143-797/+1
| | | | | | | | | | | | | | | | | | Remove old PRCM register access code that is no longer needed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Clean up 24xx clock codeTony Lindgren2008-04-144-62/+49
| | | | | | | | | | | | | | | | Clean up 24xx clock code to sync it with linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Remove old 24xx specific clock functionsPaul Walmsley2008-04-141-722/+0
| | | | | | | | | | | | | | Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Add rest of 24xx clocksPaul Walmsley2008-04-141-530/+957
| | | | | | | | | | | | | | | | | | This patch adds the rest of clocks for 24xx. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Change 24xx to use shared clock code and new reg accessPaul Walmsley2008-04-147-226/+509
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes 24xx to use shared clock code and new register access. Note that patch adds some temporary OLD_CK defines to keep patch more readable. These temporary defines will be removed in the next patch. Also not all clocks are changed in this patch to limit the size. Also, the patch fixes few incorrect clock defines in clock24xx.h. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Add common clock framework for 24xx and 34xxPaul Walmsley2008-04-142-0/+830
| | | | | | | | | | | | | | | | | | | | This patch adds a common clock framework for 24xx and 34xx. Note that this patch does not add it to Makefile until in next patch. Some functions are modified from earlier 24xx clock framework code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Move clock.c to clock24xx.cPaul Walmsley2008-04-142-1/+4
| | | | | | | | | | | | | | | | | | | | | | This patch moves clock.h to clock24xx.c to make room for adding common clock code for 24xx and 34xx. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Move clock.h to clock24xx.hPaul Walmsley2008-04-142-1/+1
| | | | | | | | | | | | | | | | | | | | This patch moves clock.h to clock24xx.h to make room for adding common clock code for 24xx and 34xx. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Remove old 24xx PM codeTony Lindgren2008-04-141-269/+1
| | | | | | | | | | | | | | | | | | | | | | This patch removes old 24xx PM code that does not really work for sleep states, and uses old power management register access. Working PM code will be added later. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Change 24xx to use new register accessPaul Walmsley2008-04-1411-100/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes 24xx to use new register access, except for clock framework. Clock framework register access will get updates in the next patch. Note that board-*.c files change GPMC (General Purpose Memory Controller) access to use gpmc_cs_write_reg() instead of accessing the registers directly. The code also uses gpmc_fck instead of it's parent clock core_l3_ck for GPMC clock. The H4 board file also adds h4_init_flash() function, which specify the flash start and end addresses. Also note that sleep.S removes some unused registers addresses. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Add register access for 34xxTony Lindgren2008-04-142-0/+1251
| | | | | | | | | | | | | | | | | | This patch adds register access for 34xx power and clock management. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Add common register access for 24xx and 34xxPaul Walmsley2008-04-149-18/+1622
| | | | | | | | | | | | | | | | | | | | | | This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Clean-up mux codeTony Lindgren2008-04-143-41/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | Misc clean-up for the mux code and remove some unnecessary ifdefs. Patch changes debug function so it can be used on both 24xx and 34xx. Changes are mostly for omap2, but patch also cleans up some omap1 and common mux code. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP2: Add new pin multiplexing configurationsTony Lindgren2008-04-141-3/+41
| | | | | | | | | | | | | | | | Add new pin multiplexing configurations Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: TimerMPU: Remove MPU-timer based sched_clock()Kevin Hilman2008-04-141-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove MPU-timer based sched_clock() in favor of the common one based on 32k sync timer which works across all OMAP1/2/3 platforms. Using 32k based one also gives a valid sched_clock() very early in the boot process. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: TimerMPU: Remove unused cycles-to-nsec conversionsKevin Hilman2008-04-141-33/+0
| | | | | | | | | | | | | | | | | | | | These are no longer used and similar conversions are provided by the clocksource/clockevent code. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it upTony Lindgren2008-04-141-5/+13
| | | | | | | | | | | | | | | | | | This patch fixes timer32k for clockevents and syncs it with linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Timer32K: Move timer32k to mach-omap1Kevin Hilman2008-04-143-5/+2
| | | | | | | | | | | | | | | | | | | | Move now OMAP1-specific timer32k code to mach-omap1 since OMAP2/3 32k timers are done in gptimer code. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Timer32K: Move 32k-based sched_clock() to common codeKevin Hilman2008-04-142-26/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since 32k timer code is moving to OMAP1 specific dir, move the 32k-based sched_clock() into common code where it is based on the 32k sync counter and can be used even when using MPU timer. While moving, change the ticks-to-nsecs conversion to use the helper functions provided by clocksource.h. Also removed the unused ticks_to_usec, leaving only ticks_to_nsec. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Timer32K: Re-organize duplicated 32k-timer codeKevin Hilman2008-04-144-61/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP2/3, the gp-timer code can be used for a 32kHz timer simply by setting the source to be the 32k clock instead of sys_clk. This patch uses the mach-omap2/timer-gp.c code for 32kHz timer on OMAP2, moving the logic into mach-omap2/timer-gp.c, and not using plat-omap/timer32k.c which, for OMAP2, is redundant with the timer-gp code. Also, if CONFIG_OMAP_32K_TIMER is enabled, the gptimer-based clocksource is not used. Instead the default 32k sync counter is used as the clocksource (see the clocksource in plat-omap/common.c.) This is important for sleep/suspend so there is a valid counter during sleep. Note that the suspend/sleep code needs fixing to check for overflows of this counter. In addition, the OMAP2/3 details are removed from timer32k.c leaving that with only OMAP1 specifics. A follow-up patch will move it from plat-omap common code to mach-omap1. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Split omap_cfg_reg() into omap processor specific functionsTony Lindgren2008-04-143-137/+139
| | | | | | | | | | | | | | | | | | | | Use omap processor specific function depending on system type. Based on an earlier patch by Klaus Pedersen <klaus.k.pedersen@nokia.com>. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Allow registering pin mux functionTony Lindgren2008-04-143-19/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes pin multiplexing init to allow registering custom function. The omap_cfg_reg() func will be split into omap processor specific functions in later patch. This is done to make adding omap3 pin multiplexing easier. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: use edge/level handlers from generic IRQ frameworkKevin Hilman2008-04-141-35/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the GPIO interrupt handling is duplicating some of the work done by the generic IRQ handlers (handle_edge_irq, handle_level_irq) such as detecting nesting, handling re-triggers etc. Remove this duplication and use generic hooks based on IRQ type. Using generic IRQ handlers ensures correct behavior when using threaded interrupts introduced by the -rt patch. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Clear level-triggered GPIO interrupts in unmask hookKevin Hilman2008-04-141-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | The clearing was moved to the unmask hook because it is known to run after the interrupt handler has actually run. Before this patch, if interrupts are threaded, the clearing/unmasking of level triggered interrupts would be done before the threaded handler actually ran. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Use gpiolib with tps65010 for OSK 5912David Brownell2008-04-142-117/+71
| | | | | | | | | | | | | | | | | | | | | | Convert OSK board to use new tps65010 gpiolib support. This includes moving its LED support from leds-osk to gpio-leds, giving more trigger options and a net platform code shrink. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: 5912 OSK GPIO updatesDavid Brownell2008-04-141-13/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start cleaning up GPIO handling for OMAP5912 OSK board: - Initialize GPIOs using the cross-platform calls, not the old OMAP-private ones. - Move touchscreen setup out of ads7846 code into board-specfic setup code, where it belongs. This doesn't depend on the patches to update OMAP to use the gpiolib implementation framework. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * ARM: OMAP: Use gpiolibDavid Brownell2008-04-142-18/+90
| | | | | | | | | | | | | | | | | | | | | | | | Update OMAP to use the new GPIO implementation framework. This is just a quick'n'dirty update ... more code could now be removed, ideally as part of cleaning up the entire OMAP GPIO infrastructure ... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2008-04-112-52/+98
| |\ | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC]: Fix several regset and ptrace bugs.
| | * [SPARC]: Fix several regset and ptrace bugs.David S. Miller2008-04-092-52/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) ptrace should pass 'current' to task_user_regset_view() 2) When fetching general registers using a 64-bit view, and the target is 32-bit, we have to convert. 3) Skip the whole register window get/set code block if the user isn't asking to access anything in there. Otherwise we have problems if the user doesn't have an address space setup. Fetching ptrace register is still valid at such a time, and ptrace does not try to access the register window area of the regset. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | asmlinkage_protect replaces prevent_tail_callRoland McGrath2008-04-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The prevent_tail_call() macro works around the problem of the compiler clobbering argument words on the stack, which for asmlinkage functions is the caller's (user's) struct pt_regs. The tail/sibling-call optimization is not the only way that the compiler can decide to use stack argument words as scratch space, which we have to prevent. Other optimizations can do it too. Until we have new compiler support to make "asmlinkage" binding on the compiler's own use of the stack argument frame, we have work around all the manifestations of this issue that crop up. More cases seem to be prevented by also keeping the incoming argument variables live at the end of the function. This makes their original stack slots attractive places to leave those variables, so the compiler tends not clobber them for something else. It's still no guarantee, but it handles some observed cases that prevent_tail_call() did not. Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | x86: Simplify cpu_idle_waitVenki Pallipadi2008-04-102-72/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch also resolves hangs on boot: http://lkml.org/lkml/2008/2/23/263 http://bugzilla.kernel.org/show_bug.cgi?id=10093 The bug was causing once-in-few-reboots 10-15 sec wait during boot on certain laptops. Earlier commit 40d6a146629b98d8e322b6f9332b182c7cbff3df added smp_call_function in cpu_idle_wait() to kick cpus that are in tickless idle. Looking at cpu_idle_wait code at that time, code seemed to be over-engineered for a case which is rarely used (while changing idle handler). Below is a simplified version of cpu_idle_wait, which just makes a dummy smp_call_function to all cpus, to make them come out of old idle handler and start using the new idle handler. It eliminates code in the idle loop to handle cpu_idle_wait. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | FRV: Make NOMMU-mode work with base addresses other than 0xC0000000 [try #2]David Howells2008-04-102-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make NOMMU-mode work with base addresses other than 0xC0000000 by: (1) Giving the code that sets up the protection registers the right address in __sdram_base. Rather than being hard coded to 0xC0000000, the value of __page_offset is obtained from the linker script. (2) Eliminate the check in __switch_to() that verifies the current thread info is in the 0xCxxxxxxx region. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | FRV: Add support for emulation of userspace atomic ops [try #2]David Howells2008-04-103-1/+254
| | | | | | | | | | | | | | | | | | | | | | | | Use traps 120-126 to emulate atomic cmpxchg32, xchg32, and XOR-, OR-, AND-, SUB- and ADD-to-memory operations for userspace. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | pop previous section in alternative.cSteven Rostedt2008-04-091-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc expects all toplevel assembly to return to the original section type. The code in alteranative.c does not do this. This caused some strange bugs in sched-devel where code would end up in the .rodata section and when the kernel sets the NX bit on all .rodata, the kernel would crash when executing this code. This patch adds a .previous marker to return the code back to the original section. Credit goes to Andrew Pinski for telling me it wasn't a gcc bug but a bug in the toplevel asm code in the kernel. ;-) Signed-off-by: Steven Rostedt <srostedt@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | [MIPS] Handle aliases in vmalloc correctly.Ralf Baechle2008-04-073-0/+32
| | | | | | | | | | | | | | | | | | | | | flush_cache_vmap / flush_cache_vunmap were calling flush_cache_all which - having been deprecated - turned into a nop ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | x86: fix call to set_cyc2ns_scale() from time_cpufreq_notifier()Karsten Wiese2008-04-072-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In time_cpufreq_notifier() the cpu id to act upon is held in freq->cpu. Use it instead of smp_processor_id() in the call to set_cyc2ns_scale(). This makes the preempt_*able() unnecessary and lets set_cyc2ns_scale() update the intended cpu's cyc2ns. Related mail/thread: http://lkml.org/lkml/2007/12/7/130 Signed-off-by: Karsten Wiese <fzu@wemgehoertderstaat.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | revert "x86: tsc prevent time going backwards"Ingo Molnar2008-04-072-34/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | revert: | commit 47001d603375f857a7fab0e9c095d964a1ea0039 | Author: Thomas Gleixner <tglx@linutronix.de> | Date: Tue Apr 1 19:45:18 2008 +0200 | | x86: tsc prevent time going backwards it has been identified to cause suspend regression - and the commit fixes a longstanding bug that existed before 2.6.25 was opened - so it can wait some more until the effects are better understood. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2008-04-072-22/+116
| |\| | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: Fix user accesses in regset code. [SPARC64]: Fix FPU saving in 64-bit signal handling.
| | * [SPARC64]: Fix user accesses in regset code.David S. Miller2008-04-031-21/+115
| | | | | | | | | | | | | | | | | | | | | | | | If target is not current we need to use access_process_vm(). Noticed by Roland McGrath. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Fix FPU saving in 64-bit signal handling.David S. Miller2008-04-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The calculation of the FPU reg save area pointer was wrong. Based upon an OOPS report from Tom Callaway. Signed-off-by: David S. Miller <davem@davemloft.net>
| * | Fix booting pentium+ with dodgy TSCRusty Russell2008-04-061-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We handle a broken tsc these days, so no need to panic. We clear the TSC bit when tsc_init decides it's unreliable (eg. under lguest w/ bad host TSC), leading to bogus panic. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| * | Merge branch 'upstream' of ↵Linus Torvalds2008-04-041-1/+2
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus * 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus: [MIPS] Make KGDB compile on UP [MIPS] Pb1200: Fix header breakage
| | * | [MIPS] Make KGDB compile on UPSergei Shtylyov2008-04-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Building UP kernel with KGDB enabled produces the following errors and warning (fatal due to -Werror in arch/mips/kernel/Makefile): In file included from arch/mips/kernel/gdb-stub.c:142: include/asm/smp.h:25:1: "raw_smp_processor_id" redefined In file included from include/linux/sched.h:69, from arch/mips/kernel/gdb-stub.c:126: include/linux/smp.h:88:1: this is the location of the previous definition In file included from arch/mips/kernel/gdb-stub.c:142: include/asm/smp.h:62: error: redefinition of 'smp_send_reschedule' include/linux/smp.h:102: error: previous definition of 'smp_send_reschedule' was here include/asm/smp.h: In function `smp_send_reschedule': include/asm/smp.h:65: error: dereferencing pointer to incomplete type arch/mips/kernel/gdb-stub.c: At top level: arch/mips/kernel/gdb-stub.c:660: warning: 'kgdb_wait' defined but not used Fix the errors by not directly including <asm/smp.h> (which is already included by <linux/smp.h>) and the warning by enclosing kgdb_wait() in #ifdef CONFIG_SMP. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | | Merge branch 'for-linus' of ↵Linus Torvalds2008-04-048-31/+76
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: x86: revert assign IRQs to hpet timer x86: tsc prevent time going backwards xen: Clear PG_pinned in release_{pt,pd}() xen: Do not pin/unpin PMD pages xen: refactor xen_{alloc,release}_{pt,pd}() x86, agpgart: scary messages are fortunately obsolete xen: fix grant table bug x86: fix breakage of vSMP irq operations x86: print message if nmi_watchdog=2 cannot be enabled x86: fix nmi_watchdog=2 on Pentium-D CPUs
| | * | | x86: revert assign IRQs to hpet timerThomas Gleixner2008-04-041-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commits: commit 37a47db8d7f0f38dac5acf5a13abbc8f401707fa Author: Balaji Rao <balajirrao@gmail.com> Date: Wed Jan 30 13:30:03 2008 +0100 x86: assign IRQs to HPET timers, fix and commit e3f37a54f690d3e64995ea7ecea08c5ab3070faf Author: Balaji Rao <balajirrao@gmail.com> Date: Wed Jan 30 13:30:03 2008 +0100 x86: assign IRQs to HPET timers have been identified to cause a regression on some platforms due to the assignement of legacy IRQs which makes the legacy devices connected to those IRQs disfunctional. Revert them. This fixes http://bugzilla.kernel.org/show_bug.cgi?id=10382 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| | * | | x86: tsc prevent time going backwardsThomas Gleixner2008-04-042-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already catch most of the TSC problems by sanity checks, but there is a subtle bug which has been in the code for ever. This can cause time jumps in the range of hours. This was reported in: http://lkml.org/lkml/2007/8/23/96 and http://lkml.org/lkml/2008/3/31/23 I was able to reproduce the problem with a gettimeofday loop test on a dual core and a quad core machine which both have sychronized TSCs. The TSCs seems not to be perfectly in sync though, but the kernel is not able to detect the slight delta in the sync check. Still there exists an extremly small window where this delta can be observed with a real big time jump. So far I was only able to reproduce this with the vsyscall gettimeofday implementation, but in theory this might be observable with the syscall based version as well. CPU 0 updates the clock source variables under xtime/vyscall lock and CPU1, where the TSC is slighty behind CPU0, is reading the time right after the seqlock was unlocked. The clocksource reference data was updated with the TSC from CPU0 and the value which is read from TSC on CPU1 is less than the reference data. This results in a huge delta value due to the unsigned subtraction of the TSC value and the reference value. This algorithm can not be changed due to the support of wrapping clock sources like pm timer. The huge delta is converted to nanoseconds and added to xtime, which is then observable by the caller. The next gettimeofday call on CPU1 will show the correct time again as now the TSC has advanced above the reference value. To prevent this TSC specific wreckage we need to compare the TSC value against the reference value and return the latter when it is larger than the actual TSC value. I pondered to mark the TSC unstable when the readout is smaller than the reference value, but this would render an otherwise good and fast clocksource unusable without a real good reason. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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