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| | * | | | bus: sunxi-rsb: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-08-061-3/+1
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| * | | / bus: fsl-mc: remove explicit device_link_delIoana Ciornei2019-08-162-2/+0
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| * | | bus: Add support for Moxtet busMarek Behún2019-08-143-0/+897
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* | | Merge tag 'hisi-fixes-for-5.3' of git://github.com/hisilicon/linux-hisi into ...Arnd Bergmann2019-08-291-6/+41
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| * | bus: hisi_lpc: Add .remove method to avoid driver unbind crashJohn Garry2019-08-131-2/+36
| * | bus: hisi_lpc: Unregister logical PIO range to avoid potential use-after-freeJohn Garry2019-08-131-5/+6
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* | bus: ti-sysc: Simplify cleanup upon failures in sysc_probe()Suman Anna2019-08-131-7/+7
* | ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7Tony Lindgren2019-07-241-1/+2
* | bus: ti-sysc: Fix using configured sysc mask valueTony Lindgren2019-07-241-4/+1
* | bus: ti-sysc: Fix handling of forced idleTony Lindgren2019-07-241-1/+1
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* Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/s...Linus Torvalds2019-07-195-84/+436
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| * Merge tag 'omap-for-v5.3/ti-sysc-signed' of git://git.kernel.org/pub/scm/linu...Olof Johansson2019-06-171-86/+389
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| | * bus: ti-sysc: Add support for module specific reset quirksTony Lindgren2019-06-101-5/+124
| | * bus: ti-sysc: Detect uarts also on omap34xxTony Lindgren2019-05-281-1/+3
| | * bus: ti-sysc: Do rstctrl reset handling in two phasesTony Lindgren2019-05-281-8/+17
| | * bus: ti-sysc: Add support for disabling module without legacy modeTony Lindgren2019-05-281-4/+17
| | * bus: ti-sysc: Set ENAWAKEUP if availableTony Lindgren2019-05-281-0/+5
| | * bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren2019-05-281-8/+17
| | * bus: ti-sysc: Handle clockactivity for enable and disableTony Lindgren2019-05-281-0/+7
| | * bus: ti-sysc: Enable interconnect target module autoidle bit on enableTony Lindgren2019-05-281-1/+12
| | * bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not setTony Lindgren2019-05-281-3/+0
| | * bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bitsTony Lindgren2019-05-281-18/+54
| | * bus: ti-sysc: Support 16-bit writes tooTony Lindgren2019-05-281-1/+22
| | * bus: ti-sysc: Add support for missing clockdomain handlingTony Lindgren2019-05-281-26/+101
| * | Merge tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux i...Olof Johansson2019-06-171-2/+2
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| | * | bus: brcmstb_gisb: Remove print of base addressFlorian Fainelli2019-05-201-2/+2
| * | | Merge tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/gi...Olof Johansson2019-06-173-7/+55
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| | * | | bus: mc-bus: Add support for mapping shareable portalsRoy Pledge2019-05-203-7/+55
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* | | | Merge tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gre...Linus Torvalds2019-06-212-8/+2
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| * | | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-192-8/+2
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* | | | Merge tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/ker...Olof Johansson2019-06-161-12/+11
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| * | Merge branch 'omap-for-v5.2/ti-sysc' into fixesTony Lindgren2019-05-201-12/+11
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| | * bus: ti-sysc: Handle devices with no control registersTony Lindgren2019-05-021-12/+11
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner2019-05-302-17/+2
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157Thomas Gleixner2019-05-302-21/+2
* | | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156Thomas Gleixner2019-05-302-30/+2
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* | Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/s...Linus Torvalds2019-05-161-20/+46
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| * bus: tegra-aconnect: add system sleep callbacksSameer Pujar2019-03-281-0/+2
| * bus: tegra-aconnect: use devm_clk_*() helpersSameer Pujar2019-03-281-20/+44
* | bus: ti-sysc: Add generic enable/disable functionsRoger Quadros2019-04-091-0/+129
* | bus: ti-sysc: Detect DMIC for debuggingTony Lindgren2019-04-051-0/+1
* | bus: ti-sysc: Handle swsup idle mode quirksTony Lindgren2019-04-051-3/+3
* | bus: ti-sysc: Add quirk handling for external optional functional clockTony Lindgren2019-04-031-1/+90
* | bus: ti-sysc: Add support for early quirks based on register addressTony Lindgren2019-04-031-4/+42
* | bus: ti-sysc: Move rstctrl reset to happen laterTony Lindgren2019-04-031-22/+39
* | bus: ti-sysc: Manage clocks for the interconnect target module in all casesTony Lindgren2019-04-031-13/+11
* | bus: ti-sysc: Allocate mdata as needed and do platform data based init laterTony Lindgren2019-04-031-15/+39
* | bus: ti-sysc: Enable all clocks directly during init to read revisionTony Lindgren2019-04-031-22/+28
* | bus: ti-sysc: Add separate functions for handling clocksTony Lindgren2019-04-011-18/+123
* | bus: ti-sysc: Move legacy platform data idling into separate functionsTony Lindgren2019-04-011-28/+50
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