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* clk: cdce925: Fix printk size_t warningStephen Boyd2015-06-101-1/+1
| | | | | | | | | drivers/clk/clk-cdce925.c:550: warning: format ‘%u’ expects type ‘unsigned int’, but argument 6 has type ‘size_t’ Cc: Mike Looijmans <mike.looijmans@topic.nl> Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Add TI CDCE925 I2C controlled clock synthesizer driverMike Looijmans2015-06-031-0/+749
This driver supports the TI CDCE925 programmable clock synthesizer. The chip contains two PLLs with spread-spectrum clocking support and five output dividers. The driver only supports the following setup, and uses a fixed setting for the output muxes: Y1 is derived from the input clock Y2 and Y3 derive from PLL1 Y4 and Y5 derive from PLL2 Given a target output frequency, the driver will set the PLL and divider to best approximate the desired output. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Michael Turquette <mturquette@linaro.org>