summaryrefslogtreecommitdiffstats
path: root/drivers/clk/hisilicon
Commit message (Expand)AuthorAgeFilesLines
* clk: Hi6220: enable stub clock driver for ARCH_HISILeo Yan2016-11-141-0/+1
* Merge branch 'clk-hisi' into clk-nextStephen Boyd2016-11-145-0/+719
|\
| * clk: hisilicon: add CRG driver for Hi3516CV300 SoCPan Wen2016-11-143-0/+339
| * clk: hisilicon: add CRG driver for Hi3798CV200 SoCJiancheng Xue2016-11-114-0/+380
* | clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock initShawn Guo2016-10-171-2/+2
|/
* clk: hi6220: Change syspll and media_syspll clk to 1.19GHzXinliang Liu2016-07-061-2/+2
* clk: hisilicon: hi3519: add driver remove path and fix some issuesJiancheng Xue2016-06-301-16/+100
* clk: hisilicon: add hisi_clk_unregister_* functionsJiancheng Xue2016-06-301-0/+21
* clk: hisilicon: add error processing for hisi_clk_register_* functionsJiancheng Xue2016-06-302-15/+55
* clk: hisilicon: add hisi_clk_alloc function.Jiancheng Xue2016-06-302-0/+32
* reset: hisilicon: change the definition of hisi_reset_initJiancheng Xue2016-06-303-13/+13
* Merge branch 'clk-hi6220-rtc' into clk-nextStephen Boyd2016-06-301-0/+2
|\
| * clk: hi6220: Add RTC clock for pl031Zhangfei Gao2016-06-301-0/+2
* | clk: hi6220: fix missing clk.h includeBen Dooks2016-06-201-0/+2
|/
* clk: hisilicon: add CRG driver for hi3519 socJiancheng Xue2016-05-063-0/+140
* clk: hisilicon: export some hisilicon APIs to modulesJiancheng Xue2016-05-062-15/+22
* reset: hisilicon: add reset controller driver for hisilicon SOCsJiancheng Xue2016-05-064-0/+178
* clk: hisilicon: Remove CLK_IS_ROOTStephen Boyd2016-03-025-56/+56
* clk: Remove unneeded semicolonsJavier Martinez Canillas2015-09-171-1/+1
* clk: Hi6220: separately build stub clock driverLeo Yan2015-09-032-2/+9
* clk: Hi6220: add stub clock driverLeo Yan2015-08-243-2/+278
* clk: hisi: refine parameter checking for initLeo Yan2015-08-031-8/+3
* Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2015-07-284-8/+1
|\
| * clk: hisilicon: Remove clk.h includeStephen Boyd2015-07-204-8/+1
* | clk: fix some determine_rate implementationsBoris Brezillon2015-07-271-1/+1
* | clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon2015-07-271-22/+17
|/
* clk: make several parent names constUwe Kleine-König2015-06-043-39/+39
* Merge branch 'clk-next-hi6220' into clk-nextMichael Turquette2015-06-036-12/+505
|\
| * clk: hi6220: Clock driver support for Hisilicon hi6220 SoCBintian Wang2015-06-036-1/+494
| * clk: hisilicon: Remove __init for marking function prototypesBintian Wang2015-06-031-11/+11
* | clk: hix5hd2: Silence sparse warningsStephen Boyd2015-05-141-2/+3
|/
* clk: don't use __initconst for non-const arraysUwe Kleine-König2015-04-122-38/+38
* clk: Add rate constraints to clocksTomeu Vizoso2015-02-021-0/+2
* clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso2014-12-031-1/+1
* clk: hi3620: Move const initdata into correct code sectionBintian Wang2014-11-191-35/+35
* clk: hix5hd2: add I2C clocksWei Yan2014-09-281-0/+25
* clk: hix5hd2: add watchdog0 clocksGuoxiong Yan2014-09-281-0/+5
* clk: hix5hd2: add sd clkJiancheng Xue2014-09-281-6/+15
* clk: hix5hd2: add complex clkZhangfei Gao2014-09-281-0/+181
* clk: hisi: add clk-hix5hd2.cZhangfei Gao2014-05-122-0/+102
* clk: hisi: add hisi_clk_register_gateZhangfei Gao2014-05-122-0/+30
* clk: hisi: use clk_register_mux_table in hisi_clk_register_muxZhangfei Gao2014-05-122-5/+9
* clk: hisilicon: fix warning from smatchZhangfei Gao2014-03-201-8/+7
* Merge tag 'clk-hisi' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhua...Mike Turquette2014-03-195-39/+128
|\
| * clk: hisi: remove static variableHaojian Zhuang2014-03-194-42/+72
| * clk: hip04: add clock driverHaojian Zhuang2014-03-192-1/+58
| * clk: hisi: assign missing clk to tableHaojian Zhuang2014-03-191-0/+2
* | clk: hisilicon: add hi3620_mmc_clksZhangfei Gao2014-02-261-0/+274
|/
* clk: hi3620: add gate clock flagHaojian Zhuang2013-12-111-59/+59
* clk: hi3620: fix wrong flags on dividerHaojian Zhuang2013-12-111-11/+11