linux.git - Linux kernel mainline tree

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge branch 'clk-s905' into clk-next	Michael Turquette	2016-07-15	1	-1/+1
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\| *	Revert "clk: gxbb: expose CLKID_MMC_PCLK"	Michael Turquette	2016-07-15	1	-1/+1
* \|	Merge branch 'clk-s905' into clk-next	Michael Turquette	2016-07-07	1	-1/+1
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\| *	clk: gxbb: expose CLKID_MMC_PCLK	Kevin Hilman	2016-07-07	1	-1/+1
* \|	clk: meson: make gxbb explicitly non-modular	Paul Gortmaker	2016-07-06	1	-14/+4
* \|	clk: meson8b: make it explicitly non-modular	Paul Gortmaker	2016-07-06	1	-15/+4
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*	clk: gxbb: add AmLogic GXBB clk controller driver	Michael Turquette	2016-06-22	4	-0/+1233
*	clk: meson: fractional pll support	Michael Turquette	2016-06-22	2	-2/+45
*	clk: meson: add mpll support	Michael Turquette	2016-06-22	3	-1/+105
*	clk: meson: add peripheral gate macro	Michael Turquette	2016-06-22	1	-0/+14
*	clk: meson: only build selected platforms	Michael Turquette	2016-06-22	2	-2/+14
*	clk: meson8b: convert to platform_driver	Michael Turquette	2016-06-22	1	-18/+49
*	clk: meson8b: clean up composite clocks	Michael Turquette	2016-06-22	4	-246/+66
*	clk: meson8b: remove mali clk	Michael Turquette	2016-06-22	1	-22/+0
*	clk: meson8b: clean up cpu clocks	Michael Turquette	2016-06-22	4	-90/+59
*	clk: meson8b: clean up fixed factor clocks	Michael Turquette	2016-06-22	3	-71/+60
*	clk: meson8b: clean up pll clocks	Michael Turquette	2016-06-22	4	-114/+131
*	clk: meson8b: clean up fixed rate clocks	Michael Turquette	2016-06-22	3	-75/+54
*	clk: meson8b: rectify reg offsets with datasheet	Michael Turquette	2016-06-22	1	-3/+12
*	clk: meson: Remove CLK_IS_ROOT	Stephen Boyd	2016-04-15	1	-3/+3
*	clk: meson: Fix meson_clk_register_clks() signature type mismatch	Andreas Färber	2016-02-08	1	-1/+1
*	clk: meson8b: Properly include clk.h	Stephen Boyd	2015-07-20	2	-1/+1
*	clk: meson: add some error handling in meson_clk_register_cpu()	Dan Carpenter	2015-06-12	1	-4/+12
*	clk: meson8b: Add support for Meson8b clocks	Carlo Caione	2015-06-05	2	-0/+197
*	clk: meson: Add support for Meson clock controller	Carlo Caione	2015-06-05	5	-0/+903