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path: root/drivers/clk/qcom/apcs-sdx55.c
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* clk: qcom: cleanup some dev_err_probe() callsDan Carpenter2021-06-011-2/+4
| | | | | | | | | | The dev_err_probe() function prints an error message if the error code is not -EPROBE_DEFER. If we know the error code in is -ENODEV then there is no reason to check. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YJotlJBJ1CVAgvMT@mwanda Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: qcom: Simplify usage of dev_err_probe()Uwe Kleine-König2021-06-011-14/+8
| | | | | | | | | | | dev_err_probe() returns the error code passed as second parameter. Also if the error code is -EPROBE_DEFER dev_err_probe() is silent, so there is no need to check for this value before calling dev_err_probe(). Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Link: https://lore.kernel.org/r/20210427164522.2886825-1-uwe@kleine-koenig.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
* clk: qcom: Add SDX55 APCS clock controller supportManivannan Sadhasivam2021-02-081-0/+149
Add a driver for the SDX55 APCS clock controller. It is part of the APCS hardware block, which among other things implements also a combined mux and half integer divider functionality. The APCS clock controller has 3 parent clocks: 1. Board XO 2. Fixed rate GPLL0 3. A7 PLL This is required for enabling CPU frequency scaling on SDX55-based platforms. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118041156.50016-6-manivannan.sadhasivam@linaro.org [sboyd@kernel.org: Fix unused ret in probe by hardcoding it] Signed-off-by: Stephen Boyd <sboyd@kernel.org>