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* clk: renesas: cpg-mssr: Fix reset control race conditionGeert Uytterhoeven2019-07-221-14/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2019-07-1710-120/+205
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| * clk: renesas: cpg-mssr: Use [] to denote a flexible array memberGeert Uytterhoeven2019-06-201-1/+1
| * clk: renesas: cpg-mssr: Combine driver-private and clock array allocationGeert Uytterhoeven2019-06-201-14/+6
| * clk: renesas: mstp: Combine group-private and clock array allocationGeert Uytterhoeven2019-06-201-6/+6
| * clk: renesas: div6: Combine clock-private and parent array allocationGeert Uytterhoeven2019-06-201-14/+5
| * clk: renesas: cpg-mssr: Update kerneldoc for struct cpg_mssr_privGeert Uytterhoeven2019-06-201-1/+2
| * clk: renesas: r8a774a1: Add TMU clockFabrizio Castro2019-06-181-0/+5
| * clk: renesas: r8a77995: Add CMM clocksJacopo Mondi2019-06-181-0/+2
| * clk: renesas: r8a77990: Add CMM clocksJacopo Mondi2019-06-181-0/+2
| * clk: renesas: r8a77965: Add CMM clocksJacopo Mondi2019-06-181-0/+3
| * clk: renesas: r8a7795: Add CMM clocksJacopo Mondi2019-06-181-0/+4
| * clk: renesas: r9a06g032: Add clock domain supportGareth Williams2019-06-041-69/+158
| * clk: renesas: mstp: Remove error messages on out-of-memory conditionsGeert Uytterhoeven2019-06-041-6/+2
| * clk: renesas: cpg-mssr: Remove error messages on out-of-memory conditionsGeert Uytterhoeven2019-06-041-6/+2
| * clk: renesas: cpg-mssr: Use genpd of_node instead of local copyGeert Uytterhoeven2019-06-041-3/+1
| * clk: renesas: r8a7796: Add CMM clocksJacopo Mondi2019-05-211-0/+3
| * clk: renesas: r8a779{5|6|65}: Add TPU clockCao Van Dong2019-05-213-0/+3
* | scripts/spelling.txt: add spelling fix for prohibitedChris Paterson2019-07-121-1/+1
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* clk: Remove io.h from clk-provider.hStephen Boyd2019-05-158-0/+8
*-. Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...Stephen Boyd2019-05-073-6/+6
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| | * clk: renesas: Use the correct style for SPDX License IdentifierNishad Kamdar2019-05-013-6/+6
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* | clk: renesas: rcar-gen3: Remove unused variableStephen Boyd2019-04-111-1/+0
* | clk: renesas: rcar-gen3: Fix cpg_sd_clock_round_rate() return valueTakeshi Kihara2019-04-041-16/+14
* | clk: renesas: r8a77980: Fix RPC-IF module clock's parentSergei Shtylyov2019-04-021-1/+1
* | clk: renesas: rcar-gen3: Rename DRIF clocksTakeshi Kihara2019-04-024-34/+35
* | clk: renesas: rcar-gen3: Correct parent clock of Audio-DMACTakeshi Kihara2019-04-027-11/+11
* | clk: renesas: rcar-gen3: Correct parent clock of SYS-DMACTakeshi Kihara2019-04-024-8/+8
* | clk: renesas: rcar-gen3: Correct parent clock of HS-USBKazuya Mizuguchi2019-04-026-7/+7
* | clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCIKazuya Mizuguchi2019-04-026-12/+12
* | clk: renesas: r8a774c0: Add Z2 clockSimon Horman2019-04-021-0/+1
* | clk: renesas: r8a77990: Add Z2 clockTakeshi Kihara2019-04-021-0/+1
* | clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parentsSimon Horman2019-04-021-2/+2
* | clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2Simon Horman2019-04-025-5/+3
* | clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offsetSimon Horman2019-04-026-20/+13
* | clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisorTakeshi Kihara2019-04-026-16/+28
* | clk: renesas: r9a06g032: Add missing PCI USB clockGareth Williams2019-04-021-0/+1
* | clk: renesas: r7s9210: Always use readl()Geert Uytterhoeven2019-04-021-1/+2
* | clk: renesas: rcar-gen3: Pass name/offset to cpg_sd_clk_register()Geert Uytterhoeven2019-03-181-6/+6
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* clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLKFabrizio Castro2019-02-251-1/+1
* clk: renesas: r8a774c0: Fix LAST_DT_CORE_CLKFabrizio Castro2019-02-211-1/+1
* clk: renesas: r8a774c0: Add TMU clockBiju Das2019-02-051-0/+5
* clk: renesas: r8a77980: Add RPC clocksSergei Shtylyov2019-02-051-0/+8
* clk: renesas: rcar-gen3: Add RPC clocksSergei Shtylyov2019-02-052-0/+105
* clk: renesas: rcar-gen3: Add spinlockSergei Shtylyov2019-01-251-0/+8
* clk: renesas: rcar-gen3: Factor out cpg_reg_modify()Sergei Shtylyov2019-01-251-18/+20
* clk: renesas: r8a774c0: Correct parent clock of DUGeert Uytterhoeven2019-01-241-2/+2
* clk: renesas: r8a774a1: Add missing CANFD clockFabrizio Castro2019-01-211-0/+2
* clk: renesas: r8a774c0: Add missing CANFD clockFabrizio Castro2019-01-211-0/+4
* Merge branch 'clk-of' into clk-nextStephen Boyd2018-12-141-1/+1
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