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path: root/drivers/clk/rockchip
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* clk: rockchip: add CLK_SET_RATE_PARENT for rk3066 lcdc dclksFinley Xiao2019-01-071-2/+2
* clk: rockchip: fix frac settings of GPLL clock for rk3328Katsuhiro Suzuki2019-01-071-6/+6
* clk: rockchip: add clock-id to gate of ACODEC for rk3328Katsuhiro Suzuki2018-11-261-1/+1
* clk: rockchip: fix I2S1 clock gate register for rk3328Katsuhiro Suzuki2018-11-191-1/+1
* clk: rockchip: make rk3188 hclk_vio_bus criticalMark Yao2018-11-151-1/+2
* clk: rockchip: fix rk3188 sclk_mac_lbtest parameter orderingHeiko Stuebner2018-11-151-2/+2
* clk: rockchip: fix rk3188 sclk_smc gate dataFinley Xiao2018-11-151-2/+2
* clk: rockchip: fix typo in rk3188 spdif_frac parentJohan Jonker2018-11-121-1/+1
* clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent callEnric Balletbo i Serra2018-10-171-4/+0
* clk: rockchip: use the newly added clock-id for hdmi on RK3066Heiko Stuebner2018-10-111-1/+1
* clk: rockchip: fix wrong mmc sample phase shift for rk3328Ziyuan Xu2018-10-111-4/+4
* clk: rockchip: improve rk3288 pll rates for better hdmi outputUrja Rannikko2018-08-311-4/+25
* clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399Levin Du2018-08-061-0/+1
* clk: rockchip: fix clk_i2sout parent selection bits on rk3399Alberto Panizzo2018-07-081-1/+1
* clk: rockchip: add clock controller for px30Elaine Zhang2018-07-063-1/+1080
* clk: rockchip: add support for half dividerElaine Zhang2018-07-064-0/+323
* clk: rockchip: remove deprecated gate-clk code and dt-bindingHeiko Stuebner2018-05-232-99/+0
* clk: rockchip: use match_string() helperYisheng Xie2018-05-221-11/+5
* clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399Lin Huang2018-03-231-2/+2
* clk: rockchip: Fix error return in phase clock registrationShawn Lin2018-03-231-2/+4
* clk: rockchip: Correct the behaviour of restoring cached phaseShawn Lin2018-03-231-2/+14
* clk: rockchip: Fix wrong parents for MMC phase clock for rk3328Shawn Lin2018-03-231-8/+8
* clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228Shawn Lin2018-03-231-1/+1
* clk: rockchip: Add 1.6GHz PLL rate for rk3399Derek Basehore2018-03-141-0/+1
* clk: rockchip: Restore the clock phase after the rate was changedShawn Lin2018-03-131-1/+38
* clk: rockchip: Prevent calculating mmc phase if clock rate is zeroShawn Lin2018-03-051-0/+23
* clk: rockchip: Free the memory on the error pathShawn Lin2018-03-021-4/+18
* clk: rockchip: add flags for rk3328 dclk_lcdcZheng Yang2018-02-121-1/+1
* clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocksHeiko Stuebner2018-02-121-2/+2
* clk: rockchip: protect all remaining rk3328 interconnect clocksHeiko Stuebner2018-02-121-19/+37
* clk: rockchip: export sclk_hdmi_sfc on rk3328Heiko Stuebner2018-02-121-1/+1
* clk: rockchip: fix hclk_vio_niu on rk3328Heiko Stuebner2018-02-121-1/+2
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2017-11-173-9/+7
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| * Merge tag 'v4.15-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd2017-10-313-9/+7
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| | * clk: rockchip: use new cif/vdpu clock ids on rk3188Heiko Stuebner2017-10-141-6/+6
| | * clk: rockchip: export clock pclk_efuse_256 for RK3368 SoCsRomain Perier2017-10-141-1/+1
| | * clk: rockchip: Remove superfluous error message in rockchip_clk_register_cpuc...Markus Elfring2017-09-281-2/+0
* | | License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-021-0/+1
|/ /
* | clk: rockchip: add sclk_timer5 as critical clock on rk3128Elaine Zhang2017-09-171-0/+1
* | clk: rockchip: fix up rk3128 pvtm and mipi_24m gate regs errorElaine Zhang2017-09-171-4/+4
* | clk: rockchip: add pclk_pmu as critical clock on rk3128Elaine Zhang2017-09-171-1/+2
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* clk: rockchip: Mark rockchip_fractional_approximation staticStephen Boyd2017-08-231-1/+1
* clk: rockchip: fix the rv1108 clk_mac sel register descriptionElaine Zhang2017-08-221-1/+1
* clk: rockchip: rename rv1108 macphy clock to macElaine Zhang2017-08-221-6/+6
* clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocksElaine Zhang2017-08-221-0/+2
* clk: rockchip: add rk3228 SCLK_SDIO_SRC clk idElaine Zhang2017-08-221-1/+1
* clk: rockchip: add special approximation to fix up fractional clk's jitterElaine Zhang2017-08-081-0/+36
* clk: rockchip: modify rk3128 clk driver to also support rk3126Elaine Zhang2017-08-081-14/+55
* clk: rockchip: add some critical clocks for rv1108 SoCElaine Zhang2017-08-081-1/+7
* clk: rockchip: rename some of clks for rv1108 SoCElaine Zhang2017-08-081-14/+14
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-29 10:42:50 +0000