summaryrefslogtreecommitdiffstats
path: root/drivers/clk
Commit message (Expand)AuthorAgeFilesLines
* clk: sunxi-ng: Provide a default reset hookMaxime Ripard2017-08-301-0/+12
* clk: sunxi-ng: a83t: Support new timing mode for mmc2 clockChen-Yu Tsai2017-08-301-8/+2
* clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switchingChen-Yu Tsai2017-08-302-0/+110
* clk: sunxi-ng: Add interface to query or configure MMC timing modes.Chen-Yu Tsai2017-08-303-0/+75
* clk: keystone: sci-clk: Fix sci_clk_getTero Kristo2017-08-021-24/+42
* Merge tag 'sunxi-clk-fixes-for-4.13' of https://git.kernel.org/pub/scm/linux/...Stephen Boyd2017-08-021-1/+1
|\
| * clk: sunxi-ng: sun5i: Add clk_set_rate_parent to the CPU clockMaxime Ripard2017-07-241-1/+1
* | Merge tag 'meson-clk-fixes-for-4.13-rc4-v2' of git://github.com/baylibre/clk-...Stephen Boyd2017-08-024-0/+18
|\ \
| * | clk: meson: mpll: fix mpll0 fractional part ignoredJerome Brunet2017-08-014-0/+18
| |/
* | clk: samsung: exynos5420: The EPLL rate table correctionsSylwester Nawrocki2017-07-311-8/+8
* | clk: x86: Do not gate clocks enabled by the firmwareCarlo Caione2017-07-181-0/+7
* | clk: gemini: Fix reset regressionLinus Walleij2017-07-171-0/+14
|/
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2017-07-155-0/+115
|\
| * clk: boston: Add a driver for MIPS Boston board clocksPaul Burton2017-07-115-0/+115
* | clk: gemini: Read status before using the valueJoel Stanley2017-06-291-0/+1
* | clk: scpi: error when clock fails to registerJerome Brunet2017-06-291-3/+5
* | clk: at91: Add sama5d2 suspend/resumeAlexandre Belloni2017-06-294-1/+140
* | clk: keystone: TI_SCI_PROTOCOL is needed for clk driverArnd Bergmann2017-06-221-1/+2
* | clk: samsung: audss: Fix silent hang on Exynos4412 due to disabled EPLLKrzysztof Kozlowski2017-06-221-0/+1
* | clk: uniphier: provide NAND controller clock rateMasahiro Yamada2017-06-211-4/+11
* | clk: hisilicon: add usb2 clocks for hi3798cv200 SoCJiancheng Xue2017-06-211-0/+21
* | clk: Add Gemini SoC clock controllerLinus Walleij2017-06-213-0/+464
* | clk: iproc: Remove __init marking on iproc_pll_clk_setup()Stephen Boyd2017-06-211-6/+6
* | clk: bcm: Add clocks for Stingray SOCSandeep Tripathy2017-06-193-0/+336
* | clk: mediatek: export cpu multiplexer clock for MT8173 SoCsSean Wang2017-06-191-0/+23
* | clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCsSean Wang2017-06-191-0/+8
* | clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't workSean Wang2017-06-193-1/+151
* | clk: renesas: cpg-mssr: Use of_device_get_match_data() helperGeert Uytterhoeven2017-06-191-1/+1
* | clk: hi6220: add acpu clockZhangfei Gao2017-06-191-0/+22
* | clk: zx296718: export I2S mux clocksShawn Guo2017-06-191-4/+4
* | clk: imx7d: create clocks behind rawnand clock gateStefan Agner2017-06-191-2/+4
* | clk: hi3660: Set PPLL2 to 2880MZhong Kaihua2017-06-191-2/+2
* | clk: hi3660: add clocks for video encoder, decoder and ISPChen Jun2017-06-191-0/+40
* | clk: hi3660: fix wrong parent name of clk_mux_sysbusChen Jun2017-06-191-2/+4
* | clk: gcc-msm8916: add support to 9.6MHz codec clkSrinivas Kandagatla2017-06-191-0/+1
* | clk: qcom: Add ipq8074 Global Clock Controller supportAbhishek Sahu2017-06-193-0/+1017
* | clk: mvebu: cp110: Minor cleanupsStephen Boyd2017-06-191-3/+2
* | Merge branch 'clk-cp110' of git://git.infradead.org/linux-mvebu into clk-nextStephen Boyd2017-06-191-62/+138
|\ \
| * | clk: mvebu: cp110: add sdio clock to cp-110 system controllerKonstantin Porotchkin2017-06-191-5/+23
| * | clk: mvebu: cp110: introduce a new bindingGregory CLEMENT2017-06-191-15/+48
| * | clk: mvebu: cp110: do not depend anymore of the *-clock-output-namesGregory CLEMENT2017-06-191-40/+65
| * | clk: mvebu: cp110: make failure labels more meaningfulGregory CLEMENT2017-06-011-10/+10
* | | clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen2017-06-192-1/+4
* | | clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVERLeo Yan2017-06-191-10/+38
* | | Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd2017-06-164-19/+25
|\ \ \
| * | | clk: meson: gxbb: add all clk81 parentsJerome Brunet2017-06-161-5/+8
| * | | Merge branch 'next/headers' into next/driversJerome Brunet2017-06-161-10/+10
| |\ \ \
| | * | | clk: meson8b: export the ethernet gate clockMartin Blumenstingl2017-06-121-1/+1
| | * | | clk: meson8b: export the USB clocksMartin Blumenstingl2017-06-121-5/+5
| | * | | clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl2017-06-121-1/+1
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-13 00:21:12 +0000