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* clk: renesas: cpg-mssr: Use of_device_get_match_data() helperGeert Uytterhoeven2017-06-191-1/+1
* clk: hi6220: add acpu clockZhangfei Gao2017-06-191-0/+22
* clk: zx296718: export I2S mux clocksShawn Guo2017-06-191-4/+4
* clk: imx7d: create clocks behind rawnand clock gateStefan Agner2017-06-191-2/+4
* clk: hi3660: Set PPLL2 to 2880MZhong Kaihua2017-06-191-2/+2
* clk: hi3660: add clocks for video encoder, decoder and ISPChen Jun2017-06-191-0/+40
* clk: hi3660: fix wrong parent name of clk_mux_sysbusChen Jun2017-06-191-2/+4
* clk: gcc-msm8916: add support to 9.6MHz codec clkSrinivas Kandagatla2017-06-191-0/+1
* clk: qcom: Add ipq8074 Global Clock Controller supportAbhishek Sahu2017-06-193-0/+1017
* clk: mvebu: cp110: Minor cleanupsStephen Boyd2017-06-191-3/+2
* Merge branch 'clk-cp110' of git://git.infradead.org/linux-mvebu into clk-nextStephen Boyd2017-06-191-62/+138
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| * clk: mvebu: cp110: add sdio clock to cp-110 system controllerKonstantin Porotchkin2017-06-191-5/+23
| * clk: mvebu: cp110: introduce a new bindingGregory CLEMENT2017-06-191-15/+48
| * clk: mvebu: cp110: do not depend anymore of the *-clock-output-namesGregory CLEMENT2017-06-191-40/+65
| * clk: mvebu: cp110: make failure labels more meaningfulGregory CLEMENT2017-06-011-10/+10
* | clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen2017-06-192-1/+4
* | clk: Hi3660: register fixed_rate_clks with CLK_OF_DECLARE_DRIVERLeo Yan2017-06-191-10/+38
* | Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...Stephen Boyd2017-06-164-19/+25
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| * | clk: meson: gxbb: add all clk81 parentsJerome Brunet2017-06-161-5/+8
| * | Merge branch 'next/headers' into next/driversJerome Brunet2017-06-161-10/+10
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| | * | clk: meson8b: export the ethernet gate clockMartin Blumenstingl2017-06-121-1/+1
| | * | clk: meson8b: export the USB clocksMartin Blumenstingl2017-06-121-5/+5
| | * | clk: meson8b: export the gate clock for the HW random number generatorMartin Blumenstingl2017-06-121-1/+1
| | * | clk: meson8b: export the SDIO clockMartin Blumenstingl2017-06-121-1/+1
| | * | clk: meson8b: export the SAR ADC clocksMartin Blumenstingl2017-06-121-2/+2
| * | | clk: meson: meson8b: add compatibles for Meson8 and Meson8m2Martin Blumenstingl2017-06-122-4/+7
* | | | Merge branch 'for-4.13-ti-clkctrl' of https://github.com/t-kristo/linux-pm in...Stephen Boyd2017-06-164-1/+1193
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| * | | | clk: ti: omap4: add clkctrl clock dataTero Kristo2017-06-153-0/+670
| * | | | clk: ti: add support for clkctrl clocksTero Kristo2017-06-153-1/+523
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* | | | clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()Stephen Boyd2017-06-161-1/+1
* | | | Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd2017-06-1622-269/+1572
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| * | | | clk: sunxi-ng: Move all clock types to a libraryStephen Boyd2017-06-072-132/+22
| * | | | clk: sunxi-ng: a83t: Add support for A83T's PRCMChen-Yu Tsai2017-06-071-0/+107
| * | | | clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83tArnd Bergmann2017-06-071-0/+1
| * | | | clk: sunxi-ng: a83t: Fix audio PLL divider offsetChen-Yu Tsai2017-06-071-1/+1
| * | | | clk: sunxi-ng: a83t: Fix PLL lock status register offsetChen-Yu Tsai2017-06-071-1/+1
| * | | | clk: sunxi-ng: Add driver for A83T CCUChen-Yu Tsai2017-06-074-0/+998
| * | | | clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai2017-06-079-47/+54
| * | | | clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()Wei Yongjun2017-06-071-1/+1
| * | | | clk: sunxi-ng: sun5i: Export video PLLsMaxime Ripard2017-06-071-2/+4
| * | | | clk: sunxi-ng: mux: Re-adjust parent rateMaxime Ripard2017-06-071-5/+28
| * | | | clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard2017-06-075-33/+28
| * | | | clk: sunxi-ng: mux: split out the pre-divider computation codeMaxime Ripard2017-06-071-12/+20
| * | | | clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENTMaxime Ripard2017-06-071-13/+1
| * | | | clk: sunxi-ng: div: Switch to divider_round_rateMaxime Ripard2017-06-071-23/+4
| * | | | clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard2017-06-076-18/+25
| * | | | clk: divider: Make divider_round_rate take the parent clockMaxime Ripard2017-06-071-9/+10
| * | | | clk: sunxi-ng: explicitly include linux/spinlock.hTobias Klauser2017-06-071-0/+1
| * | | | clk: sunxi-ng: add support for DE2 CCUIcenowy Zheng2017-06-074-0/+294
* | | | | Merge branch 'clk-fixes' into clk-nextStephen Boyd2017-06-145-4/+9
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