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path: root/drivers/dma/hsu
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* dmaengine: hsu: speed up residue calculationAndy Shevchenko2015-12-052-13/+5
| | | | | | | | | There is no need to calculate an overall length of the descriptor each time we call for DMA transfer status. Instead we do this at descriptor allocation stage and keep the stored length for further usage. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: hsu: remove platform dataHeikki Krogerus2015-10-173-18/+9
| | | | | | | | | | | | | There are no platforms where it's not possible to calculate the number of channels based on IO space length, and since that is the only purpose for struct hsu_dma_platform_data, removing it. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* dmaengine: hsu: make the UART driver in control of selecting this driverHeikki Krogerus2015-10-171-7/+2
| | | | | | | | | | | | | | | HSU (High Speed UART) DMA engine, like the name suggests, is an integrated DMA engine for UART and UART alone. Therefore, making the UART drivers responsible of selecting it and removing the user selectable option for it. The UARTs with this DMA engine can always select HSU_DMA when SERIAL_8250_DMA option is enabled. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* dmaengine: hsu: remove excessive lockAndy Shevchenko2015-07-162-36/+4
| | | | | | | | | All hardware accesses are done under virtual channel lock. That's why specific channel lock is excessive and can be removed safely. This has been tested on Intel Medfield and Merrifield. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: hsu: Fix memory leak when stopping a running transferPeter Ujfalusi2015-06-021-1/+4
| | | | | | | | | | The vd->node is removed from the lists when the transfer started so the vchan_get_all_descriptors() will not find it. This results memory leak. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> [andy: fix the typo to prevent a compilation error] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* dmaengine: hsu: don't prompt for hsu_core partVinod Koul2015-04-221-1/+1
| | | | | | | | HSU_DMA is selected by the HSU_DMA_PCI driver, this should be user selected so remove the user prompt for this Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* dmaengine: hsu: move memory allocation to GFP_NOWAITAndy Shevchenko2015-03-261-2/+2
| | | | | | | | | The GFP_ATOMIC is too strict, and DMAEngine documentation make an advice to use GFP_NOWAIT. This patch does the conversion. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* dmaengine: hsu: remove redundant pieces of codeAndy Shevchenko2015-03-261-11/+2
| | | | | | | | | | | There are few places where the implemented pieces of code are not needed, i.e.: - direction can't be wrong in hsu_dma_chan_start() - desc->active set to 0 by kzalloc - DMAEngine is NULL-aware when call ->device_alloc_chan_resources() Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* dmaengine: hsu: add Intel Tangier PCI IDAndy Shevchenko2015-03-261-0/+1
| | | | | | | | Intel Tangier is known to have the HSU DMA IP as PCI device 00:05.0. The patch adds the ID as found on Intel Edison board to the PCI device table. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* dmaengine: append hsu DMA driverAndy Shevchenko2015-03-075-0/+764
The HSU DMA is developed to support High Speed UART controllers found in particular on Intel MID platforms such as Intel Medfield. The existing implementation is tighten to the drivers/tty/serial/mfd.c driver and has a lot of disadvantages. Besides that we would like to get rid of the old HS UART driver in regarding to extending the 8250 which supports generic DMAEngine API. That's why the current driver has been developed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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