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| * | dma: pl330: off by one in pl330_probe()Dan Carpenter2013-11-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | There are only AMBA_NR_IRQS (2) elements in adev->irq[]. This code maybe works if the there is a zero directly after the array. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: mxs-dma: Use semaphores for cyclic DMAMarkus Pargmann2013-11-131-6/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mxs dma channel hardware reset command is not reliable and can cause a channel stall. The only way to fix the channel stall is a DMA engine reset. To avoid channel resets we use the hardware semaphore counter. For each transmitted segment, the DMA channel will decrease the counter by one. To use this mechanism with cyclic DMA, we need to increase the semaphore counter with each completed DMA command in the interrupt handler. To avoid any interruptions between the DMA transfers, the semaphore counter is initialized with 2. This way the counter can be increased in the interrupt handler without an influence on the transfer of the DMA engine. When disabling the channel, we stop increasing the semaphore counter in the interrupt handler. This patch was tested on i.MX28 with the SAIF DMA channel. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: mxs-dma: Update state after channel resetMarkus Pargmann2013-11-131-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | After a channel reset, the channel stops running automatically. The state update was missing so that a channel perperation right after a channel reset failed. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: mxs-dma: Fix channel reset hardware bugMarkus Pargmann2013-11-131-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is no official errata, but I noticed that the channel reset may stop working if the DMA state engine is in the READ_FLUSH state. This patch uses the channel debug1 register to wait for the DMA statemachine to leave the READ_FLUSH state. After that we can continue to reset the channel. Tested on i.MX28. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: mxs-dma: Report correct residue for cyclic DMAMarkus Pargmann2013-11-131-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | Use the channel's buffer address register to calculate correct residue value for tx_status. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: mxs-dma: Cleanup interrupt handlerMarkus Pargmann2013-11-131-36/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA interrupt handler uses its controll registers to handle all available channel interrupts it can find. This patch changes it to handle only one interrupt by directly mapping irq number to channel. It also includes a cleanup of the ctrl-register usage. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | DMA: Freescale: update driver to support 8-channel DMA engineHongbo Zhang2013-11-133-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to 8-channel DMA engine, thus the driver works for both the new 8-channel and the legacy 4-channel DMA engines. Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: imx-sdma: Fix warnings for LPAE buildsOlof Johansson2013-11-131-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This resolves a number of warnings such as the below when building with 64-bit dma_addr_t on arm: drivers/dma/imx-sdma.c:1092:3: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'dma_addr_t' [-Wformat=] ..by upcasting to u64 and using %llx. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ipu: fix warnings from 64-bit dma_addr_t printoutsOlof Johansson2013-11-131-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This resolves a number of warnings such as the below when building with 64-bit dma_addr_t on arm: drivers/dma/ipu/ipu_idmac.c:1235:2: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'dma_addr_t' [-Wformat=] ..by upcasting to u64 and using %llx. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: edma: remove duplicate kfreeVinod Koul2013-11-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | fixing of freeing descriptor memory was applied twice, so remove the one duplicate Reported-by: Wing-Keung Wang <wingkeung.wang@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: cppi41: return code > 0 of pm_runtime_get_sync() is not an errorSebastian Andrzej Siewior2013-11-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Return code of pm_runtime_get_sync() > 0 is not an error and may happen. Noticed during rmmod & modprobe testing. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: cppi41: redo descriptor collection in abort caseSebastian Andrzej Siewior2013-11-121-26/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the logic here is try and error since what actually happens does not match the trm or I miss read it. My first assumption was that the queue on which the tear-down descriptor completes (their own complete queue vs "active descriptor" complete queue) depends on the transfer direction. This seems not to be true because I manage to trigger | WARN_ON(c->desc_phys != desc_phys); and the other few were fine means the tear-down descriptor was valid but on different queue. This patch changes the logic here to look on both queues for the descriptor. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: cppi41: use cppi41_pop_desc() where possibleDaniel Mack2013-11-121-12/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use cppi41_pop_desc() when appropriate instead of open-coding the same functionality again. That makes the code more readable. The function has to be moved some lines up for this change. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: cppi41: restore more registersDaniel Mack2013-11-121-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With active users over suspend/resume cycles, it turns out that more registers, in particular DMA_TDFDQ and RXHPCRA0, have to be restored on resume. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma: edma: Add support for Cyclic DMAJoel Fernandes2013-11-121-8/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using the PaRAM configuration function that we split for reuse by the different DMA types, we implement Cyclic DMA support. For the cyclic case, we pass different configuration parameters to this function, and handle all the Cyclic-specific functionality separately. Callbacks to the DMA users are handled using vchan_cyclic_callback in the virt-dma layer. Linking is handled the same way as the slave SG case except for the last slot where we link it back to the first one in a cyclic fashion. For continuity, we check for cases where no.of periods is great than the MAX number of slots the driver can allocate for a particular descriptor and error out on such cases. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'for-linus' into nextVinod Koul2013-10-312-20/+23
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| | * | dma: pl330: Remove unnecessary amba_set_drvdata()Michal Simek2013-10-311-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver core clears the driver data to NULL after device_release or on probe failure, so just remove it from here. Driver core change: "device-core: Ensure drvdata = NULL when no driver is bound" (sha1: 0998d0631001288a5974afc0b2a5f568bcdecb4d) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: imx-dma: fix format warningsRussell King2013-10-311-17/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/dma/imx-dma.c:575:3: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'dma_addr_t' drivers/dma/imx-dma.c:575:3: warning: format '%x' expects argument of type 'unsigned int', but argument 7 has type 'dma_addr_t' drivers/dma/imx-dma.c:589:4: warning: format '%x' expects argument of type 'unsigned int', but argument 9 has type 'dma_addr_t' drivers/dma/imx-dma.c:599:4: warning: format '%x' expects argument of type 'unsigned int', but argument 9 has type 'dma_addr_t' drivers/dma/imx-dma.c:929:2: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'dma_addr_t' drivers/dma/imx-dma.c:929:2: warning: format '%x' expects argument of type 'unsigned int', but argument 7 has type 'dma_addr_t' drivers/dma/imx-dma.c:959:2: warning: format '%x' expects argument of type 'unsigned int', but argument 6 has type 'dma_addr_t' drivers/dma/imx-dma.c:959:2: warning: format '%x' expects argument of type 'unsigned int', but argument 7 has type 'dma_addr_t' We can't use the %pa format for these because this relates to phys_addr_t, and dma_addr_t can be a different size. So, fix these by converting them to %llx and casting the dma_addr_t to always be unsigned long long. While we're here, also use %zu for size_t. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | Merge branch 'dma_complete' into nextVinod Koul2013-10-311-2/+2
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| | * | | dmanengine: fix edma driver to not define DMA_COMPLETEVinod Koul2013-10-301-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | edma header defines DMA_COMPLETE, this causes issues as commit adfedd9a32e4 move DMA_SUCCESS to DMA_COMPLETE. edma should properly namespace its defines and needs a future fix Reported-by: Olof Johansson <olof@lixom.net> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | Merge branch 'dma_complete' into nextVinod Koul2013-10-3026-48/+48
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| | * | | dmaengine: txx9: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: tegra: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: ste: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: sh: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: sa11x0: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: ppc4xx: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: omap: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: mxs-dma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: mv_xor: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: mmp_tdma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Zhangfei Gao <zhangfei.gao@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: k3dma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: iop: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: ioat: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-252-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: intel_mid_dma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: imx-sdma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: imx-dma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: edma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested-by: Joel Fernandes <joelf@ti.com> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: dw: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: dmatest: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: jz4740: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: cppi41: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: coh901318: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: at_hdma: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: amba-pl08x: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dmaengine: use DMA_COMPLETE for dma completion statusVinod Koul2013-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the DMA_SUCCESS is a misnomer as dmaengine indicates the transfer is complete and gives no guarantee of the transfer success. Hence we should use DMA_COMPLTE instead of DMA_SUCCESS Acked-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | | | Merge branch 'for-linus' into nextVinod Koul2013-10-3011-135/+254
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/dma/edma.c Moved the memory leak fix post merge Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dma: edma: Increase maximum SG limit to 20Joel Fernandes2013-10-211-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | davinci-pcm uses 16 as the no.of periods. With this, in EDMA we have to allocate atleast 17 slots: 1 slot for channel, and 16 slots the periods. Due to this, the MAX_NR_SG limitation causes problems, set it to 20 to make cyclic DMA work when davinci-pcm is converted to use DMA Engine. Also add a comment clarifying this. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | | dma: edma: Split out PaRAM set calculations into its own functionJoel Fernandes2013-10-211-72/+126
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PaRAM set calculation is abstracted into its own function to enable better reuse for other DMA cases such as cyclic. We adapt the Slave SG case to use the new function. This provides a much cleaner abstraction to the internals of the PaRAM set. However, any PaRAM attributes that are not common to all DMA types must be set separately such as setting of interrupts. This function takes care of the most-common attributes. Also added comments clarifying A-sync case calculations. Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dma: pl330: Support per channel irq allocationMichal Simek2013-10-131-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some pl330 have per channel irq and it is necessary to allocate all of them. Loop over irq assigned for this device to support these pl330 IPs. For example this IP is available on Xilinx Zynq platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-24 08:25:53 +0000