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* dmaengine: cppi41: Fix cppi41_dma_prep_slave_sg() when idleTony Lindgren2019-10-231-1/+20
| | | | | | | | | | | | | | | | | | | | | | Yegor Yefremov <yegorslists@googlemail.com> reported that musb and ftdi uart can fail for the first open of the uart unless connected using a hub. This is because the first dma call done by musb_ep_program() must wait if cppi41 is PM runtime suspended. Otherwise musb_ep_program() continues with other non-dma packets before the DMA transfer is started causing at least ftdi uarts to fail to receive data. Let's fix the issue by waking up cppi41 with PM runtime calls added to cppi41_dma_prep_slave_sg() and return NULL if still idled. This way we have musb_ep_program() continue with PIO until cppi41 is awake. Fixes: fdea2d09b997 ("dmaengine: cppi41: Add basic PM runtime support") Reported-by: Yegor Yefremov <yegorslists@googlemail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Cc: stable@vger.kernel.org # v4.9+ Link: https://lore.kernel.org/r/20191023153138.23442-1-tony@atomide.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: qcom: bam_dma: Fix resource leakJeffrey Hugo2019-10-181-0/+19
| | | | | | | | | | | | | | | | | bam_dma_terminate_all() will leak resources if any of the transactions are committed to the hardware (present in the desc fifo), and not complete. Since bam_dma_terminate_all() does not cause the hardware to be updated, the hardware will still operate on any previously committed transactions. This can cause memory corruption if the memory for the transaction has been reassigned, and will cause a sync issue between the BAM and its client(s). Fix this by properly updating the hardware in bam_dma_terminate_all(). Fixes: e7c0fe2a5c84 ("dmaengine: add Qualcomm BAM dma driver") Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20191017152606.34120-1-jeffrey.l.hugo@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: sprd: Fix the possible memory leak issueBaolin Wang2019-10-151-0/+15
| | | | | | | | | | | | | | | | | | If we terminate the channel to free all descriptors associated with this channel, we will leak the memory of current descriptor if the current descriptor is not completed, since it had been deteled from the desc_issued list and have not been added into the desc_completed list. Thus we should check if current descriptor is completed or not, when freeing the descriptors associated with one channel, if not, we should free it to avoid this issue. Fixes: 9b3b8171f7f4 ("dmaengine: sprd: Add Spreadtrum DMA driver") Reported-by: Zhenfang Wang <zhenfang.wang@unisoc.com> Tested-by: Zhenfang Wang <zhenfang.wang@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/170dbbc6d5366b6fa974ce2d366652e23a334251.1570609788.git.baolin.wang@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: xilinx_dma: Fix control reg update in vdma_channel_set_configRadhey Shyam Pandey2019-10-151-0/+7
| | | | | | | | | | | | In vdma_channel_set_config clear the delay, frame count and master mask before updating their new values. It avoids programming incorrect state when input parameters are different from default. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Acked-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1569495060-18117-3-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transferRadhey Shyam Pandey2019-10-151-1/+2
| | | | | | | | | | In AXI DMA simple mode also pass MSB bits of source and destination address to xilinx_write function. It fixes simple AXI DMA operation mode using 64-bit addressing. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com> Link: https://lore.kernel.org/r/1569495060-18117-2-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: imx-sdma: fix size check for sdma script_numberRobin Gong2019-10-141-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Illegal memory will be touch if SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 (41) exceed the size of structure sdma_script_start_addrs(40), thus cause memory corrupt such as slob block header so that kernel trap into while() loop forever in slob_free(). Please refer to below code piece in imx-sdma.c: for (i = 0; i < sdma->script_number; i++) if (addr_arr[i] > 0) saddr_arr[i] = addr_arr[i]; /* memory corrupt here */ That issue was brought by commit a572460be9cf ("dmaengine: imx-sdma: Add support for version 3 firmware") because SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3 (38->41 3 scripts added) not align with script number added in sdma_script_start_addrs(2 scripts). Fixes: a572460be9cf ("dmaengine: imx-sdma: Add support for version 3 firmware") Cc: stable@vger.kernel Link: https://www.spinics.net/lists/arm-kernel/msg754895.html Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reported-by: Jurgen Lambrecht <J.Lambrecht@TELEVIC.com> Link: https://lore.kernel.org/r/1569347584-3478-1-git-send-email-yibin.gong@nxp.com [vkoul: update the patch title] Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: tegra210-adma: fix transfer failureSameer Pujar2019-10-141-0/+7
| | | | | | | | | | | | | | | | | | | | >From Tegra186 onwards OUTSTANDING_REQUESTS field is added in channel configuration register(bits 7:4) which defines the maximum number of reads from the source and writes to the destination that may be outstanding at any given point of time. This field must be programmed with a value between 1 and 8. A value of 0 will prevent any transfers from happening. Thus added 'has_outstanding_reqs' bool member in chip data structure and is set to false for Tegra210, since the field is not applicable. For Tegra186 it is set to true and channel configuration is updated with maximum outstanding requests. Fixes: 433de642a76c ("dmaengine: tegra210-adma: add support for Tegra186/Tegra194") Cc: stable@vger.kernel.org Signed-off-by: Sameer Pujar <spujar@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/1568626513-16541-1-git-send-email-spujar@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
* dmaengine: sprd: Fix the link-list pointer register configuration issueZhenfang Wang2019-10-141-2/+10
| | | | | | | | | | | | | | | | | | | We will set the link-list pointer register point to next link-list configuration's physical address, which can load DMA configuration from the link-list node automatically. But the link-list node's physical address can be larger than 32bits, and now Spreadtrum DMA driver only supports 32bits physical address, which may cause loading a incorrect DMA configuration when starting the link-list transfer mode. According to the DMA datasheet, we can use SRC_BLK_STEP register (bit28 - bit31) to save the high bits of the link-list node's physical address to fix this issue. Fixes: 4ac695464763 ("dmaengine: sprd: Support DMA link-list mode") Signed-off-by: Zhenfang Wang <zhenfang.wang@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/eadfe9295499efa003e1c344e67e2890f9d1d780.1568267061.git.baolin.wang@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
* Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds2019-09-223-630/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MIPS updates from Paul Burton: "Main MIPS changes: - boot_mem_map is removed, providing a nice cleanup made possible by the recent removal of bootmem. - Some fixes to atomics, in general providing compiler barriers for smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or MIPS32 systems using cmpxchg64(). - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo Frascino. - Removal of undefined behavior in set_io_port_base(), fixing the behavior of some MIPS kernel configurations when built with recent clang versions. - Initial MIPS32 huge page support, functional on at least Ingenic SoCs. - pte_special() is now supported for some configurations, allowing among other things generic fast GUP to be used. - Miscellaneous fixes & cleanups. And platform specific changes: - Major improvements to Ingenic SoC support from Paul Cercueil, mostly enabled by the inclusion of the new TCU (timer-counter unit) drivers he's spent a very patient year or so working on. Plus some fixes for X1000 SoCs from Zhou Yanjie. - Netgear R6200 v1 systems are now supported by the bcm47xx platform. - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems" * tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits) MIPS: Detect bad _PFN_SHIFT values MIPS: Disable pte_special() for MIPS32 with RiXi MIPS: ralink: deactivate PCI support for SOC_MT7621 mips: compat: vdso: Use legacy syscalls as fallback MIPS: Drop Loongson _CACHE_* definitions MIPS: tlbex: Remove cpu_has_local_ebase MIPS: tlbex: Simplify r3k check MIPS: Select R3k-style TLB in Kconfig MIPS: PCI: refactor ioc3 special handling mips: remove ioremap_cachable mips/atomic: Fix smp_mb__{before,after}_atomic() mips/atomic: Fix loongson_llsc_mb() wreckage mips/atomic: Fix cmpxchg64 barriers MIPS: Octeon: remove duplicated include from dma-octeon.c firmware: bcm47xx_nvram: Allow COMPILE_TEST firmware: bcm47xx_nvram: Correct size_t printf format MIPS: Treat Loongson Extensions as ASEs MIPS: Remove dev_err() usage after platform_get_irq() MIPS: dts: mscc: describe the PTP ready interrupt MIPS: dts: mscc: describe the PTP register range ...
| * dma: Drop JZ4740 driverPaul Cercueil2019-07-303-630/+0
| | | | | | | | | | | | | | | | | | | | The newer and better JZ4780 driver is now used to provide DMA functionality on the JZ4740. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Paul Burton <paul.burton@mips.com>
* | Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2019-09-1739-454/+746
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: - Move Dmaengine DT bindings to YAML and convert Allwinner to schema. - FSL dma device_synchronize implementation - DW split acpi and of helpers and updates to driver and support for Elkhart Lake - Move filter fn as private for omap-dma and edma drivers and improvements to these drivers - Mark expected switch fall-through in couple of drivers - Renames of shdma and nbpfaxi binding document - Minor updates to bunch of drivers * tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits) dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits() dmaengine: ti: edma: Only reset region0 access registers dmaengine: ti: edma: Do not reset reserved paRAM slots dmaengine: iop-adma.c: fix printk format warning dmaengine: stm32-dma: Use struct_size() helper dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property dmanegine: ioat/dca: Use struct_size() helper dmaengine: iop-adma: remove set but not used variable 'slots_per_op' dmaengine: dmatest: Add support for completion polling dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status() dmaengine: ti: omap-dma: Remove 'Assignment in if condition' dmaengine: ti: edma: Remove 'Assignment in if condition' dmaengine: dw: platform: Split OF helpers to separate module dmaengine: dw: platform: Split ACPI helpers to separate module dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register() dmaengine: dw: platform: Switch to acpi_dma_controller_register() dmaengine: dw: platform: Use devm_platform_ioremap_resource() dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw: platform: Use struct dw_dma_chip_pdata dmaengine: dw: Export struct dw_dma_chip_pdata for wider use ...
| * | dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits()Peter Ujfalusi2019-09-041-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | bitmap_set() is the standard way of setting an area in the bitfield. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190823125618.8133-4-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: edma: Only reset region0 access registersPeter Ujfalusi2019-09-041-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Region0 is used by Linux, do not reset other registers controlling access for other shadow regions. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190823125618.8133-3-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: edma: Do not reset reserved paRAM slotsPeter Ujfalusi2019-09-041-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Skip resetting paRAM slots marked as reserved as they might be used by other cores. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190823125618.8133-2-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: iop-adma.c: fix printk format warningRandy Dunlap2019-09-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix printk format warning in iop-adma.c (seen on x86_64) by using %pad: ../drivers/dma/iop-adma.c:118:12: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 6 has type ‘dma_addr_t {aka long long unsigned int}’ [-Wformat=] Fixes: c211092313b9 ("dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Link: https://lore.kernel.org/r/1803541f-98a6-7cce-b050-ff1e9a333ab2@infradead.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: stm32-dma: Use struct_size() helperGustavo A. R. Silva2019-09-041-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct stm32_dma_desc { ... struct stm32_dma_sg_req sg_req[]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following function: static struct stm32_dma_desc *stm32_dma_alloc_desc(u32 num_sgs) { return kzalloc(sizeof(struct stm32_dma_desc) + sizeof(struct stm32_dma_sg_req) * num_sgs, GFP_NOWAIT); } with: kzalloc(struct_size(desc, sg_req, num_sgs), GFP_NOWAIT) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Link: https://lore.kernel.org/r/20190830161423.GA3483@embeddedor Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmanegine: ioat/dca: Use struct_size() helperGustavo A. R. Silva2019-09-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct ioat_dca_priv { ... struct ioat_dca_slot req_slots[0]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following form: sizeof(*ioatdca) + (sizeof(struct ioat_dca_slot) * slots) with: struct_size(ioatdca, req_slots, slots) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20190828184015.GA4273@embeddedor Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: iop-adma: remove set but not used variable 'slots_per_op'YueHaibing2019-09-041-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes gcc '-Wunused-but-set-variable' warning: drivers/dma/iop-adma.c: In function iop_adma_tx_submit: drivers/dma/iop-adma.c:367:6: warning: variable slots_per_op set but not used [-Wunused-but-set-variable] It is never used, so can be removed. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20190821121908.7468-1-yuehaibing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dmatest: Add support for completion pollingPeter Ujfalusi2019-09-041-7/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the polled parameter the DMA drivers can be tested if they can work correctly when no completion is requested (no DMA_PREP_INTERRUPT and no callback is provided). If polled mode is selected then use dma_sync_wait() to execute the test iteration instead of relying on the completion callback. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190731071438.24075-1-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status()Peter Ujfalusi2019-09-041-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to fetch local omap_desc since the desc we have is the correct one already when we need to check the channel status. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190730132029.2971-1-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: omap-dma: Remove 'Assignment in if condition'Peter Ujfalusi2019-09-041-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | While the compiler does not have problem with how it is implemented, checkpatch does give en ERROR for this arrangement. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190730132015.2863-1-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: edma: Remove 'Assignment in if condition'Peter Ujfalusi2019-09-041-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | While the compiler does not have problem with how it is implemented, checkpatch does give en ERROR for this arrangement. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190730132006.2790-1-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Split OF helpers to separate moduleAndy Shevchenko2019-08-214-113/+149
| | | | | | | | | | | | | | | | | | | | | | | | For better maintenance split OF helpers to the separate module. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-11-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Split ACPI helpers to separate moduleAndy Shevchenko2019-08-214-53/+63
| | | | | | | | | | | | | | | | | | | | | | | | For better maintenance split ACPI helpers to the separate module. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-10-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()Andy Shevchenko2019-08-211-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move ACPI handle check to the dw_dma_acpi_controller_register(). While here, convert it to has_acpi_companion() which is recommended way. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-9-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Switch to acpi_dma_controller_register()Andy Shevchenko2019-08-211-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a possibility to have registered ACPI DMA controller while it has been gone already. To avoid the potential crash, move to non-managed acpi_dma_controller_register(). Fixes: 42c91ee71d6d ("dw_dmac: add ACPI support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-8-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Use devm_platform_ioremap_resource()Andy Shevchenko2019-08-211-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-7-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart LakeAndy Shevchenko2019-08-211-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Intel® PSE (Programmable Services Engine) provides few DMA controllers to the host on Intel Elkhart Lake. Enable them in the ACPI glue driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-6-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: platform: Use struct dw_dma_chip_pdataAndy Shevchenko2019-08-211-11/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | Now, when we have a generic structure for the chip and platform data, use it in the platform glue driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-5-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: Export struct dw_dma_chip_pdata for wider useAndy Shevchenko2019-08-212-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are expecting some devices can be enumerated either as PCI or ACPI. Nevertheless, they will share same information, thus, provide a generic struct dw_dma_chip_pdata for all glue drivers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-4-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: acpi: Add kernel doc parameter descriptionsAndy Shevchenko2019-08-211-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel documentation script is not happy about absence of function parameter descriptions: drivers/dma/acpi-dma.c:163: warning: Function parameter or member 'data' not described in 'acpi_dma_controller_register' drivers/dma/acpi-dma.c:247: warning: Function parameter or member 'data' not described in 'devm_acpi_dma_controller_register' drivers/dma/acpi-dma.c:274: warning: Function parameter or member 'dev' not described in 'devm_acpi_dma_controller_free' Append the descriptions of above mentioned function parameters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-3-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: acpi: Set up DMA mask based on CSRTAndy Shevchenko2019-08-211-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CSRT has an information about address width, which is supported by the certain DMA controller. Use information from CSRT to set up DMA mask for shared controller. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190820131546.75744-2-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: change alignment of mux_configure32 and fsl_edma_chan_muxMao Wenan2019-08-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The alignment of mux_configure32() and fsl_edma_chan_mux() need to be adjusted, it must start precisely at the first column after the openning parenthesis of the first line. Fixes: 9d831528a656 ("dmaengine: fsl-edma: extract common fsl-edma code (no changes in behavior intended)") Signed-off-by: Mao Wenan <maowenan@huawei.com> Link: https://lore.kernel.org/r/20190814072105.144107-3-maowenan@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: make mux_configure32 staticMao Wenan2019-08-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is one sparse warning in drivers/dma/fsl-edma-common.c: drivers/dma/fsl-edma-common.c:93:6: warning: symbol 'mux_configure32' was not declared. Should it be static? Fix it by setting mux_configure32() as static. Fixes: 232a7f18cf8ec ("dmaengine: fsl-edma: add i.mx7ulp edma2 version support") Signed-off-by: Mao Wenan <maowenan@huawei.com> Link: https://lore.kernel.org/r/20190814072105.144107-2-maowenan@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: mv_xor_v2: Fix -Wshift-negative-valueNathan Huckleberry2019-08-201-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang produces the following warning drivers/dma/mv_xor_v2.c:264:40: warning: shifting a negative signed value is undefined [-Wshift-negative-value] reg &= (~MV_XOR_V2_DMA_IMSG_THRD_MASK << MV_XOR_V2_DMA_IMSG_THRD_SHIFT); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ drivers/dma/mv_xor_v2.c:271:46: warning: shifting a negative signed value is undefined [-Wshift-negative-value] reg &= (~MV_XOR_V2_DMA_IMSG_TIMER_THRD_MASK << ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ Upon further investigation MV_XOR_V2_DMA_IMSG_THRD_SHIFT and MV_XOR_V2_DMA_IMSG_TIMER_THRD_SHIFT are both 0. Since shifting by 0 does nothing, these variables can be removed. Cc: clang-built-linux@googlegroups.com Link: https://github.com/ClangBuiltLinux/linux/issues/521 Signed-off-by: Nathan Huckleberry <nhuck@google.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/20190813173448.109859-1-nhuck@google.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: dw: Update Intel Elkhart Lake Service Engine acronymJarkko Nikula2019-08-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Elkhart Lake Offload Service Engine (OSE) will be called as Intel(R) Programmable Services Engine (Intel(R) PSE) in documentation. Update the comment here accordingly. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20190813080602.15376-1-jarkko.nikula@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: fsldma: Mark expected switch fall-throughGustavo A. R. Silva2019-08-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark switch cases where we are expecting to fall through. Fix the following warning (Building: powerpc-ppa8548_defconfig powerpc): drivers/dma/fsldma.c: In function ‘fsl_dma_chan_probe’: drivers/dma/fsldma.c:1165:26: warning: this statement may fall through [-Wimplicit-fallthrough=] chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; ~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/dma/fsldma.c:1166:2: note: here case FSL_DMA_IP_83XX: ^~~~ Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Li Yang <leoyang.li@nxp.com> Link: https://lore.kernel.org/r/20190812002159.GA26899@embeddedor Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: unexport filter functionsArnd Bergmann2019-08-132-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The two filter functions are now marked static, but still exported, which triggers a coming build-time check: WARNING: "omap_dma_filter_fn" [vmlinux] is a static EXPORT_SYMBOL_GPL WARNING: "edma_filter_fn" [vmlinux] is a static EXPORT_SYMBOL Remove the unneeded exports as well, as originally intended. Fixes: 9c71b9eb3cb2 ("dmaengine: omap-dma: make omap_dma_filter_fn private") Fixes: d2bfe7b5d182 ("dmaengine: edma: make edma_filter_fn private") Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20190812101155.997721-1-arnd@arndb.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: fsl-edma: implement .device_synchronize callbackAndrey Smirnov2019-08-081-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement .device_synchronize callback in order to be able to use dmaengine_terminate_sync() and other primitives relying on said callback. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Chris Healy <cphealy@gmail.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: linux-imx@nxp.com Cc: dmaengine@vger.kernel.org Cc: linux-kernel@vger.kernel.org Link: https://lore.kernel.org/r/20190731173659.14778-1-andrew.smirnov@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: pl330: use the same attributes when freeing pl330->mcode_cpuFuqian Huang2019-08-081-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In function dmac_alloc_resources(), pl330->mcode_cpu is allocated using dma_alloc_attrs() but freed with dma_free_coherent(). Use the correct dma_free_attrs() function to free pl330->mcode_cpu. Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com> Link: https://lore.kernel.org/r/20190726105947.25342-1-huangfq.daxian@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: qcom: hidma_mgmt: Add of_node_put() before gotoNishka Dasgupta2019-08-081-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each iteration of for_each_available_child_of_node puts the previous node, but in the case of a goto from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put under the label that the gotos point to. In order to avoid decrementing an already-decremented refcount, copy the original contents of the label (including the return statement) to just above the label, so that the code under the label is executed only when a goto exit from the loop occurs. Additionally, remove an unnecessary get/put pair from the loop, as the loop itself already keeps track of refcount. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Acked-by: Sinan Kaya <okaya@kernel.org> Link: https://lore.kernel.org/r/20190724081609.9724-1-nishkadg.linux@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: fsl-edma: add i.mx7ulp edma2 version supportRobin Gong2019-08-083-1/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add edma2 for i.mx7ulp by version v3, since v2 has already been used by mcf-edma. The big changes based on v1 are belows: 1. only one dmamux. 2. another clock dma_clk except dmamux clk. 3. 16 independent interrupts instead of only one interrupt for all channels. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Link: https://lore.kernel.org/r/1563952834-7731-1-git-send-email-yibin.gong@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: qcom_hidma: Remove call to memset after dmam_alloc_coherentFuqian Huang2019-08-081-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 518a2f1925c3 ("dma-mapping: zero memory returned from dma_alloc_*"), dma_alloc_coherent has already zeroed the memory. So memset is not needed. Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com> Acked-by: Sinan Kaya <okaya@kernel.org> Link: https://lore.kernel.org/r/20190715031723.6375-1-huangfq.daxian@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: imx-sdma: Remove call to memset after dma_alloc_coherentFuqian Huang2019-08-081-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 518a2f1925c3 ("dma-mapping: zero memory returned from dma_alloc_*"), dma_alloc_coherent has already zeroed the memory. So memset is not needed. Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com> Link: https://lore.kernel.org/r/20190715031716.6328-1-huangfq.daxian@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-07-3115-57/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Vinod Koul <vkoul@kernel.org> Cc: Dan Williams <dan.j.williams@intel.com> Cc: dmaengine@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-11-swboyd@chromium.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: imx-dma: Mark expected switch fall-throughGustavo A. R. Silva2019-07-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark switch cases where we are expecting to fall through. This patch fixes the following warning (Building: arm): drivers/dma/imx-dma.c: In function ‘imxdma_xfer_desc’: drivers/dma/imx-dma.c:542:6: warning: this statement may fall through [-Wimplicit-fallthrough=] if (slot == IMX_DMA_2D_SLOT_A) { ^ drivers/dma/imx-dma.c:559:2: note: here case IMXDMA_DESC_MEMCPY: ^~~~ Notice that, in this particular case, the code comment is modified in accordance with what GCC is expecting to find. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Link: https://lore.kernel.org/r/20190729225221.GA24269@embeddedor Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: tegra210-adma: Don't program FIFO thresholdJonathan Hunter2019-07-311-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra210 ADMA supports two modes for transferring data to a FIFO which are ... 1. Transfer data to/from the FIFO as soon as a single burst can be transferred. 2. Transfer data to/from the FIFO based upon FIFO thresholds, where the FIFO threshold is specified in terms on multiple bursts. Currently, the ADMA driver programs the FIFO threshold values in the FIFO_CTRL register, but never enables the transfer mode that uses these threshold values. Given that these have never been used so far, simplify the ADMA driver by removing the programming of these threshold values. Signed-off-by: Jonathan Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20190731101639.22755-1-jonathanh@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: stm32-mdma: Switch to use device_property_count_u32()Andy Shevchenko2019-07-291-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use use device_property_count_u32() directly, that makes code neater. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190723190757.67351-2-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: stm32-dmamux: Switch to use device_property_count_u32()Andy Shevchenko2019-07-291-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use use device_property_count_u32() directly, that makes code neater. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190723190757.67351-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | dmaengine: ti: edma: Support for polled (memcpy) completionPeter Ujfalusi2019-07-291-4/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a DMA client driver does not set the DMA_PREP_INTERRUPT because it does not want to use interrupts for DMA completion or because it can not rely on DMA interrupts due to executing the memcpy when interrupts are disabled it will poll the status of the transfer. Since we can not tell from any EDMA register that the transfer is completed, we can only know that the paRAM set has been sent to TPTC for processing we need to check the residue of the transfer, if it is 0 then the transfer is completed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20190716082655.1620-4-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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