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* Merge tag 'asm-generic-4.6' of ↵Linus Torvalds2016-03-241-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "There are only three patches this time, most other changes to files in include/asm-generic tend to go through the tree of whoever depends on the change. Two patches are cleanups for stuff that is no longer needed, the main change is to adapt the generic version of BUG_ON() for CONFIG_BUG=n to make it behave consistently with BUG(). This avoids undefined behavior along with a number of warnings about that undefined behavior in randconfig builds when we keep going on after hitting a BUG_ON()" * tag 'asm-generic-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: asm-generic: remove old nonatomic-io wrapper files asm-generic: default BUG_ON(x) to if(x)BUG() asm-generic: page.h: Remove useless get_user_page and free_user_page
| * asm-generic: remove old nonatomic-io wrapper filesArnd Bergmann2016-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The two header files got moved to include/linux, and most users were already converted, this changes the remaining drivers and removes the files. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Christoph Hellwig <hch@lst.de> Acked-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Simon Horman <simon.horman@netronome.com> Acked-by: Yisen Zhuang <yisen.zhuang@huawei.com>
* | Merge tag 'armsoc-soc' of ↵Linus Torvalds2016-03-201-11/+28
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "Newly added support for additional SoCs: - Axis Artpec-6 SoC family - Allwinner A83T SoC - Mediatek MT7623 - NXP i.MX6QP SoC - ST Microelectronics stm32f469 microcontroller New features: - SMP support for Mediatek mt2701 - Big-endian support for NXP i.MX - DaVinci now uses the new DMA engine dma_slave_map - OMAP now uses the new DMA engine dma_slave_map - earlyprintk support for palmchip uart on mach-tango - delay timer support for orion Other: - Exynos PMU driver moved out to drivers/soc/ - Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP, uniphier" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits) ARM: uniphier: rework SMP code to support new System Bus binding ARM: uniphier: add missing of_node_put() ARM: at91: avoid defining CONFIG_* symbols in source code ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1 ARM: imx: Make reset_control_ops const ARM: imx: Do L2 errata only if the L2 cache isn't enabled ARM: imx: select ARM_CPU_SUSPEND only for imx6 dmaengine: pxa_dma: fix the maximum requestor line ARM: alpine: select the Alpine MSI controller driver ARM: pxa: add the number of DMA requestor lines dmaengine: mmp-pdma: add number of requestors dma: mmp_pdma: Add the #dma-requests DT property documentation ARM: OMAP2+: Add rtc hwmod configuration for ti81xx ARM: s3c24xx: Avoid warning for inb/outb ARM: zynq: Move early printk virtual address to vmalloc area ARM: DRA7: hwmod: Add custom reset handler for PCIeSS ARM: SAMSUNG: Remove unused register offset definition ARM: EXYNOS: Cleanup header files inclusion drivers: soc: samsung: Enable COMPILE_TEST MAINTAINERS: Add maintainers entry for drivers/soc/samsung ...
| * | dmaengine: pxa_dma: fix the maximum requestor lineRobert Jarzmik2016-02-261-11/+28
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current number of requestor lines is limited to 31. This was an error of a previous commit, as this number is platform dependent, and is actually : - for pxa25x: 40 requestor lines - for pxa27x: 75 requestor lines - for pxa3xx: 100 requestor lines The previous testing did not reveal the faulty constant as on pxa[23]xx platforms, only camera, MSL and USB are above requestor 32, and in these only the camera has a driver using dma. Fixes: e87ffbdf0697 ("dmaengine: pxa_dma: fix the no-requestor case") Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Vinod Koul <vinod.koul@intel.com>
* | Merge tag 'dmaengine-4.6-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2016-03-1732-460/+1943
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: "This is smallish update with minor changes to core and new driver and usual updates. Nothing super exciting here.. - We have made slave address as physical to enable driver to do the mapping. - We now expose the maxburst for slave dma as new capability so clients can know this and program accordingly - addition of device synchronize callbacks on omap and edma. - pl330 updates to support DMAFLUSHP for Rockchip platforms. - Updates and improved sg handling in Xilinx VDMA driver. - New hidma qualcomm dma driver, though some bits are still in progress" * tag 'dmaengine-4.6-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (40 commits) dmaengine: IOATDMA: revise channel reset workaround on CB3.3 platforms dmaengine: add Qualcomm Technologies HIDMA channel driver dmaengine: add Qualcomm Technologies HIDMA management driver dmaengine: hidma: Add Device Tree binding dmaengine: qcom_bam_dma: move to qcom directory dmaengine: tegra: Move of_device_id table near to its user dmaengine: xilinx_vdma: Remove unnecessary variable initializations dmaengine: sirf: use __maybe_unused to hide pm functions dmaengine: rcar-dmac: clear pertinence number of channels dmaengine: sh: shdmac: don't open code of_device_get_match_data() dmaengine: tegra: don't open code of_device_get_match_data() dmaengine: qcom_bam_dma: Make driver work for BE dmaengine: sun4i: support module autoloading dma/mic_x100_dma: IS_ERR() vs PTR_ERR() typo dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's dmaengine: xilinx_vdma: Simplify spin lock handling dmaengine: xilinx_vdma: Fix issues with non-parking mode dmaengine: xilinx_vdma: Improve SG engine handling dmaengine: pl330: fix to support the burst mode dmaengine: make slave address physical ...
| * \ Merge branch 'topic/xilinx' into for-linusVinod Koul2016-03-141-95/+109
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| | * | dmaengine: xilinx_vdma: Remove unnecessary variable initializationsKedareswara rao Appana2016-03-041-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the unnecessary variable initializations in the driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop'sKedareswara rao Appana2016-03-031-24/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is sometimes necessary to poll a memory-mapped register until its value satisfies some condition use convenience macros that do this instead of do while loop's. This patch updates the same in the driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: xilinx_vdma: Simplify spin lock handlingKedareswara rao Appana2016-03-031-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch simplifies the spin lock handling in the driver by moving locking out of xilinx_dma_start_transfer() API and xilinx_dma_update_completed_cookie() API. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: xilinx_vdma: Fix issues with non-parking modeKedareswara rao Appana2016-03-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes issues with the Non-parking mode(Cirular mode). With the existing driver in cirular mode if we submit frames less than h/w configured we simply end-up having misconfigured vdma h/w. This patch fixes this issue by configuring the frame count register. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: xilinx_vdma: Improve SG engine handlingKedareswara rao Appana2016-03-031-55/+72
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current driver allows user to queue up multiple segments on to a single transaction descriptor. User will submit this single desc and in the issue_pending() we decode multiple segments and submit to SG HW engine. We free up the allocated_desc when it is submitted to the HW. Existing code prevents the user to prepare multiple trasactions at same time as we are overwrite with the allocated_desc. The best utilization of HW SG engine would happen if we collate the pending list when we start dma this patch updates the same. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/sh' into for-linusVinod Koul2016-03-143-5/+5
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| | * | dmaengine: rcar-dmac: clear pertinence number of channelsKuninori Morimoto2016-03-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DMACHCLR clears each channels, but its channel number is based on its SoC or IP. Current driver is using fixed 0x7fff (= for 15ch), it is not good match for Gen3 or Gen2 Audio DMAC. This patch fixes it Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: sh: shdmac: don't open code of_device_get_match_data()Wolfram Sang2016-03-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change will also make Coverity happy by avoiding a theoretical NULL pointer dereference; yet another reason is to use the above helper function to tighten the code and make it more readable. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: sh: Use ARCH_RENESASSimon Horman2016-02-081-3/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/qcom' into for-linusVinod Koul2016-03-1410-20/+1550
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| | * | dmaengine: add Qualcomm Technologies HIDMA channel driverSinan Kaya2016-03-113-0/+876
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for hidma engine. The driver consists of two logical blocks. The DMA engine interface and the low-level interface. The hardware only supports memcpy/memset and this driver only support memcpy interface. HW and driver doesn't support slave interface. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: add Qualcomm Technologies HIDMA management driverSinan Kaya2016-03-115-0/+649
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm Technologies HIDMA device has been designed to support virtualization technology. The driver has been divided into two to follow the hardware design. 1. HIDMA Management driver 2. HIDMA Channel driver Each HIDMA HW consists of multiple channels. These channels share some set of common parameters. These parameters are initialized by the management driver during power up. Same management driver is used for monitoring the execution of the channels. Management driver can change the performance behavior dynamically such as bandwidth allocation and prioritization. The management driver is executed in host context and is the main management entity for all channels provided by the device. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: qcom_bam_dma: move to qcom directorySinan Kaya2016-03-115-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Creating a QCOM directory for all QCOM DMA source files. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: qcom_bam_dma: Make driver work for BEAndy Gross2016-03-031-8/+11
| | |/ | | | | | | | | | | | | | | | | | | | | | This patch fixes the Qualcomm BAM dmaenging driver to work with big endian kernels. Signed-off-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/pl330' into for-linusVinod Koul2016-03-142-28/+74
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| | * | dmaengine: pl330: fix to support the burst modeCaesar Wang2016-03-011-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the burst mode that will break DMA uart on SoCFPGA. In some cases, some SoCS didn't support the multi-burst even if the devices who use the pl330 claim support the maxburst. Fixes: commit 848e977 "dmaengine: pl330: support burst mode for dev-to-mem and mem-to-dev transmit" Reported-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: pl330: add max burst for dmaengineShawn Lin2016-02-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add max burst capability for dmaengine and limit burst capability to one for PL330_QUIRK_BROKEN_NO_FLUSHP Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: core: expose max burst capability to clientsShawn Lin2016-02-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add max_burst to dma_get_slave_caps for clients to get the burst capability of slave dma controller. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: pl330: add quirk for broken no flushpAddy Ke2016-02-091-25/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add "arm,pl330-broken-no-flushp" quirk to avoid execute DMAFLUSHP if Soc doesn't support it. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> cc: Doug Anderson <dianders@chromium.org> cc: Heiko Stuebner <heiko@sntech.de> cc: Olof Johansson <olof@lixom.net> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: pl330: support burst mode for dev-to-mem and mem-to-dev transmitBoojin Kim2016-02-091-7/+13
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds to support burst mode for dev-to-mem and mem-to-dev transmit. Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> cc: Heiko Stuebner <heiko@sntech.de> cc: Doug Anderson <dianders@chromium.org> cc: Olof Johansson <olof@lixom.net> Reviewed-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/omap' into for-linusVinod Koul2016-03-141-0/+8
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| | * | dmaengine: omap-dma: Implement device_synchronize callbackPeter Ujfalusi2016-02-221-0/+8
| | |/ | | | | | | | | | | | | | | | | | | We need the callback to support the dmaengine_terminate_sync(). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/ioatdma' into for-linusVinod Koul2016-03-144-234/+108
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| | * | dmaengine: IOATDMA: revise channel reset workaround on CB3.3 platformsDave Jiang2016-03-112-36/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we unloaded the interrupts and reloaded in order to work around a channel reset bug that cleared the MSIX table. This approach just isn't practical when a reset needs to happen in the error handler that just happens to be running in interrupt context (bottom half). It looks like we can work around the hardware issue by just storing a shadow copy of the MSIX table and restore it after reset. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: IOATDMA: Allocate DMA descriptor ring in contig DMA memoryDave Jiang2016-02-154-34/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Future IOATDMA hardware will take advantage of descriptors residing in contiguous memory. Setting the descriptor ring in max config DMA memory of 2MB. Each channel will need 2 of these chunks. This should provide 64k of 64B descriptors. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: IOATDMA: Removing descriptor ring reshapeDave Jiang2016-02-153-157/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving to contingous memory backed descriptor rings. This makes is really difficult and complex to do reshape. Going to remove this as I don't think we need to do it anymore. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: IOATDMA: Convert pci_pool_* to dma_pool_*Dave Jiang2016-02-153-15/+15
| | |/ | | | | | | | | | | | | | | | | | | | | | Converting old pci_pool_* calls to "new" dma_pool_* to make everything uniform. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/idma' into for-linusVinod Koul2016-03-142-1/+4
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| | * | dmaengine: idma64: fix typo in WR_ISSUE_THD(x)Andy Shevchenko2016-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a typo in the definition of IDMA64C_CFGH_WR_ISSUE_THD(x). Fix it by swapping characters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: idma64: clear LLP_[SD]_EN bits in last descriptorAndy Shevchenko2016-02-151-0/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | The datasheet requires that the user must clear LLP_[SD]_EN bits whenever LLP.LOC is zero, i.e. in the last descriptor of a multi-block chain. Make the driver do this. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | Merge branch 'topic/edma' into for-linusVinod Koul2016-03-141-27/+36
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| | * | dmaengine: edma: Fetch echan->edesc while holding lock in edma_comletion_handlerPeter Ujfalusi2016-02-221-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to avoid possible race condition when client drivers are using dmaengine_terminate_sync() call to disable the channel. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Suggested-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| | * | dmaengine: edma: Implement device_synchronize callbackPeter Ujfalusi2016-02-221-0/+9
| | |/ | | | | | | | | | | | | | | | | | | We need the callback to support the dmaengine_terminate_sync(). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: tegra: Move of_device_id table near to its userLaxman Dewangan2016-03-041-19/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After using the function of_device_get_match_data(), the of_device_id table for tegra20 dma is not used by probe() and hence moving it near to place where platform driver is defined as this table used only on this data structure. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: sirf: use __maybe_unused to hide pm functionsArnd Bergmann2016-03-041-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sirf dma driver uses #ifdef to check for CONFIG_PM_SLEEP for its suspend/resume code but then has no #ifdef for the respective runtime PM code, so we get a warning if CONFIG_PM is disabled altogether: drivers/dma/sirf-dma.c:1000:12: error: 'sirfsoc_dma_runtime_resume' defined but not used [-Werror=unused-function] This removes the existing #ifdef and instead uses __maybe_unused annotations for all four functions to let the compiler know it can silently drop the function definition. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: tegra: don't open code of_device_get_match_data()Laxman Dewangan2016-03-031-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use of_device_get_match_data() for getting matched data instead of implementing this locally. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: sun4i: support module autoloadingEmilio López2016-03-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MODULE_DEVICE_TABLE() is missing, so the module isn't auto-loading on supported systems. This commit adds the missing line so it loads automatically when building it as a module and running on a system with the early sunxi DMA engine. Signed-off-by: Emilio López <emilio.lopez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dma/mic_x100_dma: IS_ERR() vs PTR_ERR() typoDan Carpenter2016-03-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This is harmless because the caller only cares about zero vs non-zero but we should be returning PTR_ERR() here. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: acpi-dma: align debug message with flowAndy Shevchenko2016-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In acpi_dma_request_slave_chan_by_name() the debug message is printed before the actual matching happens. Correct the message itself to be in align with the flow. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: enable mxs-dma for imx6ulLothar Waßmann2016-02-221-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The mxs-dma unit is also available on i.MX6UL. Make it possible to select it in Kconfig. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ioatdma: Squelch framesize warningsTim Gardner2016-01-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CC [M] drivers/dma/ioat/prep.o drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor': drivers/dma/ioat/prep.c:682:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] } ^ drivers/dma/ioat/prep.c: In function 'ioat_prep_pqxor_val': drivers/dma/ioat/prep.c:714:1: warning: the frame size of 1048 bytes is larger than 1024 bytes [-Wframe-larger-than=] } gcc version 5.3.1 20151219 (Ubuntu 5.3.1-4ubuntu1) Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Prarit Bhargava <prarit@redhat.com> Cc: Nicholas Mc Guire <der.herr@hofr.at> Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Tim Gardner <tim.gardner@canonical.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: ep93xx: Treat STALL and NFB IRQs same wayAlexander Sverdlin2016-01-251-13/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Debugging ALSA hangups it was found that EP9302 (latest E2 rev.) DMA controller sometimes asserts STALL interrupt instead of NFB interrupt. Simply ignoring the difference and simply acting upon the amount of data we still have to transfer seems to work fine. This somehow sounds similar to M2M issue which is already dealt with in the driver, when the controller asserts DONE interrupt too early. The issue is not documented in Cirrus Logic erratas for EP93XX, but original Cirrus DMA driver from 2003 (not based on DMA API) did the similar handling of STALL interrupt. In-tree driver (6d831c65) did it also, before conversion to DMA engine API. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| * | dmaengine: dw: fix a typo for bitfields of CTL_LOJie Yang2016-01-251-1/+1
| |/ | | | | | | | | | | | | | | | | The offset of SINC should be 9, not 7, here fix this typo. Signed-off-by: Jie Yang <yang.jie@intel.com> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
* | Merge branch 'mm-pat-for-linus' of ↵Linus Torvalds2016-03-143-13/+13
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull dma_*_writecombine rename from Ingo Molnar: "Rename dma_*_writecombine() to dma_*_wc() This is a tree-wide API rename, to move the dma_*() write-combining APIs closer in name to their usual API families. (The old API names are kept as compatibility wrappers to not introduce extra breakage.) The patch was Coccinelle generated" * 'mm-pat-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: dma, mm/pat: Rename dma_*_writecombine() to dma_*_wc()
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 21:52:43 +0000