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path: root/drivers/gpio/gpio-wcove.c
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* gpio: wcove: make irq_chip immutableAndy Shevchenko2022-06-061-2/+8
| | | | | | | | | | | | Since recently, the kernel is nagging about mutable irq_chips: "not an immutable chip, please consider fixing it!" Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new helper functions and call the appropriate gpiolib functions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
* gpio: wcove: Split error handling for CTRL and IRQ registersAndy Shevchenko2021-05-201-3/+7
| | | | | | | | | The wcove_gpio_dbg_show() uses one message to all possible error reads. Split it to two for CTRL and IRQ registers. While at it, switch to use dev_err() instead of pr_err(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Unify style of to_reg() with to_ireg()Andy Shevchenko2021-05-201-8/+3
| | | | | | | Use ternary and rename parameter to 'type' in to_reg() to be in the same style as to_ireg(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Use IRQ hardware number getter instead of direct accessAndy Shevchenko2021-05-201-9/+9
| | | | | | | | | | | IRQ framework provides special type and getter to transform Linux IRQ to the hardware pin. Use that type and getter function instead of direct access. No functional changes intended. While at it, remove unneeded check in wcove_update_irq_ctrl() since it is guaranteed that function will be called with valid parameter. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Split out to_ireg() helper and deduplicate the codeAndy Shevchenko2021-02-151-20/+24
| | | | | | | | | | There are a few places in the code where IRQ status and mask register values are being updated. Use a new exctracted helper to deduplicate the code. While at it, get rid of unnecessary divisions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Switch to use regmap_set_bits(), regmap_clear_bits()Andy Shevchenko2021-02-151-10/+7
| | | | | | | the regmap_set_bits(), regmap_clear_bits() API makes code better to understand. Switch the driver to use them, Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Get rid of error prone casting in IRQ handlerAndy Shevchenko2021-02-151-3/+3
| | | | | | | The casting from int to long on 64-bit platform is error prone. Replace it with proper type of the variable on stack. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: convert comma to semicolonZheng Yongjun2021-02-151-1/+1
| | | | | | | Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
* gpio: wcove: Request IRQ after all initialisation doneAndy Shevchenko2020-08-041-7/+7
| | | | | | | | | There is logically better to request IRQ when we initialise all structures. Align the driver with the rest on the same matter. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20200728125504.27786-3-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: wcove: Use irqchip templateLinus Walleij2020-07-221-14/+16
| | | | | | | | | | | | | | | This makes the driver use the irqchip template to assign properties to the gpio_irq_chip instead of using the explicit calls to gpiochip_irqchip_add_nested() and gpiochip_set_nested_irqchip(). The irqchip is instead added while adding the gpiochip. Cc: Bin Gao <bin.gao@linux.intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: Use new GPIO_LINE_DIRECTIONMatti Vaittinen2019-11-071-2/+5
| | | | | | | | | | | | | | | | | | | | | It's hard for occasional GPIO code reader/writer to know if values 0/1 equal to IN or OUT. Use defined GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT to help them out. NOTE - for gpio-amd-fch and gpio-bd9571mwv: This commit also changes the return value for direction get to equal 1 for direction INPUT. Prior this commit these drivers might have returned some other positive value but 1 for INPUT. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Acked-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: wcove: Convert to use SPDX identifierAndy Shevchenko2019-02-081-9/+1
| | | | | | | | Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Fix indentationAndy Shevchenko2019-02-081-7/+6
| | | | | | In some cases the indentation is inconsistent. Fix it accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Sort headers alphabeticallyAndy Shevchenko2019-02-081-2/+2
| | | | | | Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: wcove: Allow return negative error code from to_reg()Andy Shevchenko2019-02-081-1/+1
| | | | | | | | | The type of to_reg() is unsigned int while it might return a negative error code. Callers are also expecting a signed type. For sake of type consistency replace unsigned int with plain int. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* gpio: Move irqdomain into struct gpio_irq_chipThierry Reding2017-11-081-1/+1
| | | | | | | | | In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge (most of) tag 'mfd-next-4.13' of ↵Linus Torvalds2017-07-071-1/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Intel Cherry Trail Whiskey Cove PMIC - TI LP87565 PMIC New Device Support: - Add support for Cannonlake to intel-lpss-pci - Add support for Simatic IOT2000 to intel_quark_i2c_gpio New Functionality: - Add Regulator support (axp20x) Fix-ups: - Rework IRQ handling (intel_soc_pmic_bxtwc, rtsx_pcr, cros_ec) - Remove unused/unwelcome code (ipaq-micro, wm831x-core, da9062-core) - Provide deregistration on unbind (rn5t618) - Rework DT code/documentation (arizona) - Constify things (fsl-imx25-tsadc) - MAINTAINERS updates (DA9062/61) - Kconfig configuration adaptions (INTEL_SOC_PMIC, MFD_AXP20X_I2C) - Switch to DMI matching (intel_quark_i2c_gpio) - Provide an appropriate level of error checking (wm831x-{i2c,spi}, twl4030-irq, tc6393xb) - Make use of devm_* (resource handling) calls (intel_soc_pmic_bxtwc, stm32-timers, atmel-flexcom, cros_ec, fsl-imx25-tsadc, exynos-lpass, palmas, qcom-spmi-pmic, smsc-ece1099, motorola-cpcap)" [ Skipped the last commit in that series that added eight thousand lines of pointless repeated register definitions. - Linus ] * tag 'mfd-next-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (38 commits) mfd: Add LP87565 PMIC support mfd: cros_ec: Free IRQ on exit dt-bindings: vendor-prefixes: Add arctic to vendor prefix mfd: da9061: Fix to remove BBAT_CONT register from chip model mfd: da9061: Fix to remove BBAT_CONT register from chip model mfd: axp20x-i2c: Document that this must be builtin on x86 mfd: Add Cherry Trail Whiskey Cove PMIC driver mfd: tc6393xb: Handle return value of clk_prepare_enable mfd: intel_quark_i2c_gpio: Add support for SIMATIC IOT2000 platform mfd: intel_quark_i2c_gpio: Use dmi_system_id table for retrieving frequency mfd: motorola-cpcap: Use devm_of_platform_populate() mfd: smsc-ece: Use devm_of_platform_populate() mfd: qcom-spmi-pmic: Use devm_of_platform_populate() mfd: palmas: Use devm_of_platform_populate() mfd: exynos: Use devm_of_platform_populate() mfd: fsl-imx25: Use devm_of_platform_populate() mfd: cros_ec: Use devm_of_platform_populate() mfd: atmel: Use devm_of_platform_populate() mfd: stm32-timers: Use devm_of_platform_populate() mfd: intel_soc_pmic: Select designware i2c-bus driver ...
| * mfd: intel_soc_pmic_bxtwc: Remove second level IRQ for gpio deviceKuppuswamy Sathyanarayanan2017-06-191-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently all PMIC GPIO domain IRQs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an IRQ resource and let the GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain IRQs based on status value of GPIO level2 interrupt status register. Also, just using only the first level IRQ will eliminate the bug involved in requesting only the second level IRQ and not explicitly enable the first level IRQ. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 This patch also makes relevant change in Whiskey cove GPIO driver to use only first level PMIC GPIO IRQ. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | gpio: gpio-wcove: Fix GPIO control register offset calculationKuppuswamy Sathyanarayanan2017-06-291-24/+51
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Whiskey Cove PMIC GPIO controller specification, for GPIO pins 0-12, GPIO input and output register control address range from, 0x4e44-0x4e50 for GPIO outputs control register 0x4e51-0x4e5d for GPIO input control register But, currently when calculating the GPIO register offsets in to_reg() function, all GPIO pins in the same bank uses the same GPIO control register address. This logic is incorrect. This patch fixes this issue. This patch also adds support to selectively skip register modification for virtual GPIOs. In case of Whiskey Cove PMIC, ACPI code may use up 94 virtual GPIOs. These virtual GPIOs are used by the ACPI code as means to access various non GPIO bits of PMIC. So for these virtual GPIOs, we don't need to manipulate the physical GPIO pin register. A similar patch has been merged recently by Hans for Crystal Cove PMIC GPIO driver. You can find more details about it in Commit 9a752b4c9ab9 ("gpio: crystalcove: Do not write regular gpio registers for virtual GPIOs") Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reported-by: Jukka Laitinen <jukka.laitinen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: gpio-wcove: fix GPIO IRQ status maskKuppuswamy Sathyanarayanan2017-04-281-2/+4
| | | | | | | | | | | | According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to battery IO. So we should skip this bit when checking for GPIO IRQ pending status. Otherwise, wcove_gpio_irq_handler() might go into the infinite loop until IRQ "pending" status becomes 0. This patch fixes this issue. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: gpio-wcove: fix irq pending status bit widthKuppuswamy Sathyanarayanan2017-04-241-1/+1
| | | | | | | | | | | Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO pins. But when checking for the pending status, for_each_set_bit() uses bit width of 7 and hence it only checks the status for first 7 GPIO pins missing to check/clear the status of rest of the GPIO pins. This patch fixes this issue. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl / gpio: Introduce .set_config() callback for GPIO chipsMika Westerberg2017-01-261-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we already have two pin configuration related callbacks available for GPIO chips .set_single_ended() and .set_debounce(). In future we expect to have even more, which does not scale well if we need to add yet another callback to the GPIO chip structure for each possible configuration parameter. Better solution is to reuse what we already have available in the generic pinconf. To support this, we introduce a new .set_config() callback for GPIO chips. The callback takes a single packed pin configuration value as parameter. This can then be extended easily beyond what is currently supported by just adding new types to the generic pinconf enum. If the GPIO driver is backed up by a pinctrl driver the GPIO driver can just assign gpiochip_generic_config() (introduced in this patch) to .set_config and that will take care configuration requests are directed to the pinctrl driver. We then convert the existing drivers over .set_config() and finally remove the .set_single_ended() and .set_debounce() callbacks. Suggested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: set explicit nesting on driversLinus Walleij2016-11-251-0/+2
| | | | | | | | | | | | | The ADNP, CrystalCove and WhiskeyCove are all nested GPIO irqchips, but were avoiding to connect the parent IRQ to the gpiochip. This works, but is kind of sloppy as the child IRQs are not marked as having the parent IRQ as parent. Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Ajay Thomas <ajay.thomas.david.rajamanickam@intel.com> Cc: Bin Gao <bin.gao@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: simplify adding threaded interruptsLinus Walleij2016-11-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This tries to simplify the use of CONFIG_GPIOLIB_IRQCHIP when using threaded interrupts: add a new call gpiochip_irqchip_add_nested() to indicate that we're dealing with a nested rather than a chained irqchip, then create a separate gpiochip_set_nested_irqchip() to mirror the gpiochip_set_chained_irqchip() call to connect the parent and child interrupts. In the nested case gpiochip_set_nested_irqchip() does nothing more than call irq_set_parent() on each valid child interrupt, which has little semantic effect in the kernel, but this is probably still formally correct. Update all drivers using nested interrupts to use gpiochip_irqchip_add_nested() so we can now see clearly which these users are. The DLN2 driver can drop its specific hack with .irq_not_threaded as we now recognize whether a chip is threaded or not from its use of gpiochip_irqchip_add_nested() signature rather than from inspecting .can_sleep. We rename the .irq_parent to .irq_chained_parent since this parent IRQ is only really kept around for the chained interrupt handlers. Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Octavian Purdila <octavian.purdila@intel.com> Cc: Daniel Baluta <daniel.baluta@intel.com> Cc: Bin Gao <bin.gao@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Ajay Thomas <ajay.thomas.david.rajamanickam@intel.com> Cc: Semen Protsenko <semen.protsenko@globallogic.com> Cc: Alexander Stein <alexander.stein@systec-electronic.com> Cc: Phil Reid <preid@electromag.com.au> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: wcove: fix implicit assumption module.h is presentPaul Gortmaker2016-09-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig for this file is: drivers/gpio/Kconfig:config GPIO_WHISKEY_COVE drivers/gpio/Kconfig: tristate "GPIO support for Whiskey Cove PMIC" ...but however it does not include module.h -- it in turn gets it from another header (gpio/driver.h) and we'd like to replace that with a forward delcaration of "struct module;" but if we do, this file will fail to compile. So we fix this first to avoid putting build failures into the bisect commit history. Cc: Ajay Thomas <ajay.thomas.david.rajamanickam@intel.com> Cc: Bin Gao <bin.gao@intel.com> Cc: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: wcove-gpio: add get_direction methodBin Gao2016-08-191-0/+14
| | | | | | | | This patch adds .get_direction method for the gpio_chip structure of the wcove_gpio driver. Signed-off-by: Bin Gao <bin.gao@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: Add Intel WhiskeyCove PMIC GPIO driverBin Gao2016-08-111-0/+455
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC. This driver is based on gpio-crystalcove.c. Changes in v7: - Fixed various coding style comments from Andy Shevchenko Changes in v6: - Removed unnecessary wcove_gpio_remove() - Used devm_gpiochip_remove() instead of gpiochip_remove() - Various coding style changes per Mika's comment Changes in v5: - Revisited the interrupt handler code to iterate until all pending interrupts are handled. This change is to avoid missing interrupt when we're inside the interrupt handler. - Used regmap_bulk_read() to read address adjacent registers. Changes in v4: - Converted CTLI_INTCNT_XX macros to less verbose ones INT_DETECT_XX. - Add comments about why there is no .pm for the driver. - Header files re-ordered. - Various coding style change to address Andy's comments. Changes in v3: - Fixed the year in copyright line(2015-->2016). - Removed DRV_NAME macro. - Added kernel-doc for regmap_irq_chip of the wcove_gpio structure. - Line length fix. Changes in v2: - Typo fix (Whsikey --> Whiskey). - Included linux/gpio/driver.h instead of linux/gpio.h - Implemented .set_single_ended(). - Added GPIO register description. - Replaced container_of() with gpiochip_get_data(). - Removed unnecessary "if (gpio > WCOVE_VGPIO_NUM" check. - Removed the device id table and added MODULE_ALIAS(). Signed-off-by: Ajay Thomas <ajay.thomas.david.rajamanickam@intel.com> Signed-off-by: Bin Gao <bin.gao@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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