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* Merge (most of) tag 'mfd-next-4.13' of ↵Linus Torvalds2017-07-071-1/+13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers: - Intel Cherry Trail Whiskey Cove PMIC - TI LP87565 PMIC New Device Support: - Add support for Cannonlake to intel-lpss-pci - Add support for Simatic IOT2000 to intel_quark_i2c_gpio New Functionality: - Add Regulator support (axp20x) Fix-ups: - Rework IRQ handling (intel_soc_pmic_bxtwc, rtsx_pcr, cros_ec) - Remove unused/unwelcome code (ipaq-micro, wm831x-core, da9062-core) - Provide deregistration on unbind (rn5t618) - Rework DT code/documentation (arizona) - Constify things (fsl-imx25-tsadc) - MAINTAINERS updates (DA9062/61) - Kconfig configuration adaptions (INTEL_SOC_PMIC, MFD_AXP20X_I2C) - Switch to DMI matching (intel_quark_i2c_gpio) - Provide an appropriate level of error checking (wm831x-{i2c,spi}, twl4030-irq, tc6393xb) - Make use of devm_* (resource handling) calls (intel_soc_pmic_bxtwc, stm32-timers, atmel-flexcom, cros_ec, fsl-imx25-tsadc, exynos-lpass, palmas, qcom-spmi-pmic, smsc-ece1099, motorola-cpcap)" [ Skipped the last commit in that series that added eight thousand lines of pointless repeated register definitions. - Linus ] * tag 'mfd-next-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (38 commits) mfd: Add LP87565 PMIC support mfd: cros_ec: Free IRQ on exit dt-bindings: vendor-prefixes: Add arctic to vendor prefix mfd: da9061: Fix to remove BBAT_CONT register from chip model mfd: da9061: Fix to remove BBAT_CONT register from chip model mfd: axp20x-i2c: Document that this must be builtin on x86 mfd: Add Cherry Trail Whiskey Cove PMIC driver mfd: tc6393xb: Handle return value of clk_prepare_enable mfd: intel_quark_i2c_gpio: Add support for SIMATIC IOT2000 platform mfd: intel_quark_i2c_gpio: Use dmi_system_id table for retrieving frequency mfd: motorola-cpcap: Use devm_of_platform_populate() mfd: smsc-ece: Use devm_of_platform_populate() mfd: qcom-spmi-pmic: Use devm_of_platform_populate() mfd: palmas: Use devm_of_platform_populate() mfd: exynos: Use devm_of_platform_populate() mfd: fsl-imx25: Use devm_of_platform_populate() mfd: cros_ec: Use devm_of_platform_populate() mfd: atmel: Use devm_of_platform_populate() mfd: stm32-timers: Use devm_of_platform_populate() mfd: intel_soc_pmic: Select designware i2c-bus driver ...
| * mfd: intel_soc_pmic_bxtwc: Remove second level IRQ for gpio deviceKuppuswamy Sathyanarayanan2017-06-191-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently all PMIC GPIO domain IRQs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an IRQ resource and let the GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain IRQs based on status value of GPIO level2 interrupt status register. Also, just using only the first level IRQ will eliminate the bug involved in requesting only the second level IRQ and not explicitly enable the first level IRQ. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 This patch also makes relevant change in Whiskey cove GPIO driver to use only first level PMIC GPIO IRQ. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
* | Merge tag 'gpio-v4.13-1' of ↵Linus Torvalds2017-07-0724-425/+1188
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.13 series. Some administrativa: I have a slew of 8250 serial patches and the new IOT2040 serial+GPIO driver coming in through this tree, along with a whole bunch of Exar 8250 fixes. These are ACKed by Greg and also hit drivers/platform/* where they are ACKed by Andy Shevchenko. Speaking about drivers/platform/* there is also a bunch of ACPI stuff coming through that route, again ACKed by Andy. The MCP23S08 changes are coming in here as well. You already have the commits in your tree, so this is just a result of sharing an immutable branch between pin control and GPIO. Core: - Export add/remove for lookup tables so that modules can export GPIO descriptor tables. - Handle GPIO sleep states: it is now possible to flag that a GPIO line may loose its state during suspend/resume of the system to save power. This is used in the Wolfson Micro Arizona driver. - ACPI-based GPIO was tightened up a lot around the edges. - Use bitmap_fill() to speed up a loop. New drivers: - Exar XRA1403 SPI-based GPIO. - MVEBU driver now supports Armada 7K and 8K. - LP87565 PMIC GPIO. - Renesas R-CAR R8A7743 (RZ/G1M). - The new IOT2040 8250 serial/GPIO also comes in through this changeset. Substantial driver changes: - Seriously fix the Exar 8250 GPIO portions to work. - The MCP23S08 was moved out to a pin control driver. - Convert MEVEBU to use regmap for register access. - Drop Vulcan support from the Broadcom driver. - Serious cleanup and improvement of the mockup driver, giving us a better test coverage. Misc: - Lots of janitorial clean up. - A bunch of documentation fixes" * tag 'gpio-v4.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (70 commits) serial: exar: Add support for IOT2040 device gpio-exar/8250-exar: Make set of exported GPIOs configurable platform: Accept const properties serial: exar: Factor out platform hooks gpio-exar/8250-exar: Rearrange gpiochip parenthood gpio: exar: Fix iomap request gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cards serial: uapi: Add support for bus termination gpio: rcar: Add R8A7743 (RZ/G1M) support gpio: gpio-wcove: Fix GPIO control register offset calculation gpio: lp87565: Add support for GPIO gpio: dwapb: fix missing first irq for edgeboth irq type MAINTAINERS: Take maintainership for GPIO ACPI support gpio: exar: Fix reading of directions and values gpio: exar: Allocate resources on behalf of the platform device gpio-exar/8250-exar: Fix passing in of parent PCI device gpio: mockup: use devm_kcalloc() where applicable gpio: mockup: add myself as author gpio: mockup: improve the error message gpio: mockup: don't return magic numbers from probe() ...
| * | gpio-exar/8250-exar: Make set of exported GPIOs configurableJan Kiszka2017-07-031-23/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the SIMATIC, IOT2040 only a single pin is exportable as GPIO, the rest is required to operate the UART. To allow modeling this case, expand the platform device data structure to specify a (consecutive) pin subset for exporting by the gpio-exar driver. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
| * | gpio-exar/8250-exar: Rearrange gpiochip parenthoodJan Kiszka2017-07-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set the parent of the exar gpiochip to its platform device, like other gpiochips are doing it. In order to keep the relationship discoverable for ACPI systems, set the platform device companion to the PCI device. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: exar: Fix iomap requestJan Kiszka2017-07-031-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The UART driver already maps the resource for us. Trying to do this here only fails and leaves us with a non-working device. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio-exar/8250-exar: Do not even instantiate a GPIO device for Commtech cardsJan Kiszka2017-07-031-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commtech adapters need the MPIOs for internal purposes, and the gpio-exar driver already refused to pick them up. But there is actually no point in even creating the underlying platform device. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | gpio: rcar: Add R8A7743 (RZ/G1M) supportBiju Das2017-06-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Renesas RZ/G1M (R8A7743) SoC GPIO blocks are identical to the R-Car Gen2 family. Add support for its GPIO controllers. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: gpio-wcove: Fix GPIO control register offset calculationKuppuswamy Sathyanarayanan2017-06-291-24/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Whiskey Cove PMIC GPIO controller specification, for GPIO pins 0-12, GPIO input and output register control address range from, 0x4e44-0x4e50 for GPIO outputs control register 0x4e51-0x4e5d for GPIO input control register But, currently when calculating the GPIO register offsets in to_reg() function, all GPIO pins in the same bank uses the same GPIO control register address. This logic is incorrect. This patch fixes this issue. This patch also adds support to selectively skip register modification for virtual GPIOs. In case of Whiskey Cove PMIC, ACPI code may use up 94 virtual GPIOs. These virtual GPIOs are used by the ACPI code as means to access various non GPIO bits of PMIC. So for these virtual GPIOs, we don't need to manipulate the physical GPIO pin register. A similar patch has been merged recently by Hans for Crystal Cove PMIC GPIO driver. You can find more details about it in Commit 9a752b4c9ab9 ("gpio: crystalcove: Do not write regular gpio registers for virtual GPIOs") Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reported-by: Jukka Laitinen <jukka.laitinen@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: lp87565: Add support for GPIOKeerthy2017-06-213-0/+201
| | | | | | | | | | | | | | | | | | | | | | | | Add driver for lp87565 PMIC family GPIOs. Three GPIOs are supported and can be configured in Open-drain output or Push-pull output. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: dwapb: fix missing first irq for edgeboth irq typeXiaoguang Chen2017-06-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dwapb_irq_set_type overwrites polarity register value for IRQ_TYPE_EDGE_BOTH case. If the polarity of one gpio is 0 by default, then it will set falling edge irq trigger. and the gpio may requires rising edge irq for the first time, and it will be missed. Do not overwrite polarity register for IRQ_TYPE_EDGE_BOTH case can solve this issue. Signed-off-by: Xiaoguang Chen <xgchenshy@gmail.com> Tested-by: Jisheng Zhang <jszhang@marvell.com> [Fix some really weird text encoding problem] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: exar: Fix reading of directions and valuesJan Kiszka2017-06-201-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First, the logic for translating a register bit to the return code of exar_get_direction and exar_get_value were wrong. And second, there was a flip regarding the register bank in exar_get_direction. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: exar: Allocate resources on behalf of the platform deviceJan Kiszka2017-06-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not allocate resources on behalf of the parent device but on our own. Otherwise, cleanup does not properly work if gpio-exar is removed but not the parent device. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio-exar/8250-exar: Fix passing in of parent PCI deviceJan Kiszka2017-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes reloading of the GPIO driver for the same platform device instance as created by the exar UART driver: First of all, the driver sets drvdata to its own value during probing and does not restore the original value on exit. But this won't help anyway as the core clears drvdata after the driver left. Set the platform device parent instead. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: use devm_kcalloc() where applicableBartosz Golaszewski2017-06-201-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | When allocating a zeroed array of objects use devm_kcalloc() instead of manually calculating the required size and using devm_kzalloc(). Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: add myself as authorBartosz Golaszewski2017-06-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Just taking credit for the recent changes and new features. :) Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: improve the error messageBartosz Golaszewski2017-06-201-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Indicate the error number and make the message a bit more elaborate. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: don't return magic numbers from probe()Bartosz Golaszewski2017-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | When the requested number of GPIO lines is 0, return -EINVAL, not -1 which is -EPERM. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: improve readabilityBartosz Golaszewski2017-06-201-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently shift bits here and there without actually explaining what we're doing. Add some helper variables with names indicating their purpose to improve the code readability. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: refuse to accept an odd number of GPIO rangesBartosz Golaszewski2017-06-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we ignore the last odd range value, since each chip is described by two values. Be more strict and require the user to pass an even number of ranges. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: tweak gpio_mockup_event_write()Bartosz Golaszewski2017-06-201-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Invert the logic of the irq_enabled check and only access the private data after the input is sanitized. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: improve the debugfs input sanitizationBartosz Golaszewski2017-06-201-12/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We're currently only checking the first character of the input to the debugfs event files, so a string like '0sdfdsf' is valid and indicates a falling edge event. Be more strict and only allow '0', '1', '0\n' & '1\n'. While we're at it: move the sanitization code before the irq_enabled check so that we indicate an error on invalid input even if nobody is waiting for events. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mvebu: Add support for the Armada 7K/8K SoCsGregory CLEMENT2017-06-161-71/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada 7K and 8K SoCs use the same gpio controller as most of the other mvebu SoCs. However, the main difference is that the GPIO controller is part of a bigger system controller, and a syscon is used to control the overall system controller. Therefore, the driver needs to be adjusted to retrieve the regmap of the syscon to access registers, and account for the fact that registers are located at a certain offset within the regmap. This commit add the support of the syscon and introduce a new variant for this case. It was based on the preliminary work of Thomas Petazzoni. Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mvebu: fix regmap_update_bits usageGregory CLEMENT2017-06-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some place in the driver regmap_update_bits was misused. Indeed the last argument is not the value of the bit (or group of bits) itself but the mask value inside the register. So when setting the bit N, then the value must be BIT(N) and not 1. CC: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Tested-by: Chris Packham <Chris.Packham@alliedtelesis.co.nz> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: zynq: Clarify quirk and provide helper functionSoren Brinkmann2017-06-161-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The one quirk used in the zynq GPIO driver was called FOO which is not very descriptive. Rename the quirk to IS_ZYNQ as it indicates whether the HW is a zynq or zynqmp device to allow handling of device-specific differences of the HW. Also provide a helper function to test whether the HW is zynq or zynqmp. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: merrifield: Remove unused headerAndy Shevchenko2017-06-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | I don't remember how linux/gpio.h made the source, now it seems unused. Remove it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: of: Spelling: s/retures/returns/Geert Uytterhoeven2017-06-161-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: xra1403: select REGMAP_SPIArnd Bergmann2017-05-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without the regmap code, we get a link error: drivers/gpio/built-in.o: In function `xra1403_probe': (.text+0x132e0): undefined reference to `__devm_regmap_init_spi' Fixes: 5704520d7880 ("gpio: xra1403: Add EXAR XRA1403 SPI GPIO expander driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: remove unused variableArnd Bergmann2017-05-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was left behind by a cleanup patch: drivers/gpio/gpiolib.c: In function 'gpiochip_irqchip_init_valid_mask': drivers/gpio/gpiolib.c:1474:6: error: unused variable 'i' [-Werror=unused-variable] Fixes: 923a654c186c ("gpiolib: Re-use bitmap_fill() instead of open coded loop") Reported-by: kbuild test robot <fengguang.wu@intel.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Reported-by: Colin King <colin.king@canonical.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: adp5588: move header file out of I2C realmWolfram Sang2017-05-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | include/linux/i2c is not for client devices. Move the header file to a more appropriate location. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: ml-ioh: check the return value of irq_alloc_generic_chip()Bartosz Golaszewski2017-05-291-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | This function can fail, so check the return value before dereferencing the returned pointer. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: sta2x11: check the return value of irq_alloc_generic_chip()Bartosz Golaszewski2017-05-291-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | This function can fail, so check the return value before dereferencing the returned pointer. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: pch: check the return value of irq_alloc_generic_chip()Bartosz Golaszewski2017-05-291-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | This function can fail, so check the return value before dereferencing the returned pointer. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: support irqmask and irqunmaskBartosz Golaszewski2017-05-291-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | Even though this is a testing module, be nice and actually implement these functions. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: be quiet unless something goes wrongBartosz Golaszewski2017-05-291-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When inserting and removing the module repeatedly (e.g. when running the libgpiod test-suite) the kernel log gets clobbered with messages reporting successful creation of dummy gpiochips. Remove this message and only emit logs when something bad happens. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: add prefixes to the direction enumBartosz Golaszewski2017-05-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All internal symbols except for the direction enum follow the same convention and use the gpio_mockup prefix. Add the prefix to the DIR_IN and DIR_OUT definitions as well for consistency across the file. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mockup: fix direction valuesBartosz Golaszewski2017-05-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment in linux/gpio/driver.h says: @get_direction: returns direction for signal "offset", 0=out, 1=in We got those switched at some point. Fix the values. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: Re-use bitmap_fill() instead of open coded loopAndy Shevchenko2017-05-291-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | Re-use bitmap_fill() instead of open coded loop for setting an area of bits in a bitmap. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Split out acpi_gpio_get_irq_resource() helperAndy Shevchenko2017-05-291-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The helper does retrieve pointer to struct acpi_resource_gpio from struct acpi_resource if it represents GpioInt() resource. It will be used by PNP code later on. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Override GPIO initialization flagsAndy Shevchenko2017-05-293-6/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows ACPI GPIO code to modify flags based on ACPI GpioIo() / GpioInt() resources. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Factor out acpi_gpio_to_gpiod_flags() helperAndy Shevchenko2017-05-291-25/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The helper function acpi_gpio_to_gpiod_flags() will be used later to configure pin properly whenever it's requested. While here, introduce a checking error code returned by gpiod_configure_flags() and bail out if it's not okay. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Synchronize acpi_find_gpio() and acpi_gpio_count()Andy Shevchenko2017-05-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we pass connection ID to the both functions and at the same time acpi_can_fallback_to_crs() returns false we will get different results, i.e. the number of GPIO resources returned by acpi_gpio_count() might be not correct. Fix this by calling acpi_can_fallback_to_crs() in acpi_gpio_count() before trying to fallback. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Even more tighten up ACPI GPIO lookupsAndy Shevchenko2017-05-291-35/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 10cf4899f8af ("gpiolib: tighten up ACPI legacy gpio lookups") prevents to getting same resource twice if the driver asks twice using different connection ID. But the whole idea of fallback might bring some problems. Imagine the case when we have two versions of BIOS/hardware where in one _DSD is introduced along with GPIO resources, but the other one uses just plain GPIO resource for another purpose Case 1: Device (DEVX) { ... Name (_CRS, ResourceTemplate () { GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionInputOnly, "\\_SB.GPO0", 0, ResourceConsumer) {15} }) Name (_DSD, Package () { ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), Package () { Package () {"some-gpios", Package() {^DEVX, 0, 0, 0 }}, } }) } Case 2: Device (DEVX) { ... Name (_CRS, ResourceTemplate () { GpioIo (Exclusive, PullUp, 0, 0, IoRestrictionInputOnly, "\\_SB.GPO0", 0, ResourceConsumer) {27} }) } To prevent the possible misconfiguration tighten up even more GPIO ACPI lookups for case without connection ID provided. In the past the issue had been triggered by "use mctrl_gpio helpers" series [1,2]. [1] commit 4ef03d328769 ("tty/serial/8250: use mctrl_gpio helpers") [2] https://patchwork.kernel.org/patch/9283745/ Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Bastien Nocera <hadess@hadess.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Do sanity check for GpioInt in acpi_find_gpio()Andy Shevchenko2017-05-291-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check that we don't ask for output direction on GpioInt resource in cases with or without _DSD defined. Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: acpi: Align acpi_find_gpio() with DT versionAndy Shevchenko2017-05-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By some reason acpi_find_gpio() and acpi_gpio_count() have compared connection ID to "gpios" when tries to check if suffix is needed or not. Don't do any assumptions about what connection ID can be and, when defined, use it only with suffix as it's done in the device tree version. Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpiolib: Export gpiod_configure_flags() to internal usersAndy Shevchenko2017-05-292-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is preparatory patch for enabling GPIO ACPI to configure a pin accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: arizona: Add support for GPIOs that need to be maintainedCharles Keepax2017-05-291-2/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Arizona devices only maintain the state of output GPIOs whilst the CODEC is active, this can cause issues if the CODEC suspends whilst something is relying on the state of one of its GPIOs. However, in many systems the CODEC GPIOs are used for audio related features and thus the state of the GPIOs is unimportant whilst the CODEC is suspended. Often keeping the CODEC resumed in such a system would incur a power impact that is unacceptable. Allow the user to select whether a GPIO output should keep the CODEC resumed, by adding a flag through the second cell of the GPIO specifier in device tree. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: Add new flags to control sleep status of GPIOsCharles Keepax2017-05-293-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add new flags to allow users to specify that they are not concerned with the status of GPIOs whilst in a sleep/low power state. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: davinci: Handle return value of clk_prepare_enableArvind Yadav2017-05-291-2/+9
| | | | | | | | | | | | | | | | | | | | | clk_prepare_enable() can fail here and we must check its return value. Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | gpio: mvebu: Select REGMAP_MMIO now that regmap is usedGregory CLEMENT2017-05-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the commit "gpio: mvebu: switch to regmap for register access" the driver use the regmap. Explicitly select the REGMAP_MMIO symbol to fix build error. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 13:20:01 +0000