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* Merge tag 'hwparam-20170420' of ↵Linus Torvalds2017-05-105-9/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs Pull hw lockdown support from David Howells: "Annotation of module parameters that configure hardware resources including ioports, iomem addresses, irq lines and dma channels. This allows a future patch to prohibit the use of such module parameters to prevent that hardware from being abused to gain access to the running kernel image as part of locking the kernel down under UEFI secure boot conditions. Annotations are made by changing: module_param(n, t, p) module_param_named(n, v, t, p) module_param_array(n, t, m, p) to: module_param_hw(n, t, hwtype, p) module_param_hw_named(n, v, t, hwtype, p) module_param_hw_array(n, t, hwtype, m, p) where the module parameter refers to a hardware setting hwtype specifies the type of the resource being configured. This can be one of: ioport Module parameter configures an I/O port iomem Module parameter configures an I/O mem address ioport_or_iomem Module parameter could be either (runtime set) irq Module parameter configures an I/O port dma Module parameter configures a DMA channel dma_addr Module parameter configures a DMA buffer address other Module parameter configures some other value Note that the hwtype is compile checked, but not currently stored (the lockdown code probably won't require it). It is, however, there for future use. A bonus is that the hwtype can also be used for grepping. The intention is for the kernel to ignore or reject attempts to set annotated module parameters if lockdown is enabled. This applies to options passed on the boot command line, passed to insmod/modprobe or direct twiddling in /sys/module/ parameter files. The module initialisation then needs to handle the parameter not being set, by (1) giving an error, (2) probing for a value or (3) using a reasonable default. What I can't do is just reject a module out of hand because it may take a hardware setting in the module parameters. Some important modules, some ipmi stuff for instance, both probe for hardware and allow hardware to be manually specified; if the driver is aborts with any error, you don't get any ipmi hardware. Further, trying to do this entirely in the module initialisation code doesn't protect against sysfs twiddling. [!] Note that in and of itself, this series of patches should have no effect on the the size of the kernel or code execution - that is left to a patch in the next series to effect. It does mark annotated kernel parameters with a KERNEL_PARAM_FL_HWPARAM flag in an already existing field" * tag 'hwparam-20170420' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs: (38 commits) Annotate hardware config module parameters in sound/pci/ Annotate hardware config module parameters in sound/oss/ Annotate hardware config module parameters in sound/isa/ Annotate hardware config module parameters in sound/drivers/ Annotate hardware config module parameters in fs/pstore/ Annotate hardware config module parameters in drivers/watchdog/ Annotate hardware config module parameters in drivers/video/ Annotate hardware config module parameters in drivers/tty/ Annotate hardware config module parameters in drivers/staging/vme/ Annotate hardware config module parameters in drivers/staging/speakup/ Annotate hardware config module parameters in drivers/staging/media/ Annotate hardware config module parameters in drivers/scsi/ Annotate hardware config module parameters in drivers/pcmcia/ Annotate hardware config module parameters in drivers/pci/hotplug/ Annotate hardware config module parameters in drivers/parport/ Annotate hardware config module parameters in drivers/net/wireless/ Annotate hardware config module parameters in drivers/net/wan/ Annotate hardware config module parameters in drivers/net/irda/ Annotate hardware config module parameters in drivers/net/hamradio/ Annotate hardware config module parameters in drivers/net/ethernet/ ...
| * Annotate hardware config module parameters in drivers/gpio/David Howells2017-04-205-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the kernel is running in secure boot mode, we lock down the kernel to prevent userspace from modifying the running kernel image. Whilst this includes prohibiting access to things like /dev/mem, it must also prevent access by means of configuring driver modules in such a way as to cause a device to access or modify the kernel image. To this end, annotate module_param* statements that refer to hardware configuration and indicate for future reference what type of parameter they specify. The parameter parser in the core sees this information and can skip such parameters with an error message if the kernel is locked down. The module initialisation then runs as normal, but just sees whatever the default values for those parameters is. Note that we do still need to do the module initialisation because some drivers have viable defaults set in case parameters aren't specified and some drivers support automatic configuration (e.g. PNP or PCI) in addition to manually coded parameters. This patch annotates drivers in drivers/gpio/. Suggested-by: Alan Cox <gnomes@lxorguk.ukuu.org.uk> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> cc: Alexandre Courbot <gnurou@gmail.com> cc: linux-gpio@vger.kernel.org
* | Merge tag 'char-misc-4.12-rc1' of ↵Linus Torvalds2017-05-041-15/+8
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big set of new char/misc driver drivers and features for 4.12-rc1. There's lots of new drivers added this time around, new firmware drivers from Google, more auxdisplay drivers, extcon drivers, fpga drivers, and a bunch of other driver updates. Nothing major, except if you happen to have the hardware for these drivers, and then you will be happy :) All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (136 commits) firmware: google memconsole: Fix return value check in platform_memconsole_init() firmware: Google VPD: Fix return value check in vpd_platform_init() goldfish_pipe: fix build warning about using too much stack. goldfish_pipe: An implementation of more parallel pipe fpga fr br: update supported version numbers fpga: region: release FPGA region reference in error path fpga altera-hps2fpga: disable/unprepare clock on error in alt_fpga_bridge_probe() mei: drop the TODO from samples firmware: Google VPD sysfs driver firmware: Google VPD: import lib_vpd source files misc: lkdtm: Add volatile to intentional NULL pointer reference eeprom: idt_89hpesx: Add OF device ID table misc: ds1682: Add OF device ID table misc: tsl2550: Add OF device ID table w1: Remove unneeded use of assert() and remove w1_log.h w1: Use kernel common min() implementation uio_mf624: Align memory regions to page size and set correct offsets uio_mf624: Refactor memory info initialization uio: Allow handling of non page-aligned memory regions hangcheck-timer: Fix typo in comment ...
| * | Merge 4.11-rc4 into char-misc-nextGreg Kroah-Hartman2017-03-275-35/+78
| |\| | | | | | | | | | | | | | | | We want the char-misc fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | gpiolib: utilize new cdev_device_add helper functionLogan Gunthorpe2017-03-211-15/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the open coded registration of the cdev and dev with the new device_add_cdev() helper. The helper replaces a common pattern by taking the proper reference against the parent device and adding both the cdev and the device. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | | Merge tag 'gpio-v4.12-1' of ↵Linus Torvalds2017-05-0445-605/+1648
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "This is the bulk of GPIO changes for the v4.12 kernel cycle. Core changes: - Return NULL from gpiod_get_optional() when GPIOLIB is disabled. This was a much discussed change. It affects use cases where people write drivers that might or might not be using GPIO resources. I have decided that this is the lesser evil right now. - Make gpiod_count() behave consistently across different hardware descriptions. - Fix the syntax around open drain/open source to not infer active high/low semantics. New drivers: - A new single-register fixed-direction framework driver for hardware that have lines controlled by a single register that just work in one direction (out or in), including IRQ support. - Support the Fintek F71889A GPIO SuperIO controller. - Support the National NI 169445 MMIO GPIO. - Support for the X-Gene derivative of the DWC GPIO controller - Support for the Rohm BD9571MWV-M PMIC GPIO controller. - Refactor the Gemini GPIO driver to a generic Faraday FTGPIO driver and replace both the Gemini and the Moxa ART custom drivers with this driver. Driver improvements: - A whole slew of drivers have their spinlocks chaned to raw spinlocks as they provide irqchips, and thus we are progressing on realtime compliance. - Use devm_irq_alloc_descs() in a slew of drivers, getting managed resources. - Support for the embedded PWM controller inside the MVEBU driver. - Debounce, open source and open drain support for the Aspeed driver. - Misc smaller fixes like spelling and syntax and whatnot" * tag 'gpio-v4.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (77 commits) gpio: f7188x: Add a missing break gpio: omap: return error if requested debounce time is not possible gpio: Add ROHM BD9571MWV-M PMIC GPIO driver gpio: gpio-wcove: fix GPIO IRQ status mask gpio: DT bindings, move tca9554 from pcf857x to pca953x gpio: move tca9554 from pcf857x to pca953x gpio: arizona: Correct check whether the pin is an input gpio: Add XRA1403 DTS binding documentation dt-bindings: add exar to vendor prefixes list gpio: gpio-wcove: fix irq pending status bit width gpio: dwapb: use dwapb_read instead of readl_relaxed gpio: aspeed: Add open-source and open-drain support gpio: aspeed: Add debounce support gpio: aspeed: dt: Add optional clocks property gpio: aspeed: dt: Fix description alignment in bindings document gpio: mvebu: Add limited PWM support gpio: Use unsigned int for interrupt numbers gpio: f7188x: Add F71889A GPIO support. gpio: core: Decouple open drain/source flag with active low/high gpio: arizona: Correct handling for reading input GPIOs ...
| * | | gpio: f7188x: Add a missing breakDan Carpenter2017-04-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A break statement was obviously intended here. Fixes: d69843e416d3 ("gpio: f7188x: Add F71889A GPIO support.") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: omap: return error if requested debounce time is not possibleDavid Rivshin2017-04-281-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omap_gpio_debounce() does not validate that the requested debounce is within a range it can handle. Instead it lets the register value wrap silently, and always returns success. This can lead to all sorts of unexpected behavior, such as gpio_keys asking for a too-long debounce, but getting a very short debounce in practice. Fix this by returning -EINVAL if the requested value does not fit into the register field. If there is no debounce clock available at all, return -ENOTSUPP. Fixes: e85ec6c3047b ("gpio: omap: fix omap2_set_gpio_debounce") Cc: <stable@vger.kernel.org> # 4.3+ Signed-off-by: David Rivshin <drivshin@allworx.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: Add ROHM BD9571MWV-M PMIC GPIO driverMarek Vasut2017-04-283-0/+156
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for the GPIO block in the ROHM BD9571MWV-W MFD PMIC. This block is pretty trivial and supports setting GPIO direction as Input/Output and in case of Output, supports setting value. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: gpio-wcove: fix GPIO IRQ status maskKuppuswamy Sathyanarayanan2017-04-281-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Whiskey Cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to battery IO. So we should skip this bit when checking for GPIO IRQ pending status. Otherwise, wcove_gpio_irq_handler() might go into the infinite loop until IRQ "pending" status becomes 0. This patch fixes this issue. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: move tca9554 from pcf857x to pca953xAnders Darander2017-04-243-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The TCA9554 doesn't work with the pcf857x driver, trying to change the direction gives a NAK bailout error. TCA9554 is similar to the PCA9554, thus change the driver. Signed-off-by: Anders Darander <anders@chargestorm.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: arizona: Correct check whether the pin is an inputCharles Keepax2017-04-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The logic to check if the pin is an input or output whilst testing if we need to read the register value from the hardware or not is currently inverted. Remove the erroneous not from the if statement. Fixes: 11598d174050 ("gpio: arizona: Correct handling for reading input GPIOs") Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: gpio-wcove: fix irq pending status bit widthKuppuswamy Sathyanarayanan2017-04-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO pins. But when checking for the pending status, for_each_set_bit() uses bit width of 7 and hence it only checks the status for first 7 GPIO pins missing to check/clear the status of rest of the GPIO pins. This patch fixes this issue. Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: dwapb: use dwapb_read instead of readl_relaxedJisheng Zhang2017-04-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 67809b974a07 ("GPIO: gpio-dwapb: Change readl&writel to dwapb_read&dwapb_write") missed this readl_relaxed() usage, I'm not sure the reason, maybe for performance reason? But if we do care the performance, we could use the relaxed io in dwapb_read and dwapb_write. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: aspeed: Add open-source and open-drain supportAndrew Jeffery2017-04-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per the datasheet, manage the IO and value states to implement open-source/open-drain, but do this by falling back to gpiolib's emulation. This commit simply makes the behaviour explicit for clarity, rather than relying on the implicit return of -ENOTSUPP to trigger the emulation. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: aspeed: Add debounce supportAndrew Jeffery2017-04-241-5/+276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each GPIO in the Aspeed GPIO controller can choose one of four input debounce states: to disable debouncing for an input, or select from one of three programmable debounce timer values. Each GPIO in a four-bank-set is assigned one bit in each of two debounce configuration registers dedicated to the set, and selects a debounce state by configuring the two bits to select one of the four options. The limitation on debounce timer values is managed by mapping offsets onto a configured timer value and keeping count of the number of users a timer has. Timer values are configured on a first-come-first-served basis. A small twist in the hardware design is that the debounce configuration register numbering is reversed with respect to the binary representation of the debounce timer of interest (i.e. debounce register 1 represents bit 1, and debounce register 2 represents bit 0 of the timer numbering). Tested on an AST2500EVB with additional inspection under QEMU's romulus-bmc machine. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: Add limited PWM supportAndrew Lunn2017-04-241-12/+315
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada 370/XP devices can 'blink' GPIO lines with a configurable on and off period. This can be modelled as a PWM. However, there are only two sets of PWM configuration registers for all the GPIO lines. This driver simply allows a single GPIO line per GPIO chip of 32 lines to be used as a PWM. Attempts to use more return EBUSY. Due to the interleaving of registers it is not simple to separate the PWM driver from the GPIO driver. Thus the GPIO driver has been extended with a PWM driver. Signed-off-by: Andrew Lunn <andrew@lunn.ch> URL: https://patchwork.ozlabs.org/patch/427287/ URL: https://patchwork.ozlabs.org/patch/427295/ [Ralph Sennhauser: * Port forward * Merge PWM portion into gpio-mvebu.c * Switch to atomic PWM API * Add new compatible string marvell,armada-370-xp-gpio * Update and merge documentation patch * Update MAINTAINERS] Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: Use unsigned int for interrupt numbersThierry Reding2017-04-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt numbers are never negative, zero serves as the special invalid value. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: f7188x: Add F71889A GPIO support.Marty Plummer2017-04-071-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add F71889A GPIO support. Fintek F71889A is a SuperIO. It contains HWMON/GPIO/Serial Ports. Datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459076/FINTEK/F71889A.html Its virtually identical to the F71889F superio as far as gpios go. One oddity is GPIO2 at index 0xD0; the datasheet only lists gpio's 7-5, but it logically seems that it should continue down to 0. I'm not sure if the driver can handle gpios that are shifted away from index 0 as it currently stands. Signed-off-by: Marty Plummer <netz.kernel@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: core: Decouple open drain/source flag with active low/highLaxman Dewangan2017-04-072-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the GPIO interface is said to Open Drain if it is Single Ended and active LOW. Similarly, it is said as Open Source if it is Single Ended and active HIGH. The active HIGH/LOW is used in the interface for setting the pin state to HIGH or LOW when enabling/disabling the interface. In Open Drain interface, pin is set to HIGH by putting pin in high impedance and LOW by driving to the LOW. In Open Source interface, pin is set to HIGH by driving pin to HIGH and set to LOW by putting pin in high impedance. With above, the Open Drain/Source is unrelated to the active LOW/HIGH in interface. There is interface where the enable/disable of interface is ether active LOW or HIGH but it is Open Drain type. Hence decouple the Open Drain with Single Ended + Active LOW and Open Source with Single Ended + Active HIGH. Adding different flag for the Open Drain/Open Source which is valid only when Single ended flag is enabled. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: arizona: Correct handling for reading input GPIOsCharles Keepax2017-04-071-2/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO register is cached since all the configuration resides within it, however, this means for input GPIOs the driver will not return the actual state but the last value written to the register cache. To correct this in the case of reading an input GPIO resume the CODEC and drop the cache for the input register to ensure an actual hardware read takes place. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: 104-idi-48: make use of raw_spinlock variantsJulia Cartwright2017-03-281-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 104-idi-48 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: pci-idio-16: make use of raw_spinlock variantsJulia Cartwright2017-03-281-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci-idio-16 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: 104-idio-16: make use of raw_spinlock variantsJulia Cartwright2017-03-281-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 104-idio-16 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: gpio-reg: add irq mapping for gpio-reg usersRussell King2017-03-241-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for mapping gpio-reg gpios to interrupts. This may be a non-linear mapping - some gpios in the register may not even have corresponding interrupts associated with them, so we need to pass an array. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: add generic single-register fixed-direction GPIO driverRussell King2017-03-243-0/+171
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple, generic, single register fixed-direction GPIO driver. This is able to support a single register with a mixture of inputs and outputs. This is different from gpio-mmio and gpio-74xx-mmio: * gpio-mmio doesn't allow a fixed direction, it assumes there is always a direction register. * gpio-74xx-mmio only supports all-in or all-out setups * gpio-74xx-mmio is DT only, this needs to support legacy too * they don't double-read when getting the GPIO value, as required by some implementations that this driver supports * we need to always do 32-bit reads, which bgpio doesn't guarantee * the current output state may not be readable from the hardware register - reading may reflect input status but not output status. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: sa1100: implement get_direction methodRussell King2017-03-241-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow gpiolib to read back the current IO direction configuration by implementing the .get_direction callback. This, in part, allows debugfs to report the complete true hardware state rather than the software state. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: sa1100: convert to use IO accessorsRussell King2017-03-241-75/+124
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use IO accessors to access the SA1100 registers rather than accessing them directly. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: sa1100: use sa11x0_gpio_set_wake()Russell King2017-03-241-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use sa11x0_gpio_set_wake() to set the PWER register, as provided by Dmitry some time back. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: merrifield: Don't use GPIOF_DIR_IN / GPIOF_DIR_OUTAndy Shevchenko2017-03-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mentioned flags are dedicated solely for consumer API. Replace them by explicit values. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [Made a !bang clamp to (0,1) instead of infix ? operator] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: pca953x: Expand comment for "reset" GPIO in ACPI caseAndy Shevchenko2017-03-231-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO ACPI library is going to be stricter about resources, thus, expand comment regarding "reset" GPIO resource in this driver to clarify its usage in ACPI case. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: pca953x: Sort headers alphabeticallyAndy Shevchenko2017-03-231-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | For sake of better maintenance sort the headers by alphabetical order. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: pca953x: Introduce a long awaited ->get_direction()Andy Shevchenko2017-03-231-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce ->get_direction() callback for the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> [Removed use of GPIOF_DIR* flags] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: use BIT macro instead of bit shiftingRalph Sennhauser2017-03-231-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the BIT macro instead of explicitly shifting bits for some added clarity. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mmio: add support for NI 169445 NAND GPIONathan Sullivan2017-03-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO-based NAND controller on National Instruments 169445 hardware exposes a set of simple lines for the control signals. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: moxart: Switch to using the FTGPIO010 driverLinus Walleij2017-03-223-94/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This just deletes the Moxa ART driver and replaces it with the more versatile Faraday FTGPIO010 driver. Make this default on for ARCH_GEMINI and ARCH_MOXART so we do not get Kconfig glitches. Tested-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: gemini: rename to match Faraday IPLinus Walleij2017-03-223-37/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Gemini driver is actually a driver for the Faraday Technology FTGPIO010 IP block. We rename the driver and the Kconfig symbol and put in a a new compatible string for the Moxa ART SoC that is also using this IP block. Tested-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: let the compiler inlineRalph Sennhauser2017-03-161-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A modern compiler should know better when to inline, so drop the inline keywords. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: extra whitespace fixesRalph Sennhauser2017-03-161-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix whitespace errors missed by checkpatch. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: checkpatch: whitespace fixesRalph Sennhauser2017-03-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix whitespace errors reported by checkpatch. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: checkpatch: unsigned int fixesRalph Sennhauser2017-03-161-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use unsigned int instead of plain unsigned as reported by checkpatch. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: start multiline block comments with blank lineRalph Sennhauser2017-03-161-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While this isn't an issue according to checkpatch two styles are used. Add a blank line to the block comments missing a blank line at the start so multiline block comments look the same across the file. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: mvebu: checkpatch: block comment fixesRalph Sennhauser2017-03-161-8/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix issues in block comments reported by checkpatch. Signed-off-by: Ralph Sennhauser <ralph.sennhauser@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: acpi: Ignore -EPROBE_DEFER for unselected gpiointsHans de Goede2017-03-161-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When acpi_dev_gpio_irq_get gets called with an index of say 2, it should not care if acpi_get_gpiod for index 0 or 1 returns -EPROBE_DEFER. This allows drivers which request a gpioint with index > 0 to function if there is no gpiochip driver (loaded) for gpioints with a lower index. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: of: Don't return 0 on dt_gpio_count()Andy Shevchenko2017-03-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's unusual to have error checking like (ret <= 0) in cases when counting GPIO resources. In case when it's mandatory we propagate the error (-ENOENT), otherwise we don't use the result. This makes consistent behaviour across all possible variants called in gpiod_count(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: acpi: Don't return 0 on acpi_gpio_count()Andy Shevchenko2017-03-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's unusual to have error checking like (ret <= 0) in cases when counting GPIO resources. In case when it's mandatory we propagate the error (-ENOENT), otherwise we don't use the result. This makes consistent behaviour across all possible variants called in gpiod_count(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: xlp: Update for ARCH_THUNDER2Jayachandran C2017-03-162-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARCH_VULCAN arm64 platform (for Broadcom Vulcan ARM64 processors) has been discontinued. Cavium's ThunderX2 CN99XX (ARCH_THUNDER2) will be the next revision of this platform. Update compile dependencies and ACPI ID to reflect this change. Signed-off-by: Jayachandran C <jnair@caviumnetworks.com> [Drop depreciation of ARCH_VULCAN] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: zx: make use of raw_spinlock variantsJulia Cartwright2017-03-161-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The zx gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: ws16c48: make use of raw_spinlock variantsJulia Cartwright2017-03-161-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ws16c48 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | | gpio: pl061: make use of raw_spinlock variantsJulia Cartwright2017-03-161-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pl061 gpio driver currently implements an irq_chip for handling interrupts; due to how irq_chip handling is done, it's necessary for the irq_chip methods to be invoked from hardirq context, even on a a real-time kernel. Because the spinlock_t type becomes a "sleeping" spinlock w/ RT kernels, it is not suitable to be used with irq_chips. A quick audit of the operations under the lock reveal that they do only minimal, bounded work, and are therefore safe to do under a raw spinlock. Signed-off-by: Julia Cartwright <julia@ni.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 04:29:05 +0000