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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h
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* drm/amdgpu/discovery: move all table parsing into amdgpu_discovery.cAlex Deucher2022-04-281-6/+0
| | | | | | | | This data has no dependencies, so encapsulate it all within amdgpu_discovery.c. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/discovery: add a function to parse the vcn info tableAlex Deucher2022-04-281-0/+1
| | | | | | | To get the codec disable fuse mask. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/discovery: add a function to get the mall_sizeAlex Deucher2022-04-281-0/+1
| | | | | | | | | Add a function to fetch the mall size from the IP discovery table. Properly handle harvest configurations where more or less cache may be available. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix incorrect VCN revision in SRIOVLeslie Shi2021-12-131-2/+0
| | | | | | | | | | | | | | | | | | | | | Guest OS will setup VCN instance 1 which is disabled as an enabled instance and execute initialization work on it, but this causes VCN ib ring test failure on the disabled VCN instance during modprobe: amdgpu 0000:00:08.0: amdgpu: ring vcn_enc_1.0 uses VM inv eng 5 on hub 1 amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_dec_0 (-110). amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_enc_0.0 (-110). [drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test failed (-110). v2: drop amdgpu_discovery_get_vcn_version and rename sriov_config to vcn_config v3: modify VCN's revision in SR-IOV and bare-metal Fixes: baf3f8f3740625 ("drm/amdgpu: handle SRIOV VCN revision parsing") Signed-off-by: Leslie Shi <Yuliang.Shi@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add initial IP enumeration via IP discovery tableAlex Deucher2021-10-041-0/+1
| | | | | | | | | Add initial support for all navi based parts. v2: rebase Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Use IP discovery data to determine VCN enablement instead of ↵Bokun Zhang2021-06-181-0/+3
| | | | | | | | | | | | | | MMSCH In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: add instance_number check in amdgpu_discovery_get_ip_versionPeng Ju Zhou2021-06-111-1/+1
| | | | | | | | | | | | | | The original code returns IP version of instantce_0 for every IP. This implementation may be correct for most of IPs. However, for certain IP block (VCN for example), it may have 2 instances and both of them have the same hw_id, BUT they have different revision number (0 and 1). In this case, the original amdgpu_discovery_get_ip_version cannot correct reflects the result and returns false information Signed-off-by: Bokun Zhang <Bokun.Zhang@amd.com> Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add judgement when add ip blocks (v2)Likun GAO2021-05-131-0/+1
| | | | | | | | | | Judgement whether to add an sw ip according to the harvest info. v2: fix indentation (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: reduce ip discovery data reading sizeWenhui Sheng2020-07-021-1/+2
| | | | | | | | | Only read first 4K data instead of whole TMR block, so we can reduce the time in full access mode. Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: adjust sequence of ip_discovery init and timeout_settingMonk Liu2020-04-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | what: 1)move timtout setting before ip_early_init to reduce exclusive mode cost for SRIOV 2)move ip_discovery_init() to inside of amdgpu_discovery_reg_base_init() it is a prepare for the later upcoming patches. why: in later upcoming patches we would use a new mailbox event -- "req_gpu_init_data", which is a callback hooked in adev->virt.ops and this callback send a new event "REQ_GPU_INIT_DAT" to host to notify host to do some preparation like "IP discovery/vbios on the VF FB" and this callback must be: A) invoked after set_ip_block() because virt.ops is configured during set_ip_block() B) invoked before ip_discovery_init() becausen ip_discovery_init() need host side prepares everything in VF FB first. current place of ip_discovery_init() is before we can invoke callback of adev->virt.ops, thus we must move ip_discovery_init() to a place after the adev->virt.ops all settle done, and the perfect place is in amdgpu_discovery_reg_base_init() Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update amdgpu_discovery to handle revisionTianci.Yin2019-10-171-1/+1
| | | | | | | | | update amdgpu_discovery to get IP revision. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Tianci.Yin <tianci.yin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/discovery: reserve discovery data at the top of VRAMXiaojie Yuan2019-10-151-0/+2
| | | | | | | | | | | | | | | IP Discovery data is TMR fenced by the latest PSP BL, so we need to reserve this region. Tested on navi10/12/14 with VBIOS integrated with latest PSP BL. v2: use DISCOVERY_TMR_SIZE macro as bo size use amdgpu_bo_create_kernel_at() to allocate bo Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/discovery: add ip discovery initial supportXiaojie Yuan2019-06-211-0/+34
The IP discovery table lists is populated by the psp at power on and includes all of the hw details on the board: - List of IPs and MMIO offsets - IP harvest details - IP configuration details v2: prefix struct and function names with 'amdgpu' v3: read table binary from vram using mmMM_INDEX and mmMM_DATA update TABLE_BINARY_MAX_SIZE to 64kb (1 TMR) add 'instance_number' field per ip info consider endianness and replace uint8/16/32_t with u8/16/32 initialize register base addresses initialize adev->gfx.config and adev->gfx.cu_info to replace gpu info fw get major and minor version using a single api don't expose internal data structures in amdgpu_discovery.h v4: RCC_CONFIG_MEMSIZE is in MB units hold mmio_idx_lock while reading ip discovery binary v5: pick out discovery.h as a cross-OS header do structure pointer cast directly consider endianness while using the member of structure convert base addresses to dword at boot up, PSP BL copies ip discovery binary from VBIOS(SPIROM) image to the top of the frame buffer (just below the reserved regions for PSP & SMU). ip discovery data table includes the collection of each ip's identification number, base addresses, version number, and harvest setting placeholder. gc data table includes gfx info structure. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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