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* drm/amdgpu: remove unused parameters to amd_sched_createChristian König2015-08-251-3/+2
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: improve sa_bo->fence by kernel fenceChunming Zhou2015-08-251-11/+11
| | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian K?nig <christian.koenig@amd.com>
* drm/amdgpu: modify amdgpu_fence_wait_any() to amdgpu_fence_wait_multiple()Junwei Zhang2015-08-251-18/+61
| | | | | | | | | | | | | Rename the function and update the related code with this modified function. Add the new parameter of bool wait_all. If wait_all is true, it will return when all fences are signaled or timeout. If wait_all is false, it will return when any fence is signaled or timeout. Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: cleanup amdgpu_fence_ring_wait_seqChristian König2015-08-171-69/+15
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove duplicate amdgpu_fence_process implementationChristian König2015-08-171-58/+1
| | | | | | | Looks like that somehow got missed while during porting the radeon changes. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove amdgpu_fence_waitChristian König2015-08-171-22/+0
| | | | | | | It was just a wrapper for fence_wait anyway. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove amdgpu_fence_signaledChristian König2015-08-171-22/+0
| | | | | | | The common kernel function does the same thing. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move sched job process from isr to fence callbackChunming Zhou2015-08-171-18/+1
| | | | | | | This way can avoid interrupt lost, and can process sched job exactly. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: move wait_queue_head from adev to ring (v2)monk.liu2015-08-171-151/+74
| | | | | | | | | thus unnecessary wake up could be avoid between rings v2: move wait_queue_head to fence_drv from ring Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: re-implement fence_default_waitmonk.liu2015-08-171-33/+4
| | | | | | | use fence_wait_any to implement fence_default_wait Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: new implement for fence_wait_any (v2)monk.liu2015-08-171-43/+72
| | | | | | | | | | | origninal method will sleep/schedule at the granurarity of HZ/2 and based on seq signal method, the new implement is based on kernel fance interface, no unnecessary schedule at all v2: replace logic of original amdgpu_fence_wait_any Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: use kernel fence interface when possiblemonk.liu2015-08-171-10/+3
| | | | | Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: add amdgpu.sched_hw_submission optionJammy Zhou2015-08-171-1/+2
| | | | | | | | This option can be used to specify the max number of submissions in the active HW queue. The default value is 2 now. Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: protect fence_process from multiple contextChunming Zhou2015-08-171-1/+5
| | | | | | | | fence_process may be called from kthread, user thread and interrupt context. it is possible to called concurrently, then will wake up fence queue multiple times. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add sched isr to fence processChunming Zhou2015-08-171-1/+17
| | | | | Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add backend implementation of gpu scheduler (v2)Chunming Zhou2015-08-171-1/+2
| | | | | | | | v2: fix rebase breakage Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add scheduler initializationAlex Deucher2015-08-171-0/+10
| | | | | | | | | | 1. Add kernel parameter option, default 0 2. Add scheduler initialization for amdgpu Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Acked-by: Christian K?nig <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add fence suspend/resume functionsAlex Deucher2015-08-171-0/+61
| | | | | | | | | | | | | | | | Added to: - handle draining the ring on suspend - properly enable/disable interrupts on suspend and resume Fix breakages from: commit 467ee3be53d240d08beed2e82a941e820c1ac323 Author: Chunming Zhou <david1.zhou@amd.com> Date: Mon Jun 1 14:14:32 2015 +0800 drm/amdgpu: always enable EOP interrupt v2 Tested-by: Audrey Grodzovsky <audrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: always enable EOP interrupt v2Chunming Zhou2015-08-171-36/+6
| | | | | | | | | v2 (chk): always enable EOP interrupt, independent of scheduler, remove now unused delayed_irq handling. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: remove amdgpu_fence_recreateChristian König2015-08-171-32/+0
| | | | | | | | It's not used any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: recreate fence from user seqChristian König2015-06-291-2/+35
| | | | | | | | And use common fence infrastructure for the wait. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
* drm/amdgpu: fix wrong typemonk.liu2015-06-291-1/+2
| | | | | Signed-off-by: monk.liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: simplify fence debugfs output a bitChristian König2015-06-291-2/+3
| | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <aleander.deucher@amd.com>
* drm/amdgpu: disable user fence interrupt (v2)Chunming Zhou2015-06-051-1/+3
| | | | | | | | | | amdgpu submits both kernel and user fences, but just need one interrupt, disable user fence interrupt and don't effect user fence. v2: fix merge error Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add zero timeout check in amdgpu_fence_wait_seq_timeoutJack Xiao2015-06-051-0/+4
| | | | | Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: drop AMDGPU_FENCE_SIGNALED_SEQChristian König2015-06-031-12/+0
| | | | | | | | | | | It's causing issues with VMID handling and comparing the fence value two times actually doesn't make handling faster. Port of radeon commit "d6d5c5b8364bcc4d52cddc68bcb0a330d2af20f3". Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com>
* drm/amdgpu: rewording some left radeonsJammy Zhou2015-06-031-2/+2
| | | | | Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
* drm/amdgpu: add core driver (v4)Alex Deucher2015-06-031-0/+1139
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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