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path: root/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
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* drm/amdgpu: nuke dynamic gfx scratch reg allocationChristian König2022-05-061-51/+13
| | | | | | | | | | | It's over a decade ago that this was actually used for more than ring and IB tests. Just use the static register directly where needed and nuke the now useless infrastructure. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Lang Yu <Lang.Yu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use ring structure to access rptr/wptr v2Jack Xiao2022-05-041-8/+8
| | | | | | | | | | | Use ring structure to access the cpu/gpu address of rptr/wptr. v2: merge gfx10/sdma5/sdma5.2 patches Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: correctly toggle gfx on/off around RLC_SPM_* register accessEvan Quan2021-11-051-0/+4
| | | | | | | | | | | | | | | As part of the ib padding process, accessing the RLC_SPM_* register may trigger gfx hang. Since gfxoff may be already kicked during the whole period. To address that, we manually toggle gfx on/off around the RLC_SPM_* register access. This can resolve the gfx hang issue observed on running Talos with RDP launched in parallel. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Put MODE register in wave debug infoJoseph Greathouse2021-08-051-0/+1
| | | | | | | | | | | Add the MODE register into the per-wave debug information. This register holds state such as FP rounding and denorm modes, which exceptions are enabled, and active clamping modes. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu/gfx_v7_0: Repair function names in the documentationLee Jones2021-05-211-3/+3
| | | | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2126: warning: expecting prototype for gfx_v7_0_ring_emit_hdp(). Prototype was for gfx_v7_0_ring_emit_hdp_flush() instead drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2262: warning: expecting prototype for gfx_v7_0_ring_emit_ib(). Prototype was for gfx_v7_0_ring_emit_ib_gfx() instead drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3207: warning: expecting prototype for gfx_v7_0_ring_emit_vm_flush(). Prototype was for gfx_v7_0_ring_emit_pipeline_sync() instead Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add the sched_score to amdgpu_ring_initChristian König2021-04-091-2/+2
| | | | | | | | | | Allow separate ring to share the same scheduler score. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu/gfx_v7_0: Trivial typo fixesBhaskar Chowdhury2021-04-091-11/+11
| | | | | | | | | | | | | | | | s/acccess/access/ s/inferface/interface/ s/sequnce/sequence/ .....two different places. s/retrive/retrieve/ s/sheduling/scheduling/ s/independant/independent/ s/wether/whether/ ......two different places. s/emmit/emit/ s/synce/sync/ Reviewed-by: Nirmoy Das<nirmoy.das@amd.com> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use AMDGPU_NUM_VMID when possibleNirmoy Das2020-12-081-1/+1
| | | | | | | | Replace hardcoded vmid number with AMDGPU_NUM_VMID macro. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu/gfx_v7_0: Clean-up a bunch of kernel-doc related issuesLee Jones2020-11-241-14/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1590: warning: Function parameter or member 'instance' not described in 'gfx_v7_0_select_se_sh' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1788: warning: Excess function parameter 'se_num' description in 'gfx_v7_0_setup_rb' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1788: warning: Excess function parameter 'sh_per_se' description in 'gfx_v7_0_setup_rb' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:1852: warning: Excess function parameter 'adev' description in 'DEFAULT_SH_MEM_BASES' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2086: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_test_ring' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2130: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_hdp_flush' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2130: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_hdp_flush' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2130: warning: Excess function parameter 'ridx' description in 'gfx_v7_0_ring_emit_hdp_flush' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_fence_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'addr' not described in 'gfx_v7_0_ring_emit_fence_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'seq' not described in 'gfx_v7_0_ring_emit_fence_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Function parameter or member 'flags' not described in 'gfx_v7_0_ring_emit_fence_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_fence_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2182: warning: Excess function parameter 'fence' description in 'gfx_v7_0_ring_emit_fence_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_fence_compute' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'addr' not described in 'gfx_v7_0_ring_emit_fence_compute' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'seq' not described in 'gfx_v7_0_ring_emit_fence_compute' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Function parameter or member 'flags' not described in 'gfx_v7_0_ring_emit_fence_compute' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_fence_compute' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2224: warning: Excess function parameter 'fence' description in 'gfx_v7_0_ring_emit_fence_compute' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2260: warning: Function parameter or member 'job' not described in 'gfx_v7_0_ring_emit_ib_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2260: warning: Function parameter or member 'flags' not described in 'gfx_v7_0_ring_emit_ib_gfx' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:2351: warning: Function parameter or member 'timeout' not described in 'gfx_v7_0_ring_test_ib' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Function parameter or member 'ring' not described in 'gfx_v7_0_ring_emit_vm_flush' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Function parameter or member 'vmid' not described in 'gfx_v7_0_ring_emit_vm_flush' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Function parameter or member 'pd_addr' not described in 'gfx_v7_0_ring_emit_vm_flush' drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:3244: warning: Excess function parameter 'adev' description in 'gfx_v7_0_ring_emit_vm_flush' Acked-by: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu/gfx_v7_0: Remove unused struct definitionLee Jones2020-11-131-9/+0
| | | | | | | | | | | | | | | | | | Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:5211:45: warning: ‘gfx_v7_0_ip_block’ defined but not used [-Wunused-const-variable=] Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move amdgpu_num_kcq handling to a helperAlex Deucher2020-10-161-1/+2
| | | | | | | | | | | Add a helper so we can set per asic default values. Also, the module parameter is currently clamped to 8, but clamp it per asic just in case some asics have different limits in the future. Enable the option on gfx6,7 as well for consistency. Acked-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Clean up KFD VMID assignmentFelix Kuehling2020-07-021-4/+2
| | | | | | | | | | The KFD VMID assignment was hard-coded in a few places. Consolidate that in a single variable adev->vm_manager.first_kfd_vmid. The value is still assigned in gmc-ip-version-specific code. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: label internally used symbols as staticNirmoy Das2020-07-011-2/+2
| | | | | | | | | | | Used sparse(make C=1) to find these loose ends. v2: removed unwanted extra line Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: apply AMDGPU_IB_FLAG_EMIT_MEM_SYNC to compute IBs too (v3)Marek Olšák2020-05-181-1/+17
| | | | | | | | | | | Compute IBs need this too. v2: split out version bump v3: squash in emit frame count fixes Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add mem_sync implementation for all the ASICs.Andrey Grodzovsky2020-05-181-1/+15
| | | | | | | | | | Implement the .mem_sync hook defined earlier. v2: Rename functions Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: rework sched_list generationNirmoy Das2020-04-091-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Generate HW IP's sched_list in amdgpu_ring_init() instead of amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(), ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary. This patch also stores sched_list for all HW IPs in one big array in struct amdgpu_device which makes amdgpu_ctx_init_entity() much more leaner. v2: fix a coding style issue do not use drm hw_ip const to populate amdgpu_ring_type enum v3: remove ctx reference and move sched array and num_sched to a struct use num_scheds to detect uninitialized scheduler list v4: use array_index_nospec for user space controlled variables fix possible checkpatch.pl warnings Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: stop disable the scheduler during HW finiChristian König2020-04-011-16/+9
| | | | | | | | | | | | | | | | | When we stop the HW for example for GPU reset we should not stop the front-end scheduler. Otherwise we run into intermediate failures during command submission. The scheduler should only be stopped in very few cases: 1. We can't get the hardware working in ring or IB test after a GPU reset. 2. The KIQ scheduler is not used in the front-end and should be disabled during GPU reset. 3. In amdgpu_ring_fini() when the driver unloads. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Nirmoy Das <nirmoy.das@amd.com> Test-by: Dennis Li <dennis.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: implement more ib pools (v2)xinhui pan2020-04-011-1/+2
| | | | | | | | | | | | | | | | | We have three ib pools, they are normal, VM, direct pools. Any jobs which schedule IBs without dependence on gpu scheduler should use DIRECT pool. Any jobs schedule direct VM update IBs should use VM pool. Any other jobs use NORMAL pool. v2: squash in coding style fix Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Initialize SPM_VMID with 0xf (v2)Jacob He2020-02-281-1/+18
| | | | | | | | | | | | | | | | SPM_VMID is a global resource, SPM access the video memory according to SPM_VMID. The initial valude of SPM_VMID is 0 which is used by kernel. That means UMD can overwrite the memory of VMID0 by enabling SPM, that is really dangerous. Initialize SPM_VMID with 0xf, it messes up other user mode process at most. v2: squash in indentation fix Signed-off-by: Jacob He <jacob.he@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add num_banks and num_ranks to gfx config structureYong Zhao2020-02-281-0/+5
| | | | | | | | The two members will be used by KFD later. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix calltrace during kmd unload(v3)Monk Liu2019-12-021-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | issue: kernel would report a warning from a double unpin during the driver unloading on the CSB bo why: we unpin it during hw_fini, and there will be another unpin in sw_fini on CSB bo. fix: actually we don't need to pin/unpin it during hw_init/fini since it is created with kernel pinned, we only need to fullfill the CSB again during hw_init to prevent CSB/VRAM lost after S3 v2: get_csb in init_rlc so hw_init() will make CSIB content back even after reset or s3 v3: use bo_create_kernel instead of bo_create_reserved for CSB otherwise the bo_free_kernel() on CSB is not aligned and would lead to its internal reserve pending there forever take care of gfx7/8 as well Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove set but not used variable 'mc_shared_chmap' from ↵yu kuai2019-11-131-2/+1
| | | | | | | | | | | | | | | | | | | | | 'gfx_v6_0.c' and 'gfx_v7_0.c' Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c: In function ‘gfx_v6_0_constants_init’: drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c:1579:6: warning: variable ‘mc_shared_chmap’ set but not used [-Wunused-but-set-variable] drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c: In function ‘gfx_v7_0_gpu_early_init’: drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c:4262:6: warning: variable ‘mc_shared_chmap’ set but not used [-Wunused-but-set-variable] Fixes: 2cd46ad22383 ("drm/amdgpu: add graphic pipeline implementation for si v8") Fixes: d93f3ca706b8 ("drm/amdgpu/gfx7: rework gpu_init()") Signed-off-by: yu kuai <yukuai3@huawei.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge tag 'v5.3-rc3' into drm-next-5.4Alex Deucher2019-08-091-0/+9
|\ | | | | | | | | | | Linux 5.3-rc3 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: Default disable GDS for compute VMIDsJoseph Greathouse2019-07-181-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GDS and GWS blocks default to allowing all VMIDs to access all entries. Graphics VMIDs can handle setting these limits when the driver launches work. However, compute workloads under HWS control don't go through the kernel driver. Instead, HWS firmware should set these limits when a process is put into a VMID slot. Disable access to these devices by default by turning off all mask bits (for OA) and setting BASE=SIZE=0 (for GDS and GWS) for all compute VMIDs. If a process wants to use these resources, they can request this from the HWS firmware (when such capabilities are enabled). HWS will then handle setting the base and limit for the process when it is assigned to a VMID. This will also prevent user kernels from getting 'stuck' in GWS by accident if they write GWS-using code but HWS firmware is not set up to handle GWS reset. Until HWS is enabled to handle GWS properly, all GWS accesses will MEM_VIOL fault the kernel. v2: Move initialization outside of SRBM mutex Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Default disable GDS for compute+gfxJoseph Greathouse2019-07-301-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Units in the GDS block default to allowing all VMIDs access to all entries. Disable shader access to the GDS, GWS, and OA blocks from all compute and gfx VMIDs by default. For compute, HWS firmware will set up the access bits for the appropriate VMID when a compute queue requires access to these blocks. The driver will handle enabling access on-demand for graphics VMIDs. Leaving VMID0 with full access because otherwise HWS cannot save or restore values during task switch. v2: Fixed code and comment styling. Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: Default disable GDS for compute VMIDsJoseph Greathouse2019-07-181-0/+9
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GDS and GWS blocks default to allowing all VMIDs to access all entries. Graphics VMIDs can handle setting these limits when the driver launches work. However, compute workloads under HWS control don't go through the kernel driver. Instead, HWS firmware should set these limits when a process is put into a VMID slot. Disable access to these devices by default by turning off all mask bits (for OA) and setting BASE=SIZE=0 (for GDS and GWS) for all compute VMIDs. If a process wants to use these resources, they can request this from the HWS firmware (when such capabilities are enabled). HWS will then handle setting the base and limit for the process when it is assigned to a VMID. This will also prevent user kernels from getting 'stuck' in GWS by accident if they write GWS-using code but HWS firmware is not set up to handle GWS reset. Until HWS is enabled to handle GWS properly, all GWS accesses will MEM_VIOL fault the kernel. v2: Move initialization outside of SRBM mutex Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Add VMID to SRBM debugfs bank selectionTom St Denis2019-07-161-2/+2
| | | | | | | | | Add 5 bits to the offset for SRBM selection to handle VMIDs. Also update the select_me_pipe_q() callback to also select VMID. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next' into drm-next-5.3Alex Deucher2019-06-251-2/+4
|\ | | | | | | | | | | Backmerge drm-next and fix up conflicts due to drmP.h removal. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * Merge tag 'drm-misc-next-2019-06-14' of ↵Daniel Vetter2019-06-141-2/+4
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.3: UAPI Changes: Cross-subsystem Changes: - Add code to signal all dma-fences when freed with pending signals. - Annotate reservation object access in CONFIG_DEBUG_MUTEXES Core Changes: - Assorted documentation fixes. - Use irqsave/restore spinlock to add crc entry. - Move code around to drm_client, for internal modeset clients. - Make drm_crtc.h and drm_debugfs.h self-contained. - Remove drm_fb_helper_connector. - Add bootsplash to todo. - Fix lock ordering in pan_display_legacy. - Support pinning buffers to current location in gem-vram. - Remove the now unused locking functions from gem-vram. - Remove the now unused kmap-object argument from vram helpers. - Stop checking return value of debugfs_create. - Add atomic encoder enable/disable helpers. - pass drm_atomic_state to atomic connector check. - Add atomic support for bridge enable/disable. - Add self refresh helpers to core. Driver Changes: - Add extra delay to make MTP SDM845 work. - Small fixes to virtio, vkms, sii902x, sii9234, ast, mcde, analogix, rockchip. - Add zpos and ?BGR8888 support to meson. - More removals of drm_os_linux and drmP headers for amd, radeon, sti, r128, r128, savage, sis. - Allow synopsis to unwedge the i2c hdmi bus. - Add orientation quirks for GPD panels. - Edid cleanups and fixing handling for edid < 1.2. - Add runtime pm to stm. - Handle s/r in dw-hdmi. - Add hooks for power on/off to dsi for stm. - Remove virtio dirty tracking code, done in drm core. - Rework BO handling in ast and mgag200. Tiny conflict in drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c, needed #include <linux/slab.h> to make it compile. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0e01de30-9797-853c-732f-4a5bd6e61445@linux.intel.com
| | * drm/amd: drop use of drmP.h in remaining filesSam Ravnborg2019-06-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this commit drm/amd/ has no longer any uses of the deprecated drmP.h header file. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-11-sam@ravnborg.org
| | * drm/amd: drop dependencies on drm_os_linux.hSam Ravnborg2019-06-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix so no files in drm/amd/ depends on the deprecated drm_os_linux.h header file. It was done manually: - remove drm_os_linux.h from drmP.h - fix all build errros Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: "David (ChunMing) Zhou" <David1.Zhou@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-3-sam@ravnborg.org
* | | drm/amdgpu: enable gfx eop interrupt per gfx pipeHawking Zhang2019-06-201-2/+2
|/ / | | | | | | | | | | | | | | | | | | Navi10 has 2 gfx pipe and need to enable gfx eop interrupt per pipe, instead of enable eop int for all gfx pipes at one time. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* / drm/amdgpu: remove static GDS, GWS and OA allocationChristian König2019-05-241-28/+4
|/ | | | | | | | As far as we know this was never used by userspace and so should be removed. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add a workaround for GDS ordered append hangs with compute queuesMarek Olšák2019-02-051-1/+18
| | | | | | | | | | | I'm not increasing the DRM version because GDS isn't totally without bugs yet. v2: update emit_ib_size Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add flags to emit_ib interface v2Jack Xiao2019-01-251-3/+3
| | | | | | | | | | | | Replace the last bool type parameter with a general flags parameter, to make the last parameter be able to contain more information. v2: drop setting need_ctx_switch = false Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use asic specific doorbell index instead of macro definitionOak Zeng2018-11-281-1/+1
| | | | | | | | | | ASIC specific doorbell layout is used instead of enum definition Signed-off-by: Oak Zeng <ozeng@amd.com> Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com> Suggested-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract the function of enter/exit safe mode for RLCLikun Gao2018-11-091-122/+26
| | | | | | | | | | Abstract the function of amdgpu_gfx_rlc_enter/exit_safe_mode and some part of rlc_init to improve the reusability of RLC. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: separate amdgpu_rlc into a single fileLikun Gao2018-11-091-12/+4
| | | | | | | | | | Separate the function and struct of RLC from the file of GFX. Abstract the function of amdgpu_gfx_rlc_fini. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: unify rlc function into structureLikun Gao2018-11-091-12/+18
| | | | | | | | | | | Put function rlc_init,rlc_fini,rlc_resume,rlc_stop,rlc_start into structure amdgpu_rlc_funcs and change the method to call rlc function for each verssion of GFX. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Modify the argument of emit_ib interfaceRex Zhu2018-11-051-3/+7
| | | | | | | | | | | | | | use the point of struct amdgpu_job as the function argument instand of vmid, so the other members of struct amdgpu_job can be visit in emit_ib function. v2: add a wrapper for getting the VMID add the job before the ib on the parameter list. v3: refine the wrapper name Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove messages from IB testsChristian König2018-11-051-14/+6
| | | | | | | | | | We already print an error message that an IB test failed in the common code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: further ring test cleanupsChristian König2018-11-051-15/+9
| | | | | | | | | | | | | | Move all error messages from IP specific code into the common helper. This way we now uses the ring name in the messages instead of the index and note which device is affected as well. Also cleanup error handling in the IP specific code and consequently use ETIMEDOUT when the ring test timed out. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Retire amdgpu_ring.ready flag v4Andrey Grodzovsky2018-11-051-11/+5
| | | | | | | | | | | | | | | Start using drm_gpu_scheduler.ready isntead. v3: Add helper function to run ring test and set sched.ready flag status accordingly, clean explicit sched.ready sets from the IP specific files. v4: Add kerneldoc and rebase. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: put HQD EOP buffers into VRAMMarek Olšák2018-11-051-1/+1
| | | | | | | | This increases performance of compute queues. EOP events (PKT3_RELEASE_MEM) are stored into these buffers. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use scheduler fault instead of reset workChristian König2018-11-051-2/+26
| | | | | | | | | Signal a fault to the scheduler on an illegal instruction or register access violation instead of kicking of the reset handler directly. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move more defines into amdgpu_irq.hChristian König2018-09-261-3/+3
| | | | | | | | Everything that isn't related to the IH ring. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Refine function nameRex Zhu2018-09-261-5/+5
| | | | | | | | | | | change function name gfx_v6/7/8/9_0_gpu_init to gfx_v6/7/8/9_0_constants_init. this function is just for init gfx constants such as max pipes, render backends... Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move reserving GDS/GWS/OA into common codeChristian König2018-09-191-19/+0
| | | | | | | | We don't need that in the per ASIC code. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix up GDS/GWS/OA shiftingChristian König2018-09-191-9/+0
| | | | | | | | | That only worked by pure coincident. Completely remove the shifting and always apply correct PAGE_SHIFT. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: implement soft_recovery for GFX7Christian König2018-08-271-0/+13
| | | | | | | | Try to kill waves on the SQ. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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