summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/display
Commit message (Collapse)AuthorAgeFilesLines
...
* | drm/amd/display: assume VBIOS supports DSC as defaultCharlene Liu2025-03-101-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why & How] The clear_dsc_setting at boot logic was based on dcn version check. As such new ASIC lost this DSC clear up logic, change the assumption to BIOS support eDP DSC for new ASIC. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Implement PCON regulated autonomous mode handlingGeorge Shen2025-03-102-11/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why/How] DP spec has been updated recently to make regulated autonomous mode more well-defined. In case any PCON vendors choose to implement regulated autonomous mode in the future, pre-emptively add handling for the regulated autonomous mode based on current spec. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: not abort link train when bw is lowPeichen Huang2025-03-101-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY] DP tunneling should not abort link train even bandwidth become too low after downgrade. Otherwise, it would fail compliance test. [HOW} Do link train with downgrade settings even bandwidth is not enough Reviewed-by: Cruise Hung <cruise.hung@amd.com> Reviewed-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Do not enable replay when vtotal update is pending.Danny Wang2025-03-1010-30/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why&How] Vtotal is not applied to HW when handling vsync interrupt. Make sure vtotal is aligned before enable replay. Reviewed-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Danny Wang <danny.wang@amd.com> Signed-off-by: Zhongwei Zhang <Zhongwei.Zhang@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Add and use new dm_prepare_suspend() callbackMario Limonciello2025-03-101-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] The displays currently don't get turned off until after other IP blocks have been suspended. However turning off the displays first gives a very visible response that the system is on it's way down. [How] Turn off displays in a prepare_suspend() callback instead when possible. This will help for suspend and hibernate sequences. The shutdown sequence however will not call prepare() so check whether the state has been already saved to decide what to do. Acked-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Restore correct backlight brightness after a GPU resetMario Limonciello2025-03-101-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] GPU reset will attempt to restore cached state, but brightness doesn't get restored. It will come back at 100% brightness, but userspace thinks it's the previous value. [How] When running resume sequence if GPU is in reset restore brightness to previous value. Acked-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: fix default brightnessMario Limonciello2025-03-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] To avoid flickering during boot default brightness level set by BIOS should be maintained for as much of the boot as feasible. commit 2fe87f54abdc ("drm/amd/display: Set default brightness according to ACPI") attempted to set the right levels for AC vs DC, but brightness still got reset to maximum level in initialization code for setup_backlight_device(). [How] Remove the hardcoded initialization in setup_backlight_device() and instead program brightness value to match BIOS (AC or DC). This avoids a brightness flicker from kernel changing the value. Userspace may however still change it during boot. Fixes: 2fe87f54abdc ("drm/amd/display: Set default brightness according to ACPI") Acked-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Add more debug data to dmub_srvJoshua Aberback2025-03-1014-285/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] When analyzing some crash dumps, not all of the expected DMUB info was available, so we want to add in-object storage for this data. [How] - dmub_srv_debug (renamed to dmub_timeout_info) is already a member of dmub_diagnostic_data, therefore keep a dmub_diagnostic_data directly in dmub_srv - use dmub_srv->debug when collecting diagnostic info instead of stack object to allow for easy inspection in crash dumps Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Disable unneeded hpd interrupts during dm_initLeo Li2025-03-101-19/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] It seems HPD interrupts are enabled by default for all connectors, even if the hpd source isn't valid. An eDP for example, does not have a valid hpd source (but does have a valid hpdrx source; see construct_phy()). Thus, eDPs should have their hpd interrupt disabled. In the past, this wasn't really an issue. Although the driver gets interrupted, then acks by writing to hw registers, there weren't any subscribed handlers that did anything meaningful (see register_hpd_handlers()). But things changed with the introduction of IPS. s2idle requires that the driver allows IPS for DMUB fw to put hw to sleep. Since register access requires hw to be awake, the driver will block IPS entry to do so. And no IPS means no hw sleep during s2idle. This was the observation on DCN35 systems with an eDP. During suspend, the eDP toggled its hpd pin as part of the panel power down sequence. The driver was then interrupted, and acked by writing to registers, blocking IPS entry. [How] Since DC marks eDP connections as having invalid hpd sources (see construct_phy()), DM should disable them at the hw level. Do so in amdgpu_dm_hpd_init() by disabling all hpd ints first, then selectively enabling ones for connectors that have valid hpd sources. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: Fix incorrect DPCD configs while Replay/PSR switchLeon Huang2025-03-101-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] When switching between PSR/Replay, the DPCD config of previous mode is not cleared, resulting in unexpected behavior in TCON. [How] Initialize the DPCD in setup function Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Leon Huang <Leon.Huang1@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/display: allow 256B DCC max compressed block sizes on gfx12Marek Olšák2025-03-101-1/+1
| | | | | | | | | | | | | | | | The hw supports it. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | Merge tag 'amd-drm-next-6.15-2025-03-07' of ↵Dave Airlie2025-03-1097-1354/+1493
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.freedesktop.org/agd5f/linux into drm-next amdgpu: - Fix spelling typos - RAS updates - VCN 5.0.1 updates - SubVP fixes - DCN 4.0.1 fixes - MSO DPCD fixes - DIO encoder refactor - PCON fixes - Misc cleanups - DMCUB fixes - USB4 DP fixes - DM cleanups - Backlight cleanups and fixes - Support platform backlight curves - Misc code cleanups - SMU 14 fixes - JPEG 4.0.3 reset updates - SR-IOV fixes - SVM fixes - GC 12 DCC fixes - DC DCE 6.x fix - Hiberation fix amdkfd: - Fix possible NULL pointer in queue validation - Remove unnecessary CP domain validation - SDMA queue reset support - Add per process flags radeon: - Fix spelling typos - RS400 hyperZ fix UAPI: - Add KFD per process flags for setting precision Proposed user space: https://github.com/ROCm/ROCR-Runtime/commit/2a64fa5e06e80e0af36df4ce0c76ae52eeec0a9d Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250307211051.1880472-1-alexander.deucher@amd.com
| * | drm/amd: Keep display off while going into S4Mario Limonciello2025-03-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When userspace invokes S4 the flow is: 1) amdgpu_pmops_prepare() 2) amdgpu_pmops_freeze() 3) Create hibernation image 4) amdgpu_pmops_thaw() 5) Write out image to disk 6) Turn off system Then on resume amdgpu_pmops_restore() is called. This flow has a problem that because amdgpu_pmops_thaw() is called it will call amdgpu_device_resume() which will resume all of the GPU. This includes turning the display hardware back on and discovering connectors again. This is an unexpected experience for the display to turn back on. Adjust the flow so that during the S4 sequence display hardware is not turned back on. Reported-by: Xaver Hugl <xaver.hugl@gmail.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2038 Cc: Muhammad Usama Anjum <usama.anjum@collabora.com> Tested-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Link: https://lore.kernel.org/r/20250306185124.44780-1-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: fix missing .is_two_pixels_per_containerAliaksei Urbanski2025-03-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting from 6.11, AMDGPU driver, while being loaded with amdgpu.dc=1, due to lack of .is_two_pixels_per_container function in dce60_tg_funcs, causes a NULL pointer dereference on PCs with old GPUs, such as R9 280X. So this fix adds missing .is_two_pixels_per_container to dce60_tg_funcs. Reported-by: Rosen Penev <rosenp@gmail.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3942 Fixes: e6a901a00822 ("drm/amd/display: use even ODM slice width for two pixels per container") Signed-off-by: Aliaksei Urbanski <aliaksei.urbanski@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu/display: Allow DCC for video formats on GFX12David Rosca2025-03-071-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | We advertise DCC as supported for NV12/P010 formats on GFX12, but it would fail on this check on atomic commit. Signed-off-by: David Rosca <david.rosca@amd.com> Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: use drm_* instead of DRM_ in apply_edid_quirks()Aurabindo Pillai2025-03-051-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm_* macros are more helpful that DRM_* macros since the former indicates the associated DRM device that prints the error, which maybe helpful when debugging. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add workaround for a panelAurabindo Pillai2025-03-053-3/+35
| | | | | | | | | | | | | | | | | | | | | | | | Implement w/a for a panel which requires 10s delay after link detect. Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Remove unused print__rq_dlg_params_stDr. David Alan Gilbert2025-03-052-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | print__rq_dlg_params_st() was added in 2017 by commit 061bfa06a42a ("drm/amdgpu/display: Add dml support for DCN") but has remained unused. Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amdgpu: Remove unused pre_surface_traceDr. David Alan Gilbert2025-03-052-125/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pre_surface_trace() has been unused since 2017's commit 745cc746da42 ("drm/amd/display: remove dc_pre_update_surfaces_to_stream from dc use") Remove it. Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add a new dcdebugmask to allow turning off brightness curveMario Limonciello2025-03-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Upgrading the kernel may cause some systems that were previously not using a firmware specified brightness curve to use one. In the event of problems with this curve (for example an interpolation error) add a new dcdebugmask value that can be used to turn it off. Also add an info message to show that custom brightness curves are currently in use. Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250228185145.186319-6-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add support for custom brightness curveMario Limonciello2025-03-051-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems specify in the firmware a brightness curve that better reflects the characteristics of the panel used. This is done in the form of data points and matching luminance percentage. When converting a userspace requested brightness value use that curve to convert to a firmware intended brightness value. Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250228185145.186319-5-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Avoid operating on copies of backlight capsMario Limonciello2025-03-051-30/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Making a copy of the backlight caps structure between uses is unnecessary. Refer to pointers to the same structure when using it. Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250228185145.186319-4-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd: Pass luminance data to amdgpu_dm_backlight_capsMario Limonciello2025-03-051-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ATIF method on some systems will provide a backlight curve. Pass this curve into amdgpu_dm add it to the structures. Reviewed-by: Alex Hung <alex.hung@amd.com> Link: https://lore.kernel.org/r/20250228185145.186319-3-mario.limonciello@amd.com Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Promote DAL to 3.2.323Taimur Hassan2025-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This version brings along following fixes: - Various cleanups to amdgpu dm - Add DP tunneling IRQ handler - Fix display corruption for dcn35 - Fix dmcub reset problem - Adjust BW determination for PCON - DIO encoder refactor - Fix performance with SubVP under gaming Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use drm_err() for handle_hpd_irq_helper()Mario Limonciello2025-03-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm_err() will show which device has the error. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use scoped guards for handle_hpd_irq_helper()Mario Limonciello2025-03-051-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Scoped guards will release the mutex when they go out of scope. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use _free() macro for amdgpu_dm_update_connector_after_detect()Mario Limonciello2025-03-051-11/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By using a _free() macro multiple duplicated snippets of code to free the sink can be dropped. The sink will be released when leaving scope. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use scoped guard for amdgpu_dm_update_connector_after_detect()Mario Limonciello2025-03-051-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A scoped guard will release the mutex when it goes out of scope. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use _free(kfree) for dm_gpureset_commit_state()Mario Limonciello2025-03-051-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using a _free(kfree) macro drops the need for a goto statement as it will be freed when it goes out of scope. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Change amdgpu_dm_irq_resume_*() to voidMario Limonciello2025-03-052-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amdgpu_dm_irq_resume_early() and amdgpu_dm_irq_resume_late() don't have any error flows. Change the return type from integer to void. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Change amdgpu_dm_irq_resume_*() to use drm_dbg()Mario Limonciello2025-03-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm_dbg() is helpful to show which device had the debug statement. Adjust to using this instead for debug messages. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use scoped guard for dm_resume()Mario Limonciello2025-03-051-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Scoped guards will release the mutex when they go out of scope. Adjust the code to use these instead. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use drm_err() instead of DRM_ERROR in dm_resume()Mario Limonciello2025-03-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm_err() is helpful to show which device had the error. Adjust to using this instead for error messages. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Use _free() macro for amdgpu_dm_commit_zero_streams()Mario Limonciello2025-03-051-14/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All cases except a failure to create a copy of the current context will call dc_state_release() on the copied context. Use a _free() macro to free the context and then adjust the error handling flow to drop the unnecessary use of goto statements. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Catch failures for amdgpu_dm_commit_zero_streams()Mario Limonciello2025-03-051-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amdgpu_dm_commit_zero_streams() returns a DC error code that isn't checked. Add an explicit check to this and fail dm_suspend() if it is not DC_OK. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Drop `ret` variable from dm_suspend()Mario Limonciello2025-03-051-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The `ret` variable in dm_suspend() doesn't get set and is just used to return 0. Drop the needless declaration. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Change amdgpu_dm_irq_suspend() to voidMario Limonciello2025-03-052-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | amdgpu_dm_irq_suspend() doesn't have any error flows and always returns zero. Change the function to void. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Add tunneling IRQ handlerCruise Hung2025-03-054-7/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB4 DP BW Allocation uses DP_TUNNELING_IRQ to indicate the status update. The DP_TUNNELING_IRQ is defined in LINK_SERVICE_IRQ_VECTOR_ESI0. When receiving DP HPD IRQ in USB4, read the LINK_SERVICE_IRQ_VECTOR_ESI0. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Cruise Hung <Cruise.Hung@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Added visual confirm for DCCLeo Zeng2025-03-054-3/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY] We want to add a visual confirm mode for DCC and MCache for debugging purpose. [HOW] color pipes based on whether DCC is enabled and what MCache id is used. black - DCC disabled red - DCC enabled grey - 2 different MCaches used other colors - 1 MCache used Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Leo Zeng <Leo.Zeng@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Ensure DMCUB idle before reset on DCN31/DCN35Nicholas Kazlauskas2025-03-052-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why] If we soft reset before halt finishes and there are outstanding memory transactions then the memory interface may produce unexpected results, such as out of order transactions when the firmware next runs. These can manifest as random or unexpected load/store violations. [How] Increase the timeout before soft reset to ensure the DMCUB has quiesced. This is effectively 1s maximum based on experimentation. Use the enable bit check on DCN31 like we're doing on DCN35 and reorder the reset writes to follow the HW programming guide. Ensure we're reading SCRATCH7 instead of SCRATCH8 for the HALT code. No current versions of DMCUB firmware use the SCRATCH8 boot bit to dynamically switch where the HALT code goes to maintain backwards compatibility with PSP. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Revert "Increase halt timeout for DMCUB to 1s"Nicholas Kazlauskas2025-03-052-11/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 50f040c53ea9 ("drm/amd/display: Increase halt timeout for DMCUB to 1s") There's two issues here: 1. Each poll is closer to 10us than 1us so it stalls for 15s on PNP. 2. We're reading the wrong scratch register to check for the HALT code. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Check NULL connector before it is usedAlex Hung2025-03-051-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why & How] amdgpu_dm_find_first_crtc_matching_connector can return NULL. It is necessary to the returned connector before passing it drm_atomic_get_new_connector_state which always assumes connector is not NULL. Reviewed-by: Roman Li <roman.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Remove unused struct definitionGeorge Shen2025-03-051-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why/How] The struct is not and will not be used, as it is no longer relevant nor supported. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Skip checking FRL_MODE bit for PCON BW determinationGeorge Shen2025-03-051-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why/How] Certain PCON will clear the FRL_MODE bit despite supporting the link BW indicated in the other bits. Thus, skip checking the FRL_MODE bit when interpreting the hdmi_encoded_link_bw struct. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: George Shen <george.shen@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: misc for dio encoder refactorPeichen Huang2025-03-0512-40/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY] These are left required changes for dio encoder refactor. [HOW] 1. original logic is separated by config option 2. new link encoder dp enable/disable code for dcn35 3. process fec only for DP 8b10b encoding Reviewed-by: Cruise Hung <cruise.hung@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: read mso dpcd capsHansen Dsouza2025-03-052-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [Why & How] Read if panel support multi-sst links Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Hansen Dsouza <Hansen.Dsouza@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Fix DMUB reset sequence for DCN401Dillon Varone2025-03-052-18/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY] It should no longer use DMCUB_SOFT_RESET as it can result in the memory request path becoming desynchronized. [HOW] To ensure robustness in the reset sequence: 1) Extend timeout on the "halt" command sent via gpint, and check for controller to enter "wait" as a stronger guarantee that there are no requests to memory still in flight. 2) Remove usage of DMCUB_SOFT_RESET 3) Rely on PSP to reset the controller safely Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Fix p-state type when p-state is unsupportedDillon Varone2025-03-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [WHY&HOW] P-state type would remain on previously used when unsupported which causes confusion in logging and visual confirm, so set back to zero when unsupported. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: Request HW cursor on DCN3.2 with SubVPAric Cyr2025-03-052-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [why] When SubVP is active the HW cursor size is limited to 64x64, and anything larger will force composition which is bad for gaming on DCN3.2 if the game uses a larger cursor. [how] If HW cursor is requested, typically by a fullscreen game, do not enable SubVP so that up to 256x256 cursor sizes are available for DCN3.2. Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Aric Cyr <Aric.Cyr@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * | drm/amd/display: fix type mismatch in CalculateDynamicMetadataParameters()Vitaliy Shevtsov2025-03-051-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a type mismatch between what CalculateDynamicMetadataParameters() takes and what is passed to it. Currently this function accepts several args as signed long but it's called with unsigned integers and integer. On some systems where long is 32 bits and one of these unsigned int params is greater than INT_MAX it may cause passing input params as negative values. Fix this by changing these argument types from long to unsigned int and to int respectively. Also this will align the function's definition with similar functions in other dcn* drivers. Found by Linux Verification Center (linuxtesting.org) with Svace. Fixes: 6725a88f88a7 ("drm/amd/display: Add DCN3 DML") Signed-off-by: Vitaliy Shevtsov <v.shevtsov@mt-integration.ru> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-25 07:24:52 +0000