summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
Commit message (Collapse)AuthorAgeFilesLines
* drm/amd/powerplay: enforce display related settings only on neededEvan Quan2019-01-251-5/+5
| | | | | | | | No display related settings are needed on dpm level change. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: support BOOTUP_DEFAULT power profile modeEvan Quan2019-01-141-11/+13
| | | | | | | | | This can avoid unexpected profile mode change after running compute workload. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: issue pre-display settings for display change eventEvan Quan2018-12-031-0/+3
| | | | | | | | | For display config change event only, pre-display config settings are needed. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Load fw between hw_init/resume_phase1 and phase2Rex Zhu2018-10-101-20/+0
| | | | | | | | | Extract the function of fw loading out of powerplay. Do fw loading between hw_init/resuem_phase1 and phase2 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Refine smu7/8 request_smu_load_fw callback functionRex Zhu2018-10-091-0/+1
| | | | | | | | | | | | | | | | | The request_smu_load_fw of VI is used to load gfx/sdma ip's firmware. Check whether the gfx/sdma firmware have been loaded successfully in this callback function. if failed, driver can exit to avoid gpu hard hung. if successful, clean the flag reload_fw to avoid duplicated fw load. when suspend/resume, driver need to reload fw. so in suspend, reset the reload_fw flag to true to enable load fw when resume. Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: simplify Raven, Raven2, and Picasso handlingAlex Deucher2018-09-141-1/+0
| | | | | | | | | | Treat them all as Raven rather than adding a new picasso asic type. This simplifies a lot of code and also handles the case of rv2 chips with the 0x15d8 pci id. It also fixes dmcu fw handling for picasso. Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add support of powerplay for picassoLikun Gao2018-09-141-0/+1
| | | | | | | | | add powerplay support for picasso, treat it the same as raven now. Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add the hw manager for vega20 (v3)Evan Quan2018-08-271-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | hwmgr is the interface for the driver to setup state structures which are used by the smu for managing the power state. v2: squash in fixes: - update set_watermarks_for_clocks_ranges to use common code - drop unsupported apis - correct MAX_REGULAR_DPM_NUMBER value - multimonitor fixes - add check for vbios pptable version - revise dpm table setup - init fclk dpm state - Remove unused definition in vega20_hwmgr - support power limit setup - enable vega20 to honour DAL clock limits - comment out dump_table debugging v3: switch to SOC15 register access macros Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: no need to mask workable gfxoff feature for vega12Evan Quan2018-07-131-1/+1
| | | | | | | | | Gfxoff feature for vega12 is workable. So, there is no need to mask it any more. Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use real power source in powerplay instand of hardcodeRex Zhu2018-06-151-1/+0
| | | | | | | | | | 1. move ac_power to struct pm from dpm, so can be shared with powerplay 2. remove power_source in powerplay, use adev->pm.ac_power instand. 3. update ac_power before dispatch power task. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Make sure clock_voltage_limit_table on dc is validRex Zhu2018-06-151-0/+5
| | | | | | | | | if vbios not set the max clock voltage limit table for DC mode, Set the table as sama as the table for AC mode. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/powerplay: Add initial vega20 support v2Feifei Xu2018-05-171-0/+1
| | | | | | | | | | Initial powerplay support the same as vega10 for now. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Skip fan attributes if fan not presentRex Zhu2018-05-151-0/+3
| | | | | | | | | With powerplay enabled, also need to skip fan attributes if no fan present. Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add smumgr support for VEGAM (v2)Eric Huang2018-05-151-0/+6
| | | | | | | | | | | The smumgr handles communication between the driver and the SMU for power management. v2: fix typo (Alex) Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: clear gfxoff feature mask if the asic is not ravenHuang Rui2018-05-151-1/+5
| | | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Use dpm_enabled as dpm state flagRex Zhu2018-04-111-1/+2
| | | | | | | | | | | driver will set dpm_enabled to true only when module parameter amdgpu_dpm not equal to 0 and smu hw initialize successfully. Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Add hwmgr_sw_init/fini functioinsRex Zhu2018-04-111-17/+57
| | | | | | | | Clean up pp ip functions Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Add smu irq handlers in sw_init instand of hw_initRex Zhu2018-03-211-4/+0
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Refine register_thermal_interrupt functionRex Zhu2018-03-211-1/+1
| | | | | | | | | | | v2: add Vega12 support 1. delete useless argument in function register_thermal_interrupt 2. rename function name register_thermal_interrupt to register_irq_handlers Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Remove wrapper layer of cgs irq handlingRex Zhu2018-03-211-45/+1
| | | | | | | | | | | | | | | v2: add Vega12 support 1. remove struct cgs_os_ops 2. delete cgs_linux.h 3. refine the irq code for vega10, can fix set pp table failed issue. 4. add common smu irq process function Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add the hw manager for vega12 (v4)Evan Quan2018-03-211-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | handles the driver power state setup v2: squash in the following: - handle negative temperature ranges - add vega12 thermal ranges - use ffs/fls - remove ACG code - resend NumOfDisplays message - correct max dpm levels - remove power containment settings - fix warnings - add sensors interface - delete unused overdrive arbiter - drop get_temperature callback - smu table cleanup - atomfirmware smu dpm table updates v3: rebase v4: rebase Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Replace function/struct name cz_* with smu8_*Rex Zhu2018-03-151-4/+4
| | | | | | | | | | hw ip smu8 was used on CZ/ST, so use smu8 as the prefix of the function/struct name in powerplay. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Remove wrapper layer of smu ip functionsRex Zhu2018-03-151-38/+12
| | | | | | | | | | | 1. delete amdgpu_powerplay.c used for wrapping smu ip functions 2. delete struct pp_instance, 3. make struct hwmgr as the smu hw handle. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Move helper functions to smu_help.cRex Zhu2018-03-151-509/+4
| | | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Replace rv_* with smu10_*Rex Zhu2018-03-151-3/+3
| | | | | | | | | Powerplay is for the hw ip smu, for RV, smu10 is used, so use smu10 as the prefix of the files name/function name. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Add #ifdef checks for CONFIG_ACPIRex Zhu2018-03-071-0/+2
| | | | | | | | Fix compiling error when CONFIG_ACPI not enabled. Change-Id: I5f901adbc799c10b30e5ea79f8f44760e749fae1 Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
* drm/amd/pp: Add auto power profilng switch based on workloads (v2)Rex Zhu2018-03-071-0/+16
| | | | | | | | | | | | | | | | | | Add power profiling mode dynamic switch based on the workloads. Currently, support Cumpute, VR, Video, 3D,power saving with Cumpute have highest prority, power saving have lowest prority. in manual dpm mode, driver will stop auto switch, just save the client's requests. user can set power profiling mode through sysfs. when exit manual dpm mode, driver will response the client's requests. switch based on the client's prority. v2: squash in fixes from Rex Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Add a helper to set field in u32Rex Zhu2018-03-051-0/+16
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Remove cgs_query_system_infoRex Zhu2018-03-051-39/+15
| | | | | | | | Get gpu info through adev directly in powerplay Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Use amdgpu acpi helper functions in powerplayRex Zhu2018-03-051-3/+1
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Refine powerplay instanceRex Zhu2018-03-051-3/+4
| | | | | | | | | Include adev in powerplay instance. so can visit adev directly instand of through cgs interface. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Disable OD feature on APU/IcelandRex Zhu2018-02-191-0/+4
| | | | | | | | | Not supported on APUs or Iceland. and still not enabled on CI. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Add a new pp feature mask bit for OD featureRex Zhu2018-02-191-0/+3
| | | | | | | | | | | | when this bit was set on module load, driver will allow the user over/under gpu clock and voltage through sysfs. by default, this bit was not set. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: Add a helper to convert VID to voltage valueRex Zhu2018-02-191-0/+5
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: removed hwmgr_handle_task unused parameter and given a ↵Evan Quan2018-02-191-5/+3
| | | | | | | | | | better name for other parameter Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: remove unused parameter of phm_start_thermal_controller (v2)Evan Quan2018-02-191-2/+2
| | | | | | | | | | Unused. v2: squash in warning fix (Harry) Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/pp: delete repeated call of force_dpm_levelRex Zhu2017-12-191-0/+1
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: fix mclk can't switch on TongaRex Zhu2017-10-061-1/+0
| | | | | | | | | | regression issue caused by commit 47047263c52779f1f3393c32e3e53661b53a372e ("drm/amd/powerplay: delete eventmgr related files.") Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use designated initialiser for thermal_irq_src.Dave Airlie2017-09-281-3/+3
| | | | | | | | This fixes the 0-day build warning. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add new helper functions in hwmgr.hRex Zhu2017-09-261-3/+39
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: refine powerplay code.Rex Zhu2017-09-261-1/+18
| | | | | | | | | delete struct smumgr, put smu backend function table in struct hwmgr Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: refine interface in struct pp_smumgr_funcRex Zhu2017-09-261-1/+1
| | | | | | | | | unify to use struct hwmgr as function parameter in smumgr. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add register thermal interrupt in hwmgr_hw_initEric Huang2017-09-261-1/+74
| | | | | | Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: Add support for CI asics to hwmgrRex Zhu2017-09-261-25/+32
| | | | | | | | | Add support for CI asics (Bonaire, Hawaii) to the powerplay hwmgr Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: delete dead code in powerplayRex Zhu2017-09-181-12/+0
| | | | | | | | delete functiontable related codes Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: refine code for thermal control in powerplayRex Zhu2017-09-181-0/+1
| | | | | | | | | add function point start_thermal_controller in hwmgr, delete thermal function table and related functions Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: Fix psm_set_user_performance_state()Tom St Denis2017-09-121-2/+2
| | | | | | | | | | | | | | We now pass a pointer to a pointer which seems to be what they meant in the first place. The previous version was modifying a pointer passed by value. Fixes bug that was introduced by commit 332798d40c2e91:drm/amd/powerplay: delete eventmgr layer in poweprlay Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-By: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: delete eventmgr layer in poweprlayRex Zhu2017-09-121-78/+136
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: fix coding style in hwmgr.cRex Zhu2017-08-151-7/+7
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: refine dmesg info under powerplay.Rex Zhu2017-08-151-7/+6
| | | | | | | | Use pr_debug to prevent spamming unimportant dmesg. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>