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path: root/drivers/gpu/drm/i915/display/icl_dsi.c
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* drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate()Jani Nikula2019-12-111-4/+4
* drm/i915/dsi: abstract afe_clk calculationJani Nikula2019-12-111-5/+13
* drm/i915/dsi: set pipe_bpp on ICL configure configJani Nikula2019-12-111-0/+5
* drm/i915/display/dsi: Add support to pipe DJosé Roberto de Souza2019-11-131-0/+6
* drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.Maarten Lankhorst2019-11-011-3/+3
* drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw.Maarten Lankhorst2019-11-011-6/+6
* drm/i915: Simplify pipe_mask setup even furtherVille Syrjälä2019-10-311-3/+1
* drm/i915: Allow ICL+ DSI on any pipeVille Syrjälä2019-10-311-1/+3
* drm/i915: s/crtc_mask/pipe_mask/Ville Syrjälä2019-10-311-1/+1
* drm/i915: Wrappers for display register waitsDaniele Ceraolo Spurio2019-08-161-7/+4
* drm/i915/tgl/dsi: Enable blanking packets during BLLP for video modeVandita Kulkarni2019-08-081-0/+5
* drm/i915/tgl/dsi: Gate the ddi clocks after pll mappingVandita Kulkarni2019-08-081-2/+8
* drm/i915/tgl/dsi: Do not override TA_SUREVandita Kulkarni2019-08-081-12/+14
* drm/i915/tgl/dsi: Set latency PCS_DW1 for tglVandita Kulkarni2019-08-081-2/+2
* drm/i915/tgl/dsi: Program TRANS_VBLANK registerVandita Kulkarni2019-08-081-0/+9
* drm/i915/dsi: remove set but not used variable 'hfront_porch'YueHaibing2019-07-191-3/+1
* drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespaceMatt Roper2019-07-101-68/+59
* drm/i915/gen11: Program ICL_DPCLKA_CFGCR0 according to PHYMatt Roper2019-07-101-13/+20
* drm/i915: Add icl mipi dsi propertiesVandita Kulkarni2019-07-091-0/+22
* drm/i915/ehl/dsi: Enable AFE over PPI strapJosé Roberto de Souza2019-06-201-0/+8
* drm/i915/ehl/dsi: Set lane latency optimization for DW1Vandita Kulkarni2019-06-201-0/+13
* drm/i915: move modesetting output/encoder code under display/Jani Nikula2019-06-171-0/+1589
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