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* gpu: ipu-v3: Register the CSI modulesPhilipp Zabel2014-06-041-5/+32
| | | | | | | This patch registers the two CSI platform devices per IPU. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add CSI and SMFC module enable wrappersPhilipp Zabel2014-06-041-0/+24
| | | | | | | | IPU_CONF_..._EN bits are implementation details, not to be made public. Add wrappers around ipu_module_enable/disable, so the CSI V4L2 driver can enable/disable the CSI and SMFC modules. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add ipu_idmac_get_current_buffer functionPhilipp Zabel2014-06-041-0/+9
| | | | | | | | This function returns the currently active buffer (0 or 1) of a double buffered IDMAC channel. It is to be used by the CSI driver. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add SMFC codePhilipp Zabel2014-06-044-1/+114
| | | | | | | The Sensor Multi Fifo Controller (SMFC) is used as a buffer between the two CSIs (writing simultaneously) and up to four IDMAC channels. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Move i.MX IPUv3 core driver out of stagingPhilipp Zabel2014-06-048-0/+3371
The i.MX Image Processing Unit (IPU) contains a number of image processing blocks that sit right in the middle between DRM and V4L2. Some of the modules, such as Display Controller, Processor, and Interface (DC, DP, DI) or CMOS Sensor Interface (CSI) and their FIFOs could be assigned to either framework, but others, such as the dma controller (IDMAC) and image converter (IC) can be used by both. The IPUv3 core driver provides an internal API to access the modules, to be used by both DRM and V4L2 IPUv3 drivers. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>