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* gpu: ipu-v3: Stop overwriting pdev->dev.of_node of child devicesPhilipp Zabel2017-02-171-6/+0
| | | | | | | | | Setting dev->of_node changes the modalias and breaks module autoloading. Since there is an of_node field in the platform data passed to child devices, we don't even need this anymore. Suggested-by: Russell King <linux@armlinux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: export ipu_csi_set_downsizePhilipp Zabel2017-02-171-0/+1
| | | | | | | | | This function will be used by the media drivers and needs to be exported to allow them to be built as modules. Reported-by: Russell King <linux@armlinux.org.uk> Fixes: 867341b95891 ("gpu: ipu-v3: add ipu_csi_set_downsize") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'imx-drm-next-2016-11-10' of ↵Dave Airlie2016-11-114-38/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.pengutronix.de/git/pza/linux into drm-next imx-drm plane update cleanup, YUV formats - request modeset if plane offsets changed, only the plane base address can be changed without disabling the plane IDMAC channel. - cleanup of plane atomic_update - remove unused ipu_cpmem_set_yuv_planar function - support YUV 4:4:4, 4:2:2, NV12 and NV16 plane formats - not only mask interrupts during irq init, also clear them - remove a legacy check from imx-ldb - add support to set the CSI downsizing bits - silence an obnoxious warning during modeset * tag 'imx-drm-next-2016-11-10' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-di: silence videomode logspam gpu: ipu-v3: add ipu_csi_set_downsize drm/imx: imx-ldb: remove unnecessary double disable check gpu: ipu-v3: initially clear all interrupts drm/imx: ipuv3-plane: add support for YUV 4:2:2 and 4:4:4, NV12, and NV16 formats gpu: ipu-v3: add YUV 4:4:4 support gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar function drm/imx: ipuv3-plane: let drm_plane_state_to_ubo/vbo handle chroma subsampling other than 4:2:0 drm/imx: ipuv3-plane: merge ipu_plane_atomic_set_base into atomic_update drm/imx: ipuv3-plane: request modeset if plane offsets changed
| * gpu: ipu-di: silence videomode logspamLucas Stach2016-11-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Adapting the videomode to the hardware constraints is something that can and must happen during normal operation and isn't something that the user can avoid. So printing a warning each time it happens isn't helpful. Demote this message to the debug level. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: add ipu_csi_set_downsizePhilipp Zabel2016-11-071-0/+16
| | | | | | | | | | | | Support downsizing to 1/2 width and/or height in the CSI. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: initially clear all interruptsPhilipp Zabel2016-10-201-1/+4
| | | | | | | | | | | | | | | | | | If we want to stop resetting the IPU in the future, masking all interrupts before registering the irq handlers will not be enough to avoid spurious interrupts. We also have to clear them. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Liu Ying <gnuiyl@gmail.com>
| * gpu: ipu-v3: add YUV 4:4:4 supportPhilipp Zabel2016-10-202-0/+9
| | | | | | | | | | | | | | | | The IDMAC does support reading and writing DRM_FORMAT_YUV444 and DRM_FORMAT_YVU444. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Liu Ying <gnuiyl@gmail.com>
| * gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar functionPhilipp Zabel2016-10-201-36/+0
| | | | | | | | | | | | | | | | ipu_cpmem_set_yuv_planar_full is only used directly, remove the wrapper. Suggested-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Liu Ying <gnuiyl@gmail.com>
* | Backmerge tag 'v4.9-rc4' into drm-nextDave Airlie2016-11-071-1/+1
|\| | | | | | | | | | | Linux 4.9-rc4 This is needed for nouveau development.
| * gpu: ipu-v3: Use ERR_CAST instead of ERR_PTR(PTR_ERR())Wei Yongjun2016-10-171-1/+1
| | | | | | | | | | | | | | | | | | Use ERR_CAST inlined function instead of ERR_PTR(PTR_ERR(...)). Generated by: scripts/coccinelle/api/err_cast.cocci Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: Remove depends on RESET_CONTROLLER when not a providerStephen Boyd2016-10-191-1/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These GPU drivers only depend on the RESET_CONTROLLER config option to fix build issues that existed when there weren't stub reset APIs for reset controller consumers. Given that these drivers aren't providing any reset controllers themselves, they don't actually depend on the API to build (just to function) so they don't need to depend on it. Remove the dependency to fix recursive build errors like the following: drivers/usb/Kconfig:39:error: recursive dependency detected! drivers/usb/Kconfig:39: symbol USB is selected by MOUSE_APPLETOUCH drivers/input/mouse/Kconfig:187: symbol MOUSE_APPLETOUCH depends on INPUT drivers/input/Kconfig:8: symbol INPUT is selected by VT drivers/tty/Kconfig:12: symbol VT is selected by FB_STI drivers/video/fbdev/Kconfig:674: symbol FB_STI depends on FB drivers/video/fbdev/Kconfig:5: symbol FB is selected by DRM_KMS_FB_HELPER drivers/gpu/drm/Kconfig:42: symbol DRM_KMS_FB_HELPER is selected by DRM_KMS_CMA_HELPER drivers/gpu/drm/Kconfig:98: symbol DRM_KMS_CMA_HELPER is selected by DRM_IMX drivers/gpu/drm/imx/Kconfig:1: symbol DRM_IMX depends on IMX_IPUV3_CORE drivers/gpu/ipu-v3/Kconfig:1: symbol IMX_IPUV3_CORE depends on RESET_CONTROLLER drivers/reset/Kconfig:4: symbol RESET_CONTROLLER is selected by USB_CHIPIDEA drivers/usb/chipidea/Kconfig:1: symbol USB_CHIPIDEA depends on USB_EHCI_HCD drivers/usb/host/Kconfig:84: symbol USB_EHCI_HCD depends on USB Cc: Arnd Bergmann <arnd@arndb.de> Cc: <dri-devel@lists.freedesktop.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Mark Yao <mark.yao@rock-chips.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: robdclark@gmail.com Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161018205719.20575-1-stephen.boyd@linaro.org
* gpu: ipu-v3: Add queued image conversion supportSteve Longerbeam2016-09-194-1/+1725
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements image conversion support using the IC tasks, with tiling to support scaling to and from images up to 4096x4096. Image rotation is also supported. Image conversion requests are added to a run queue under the IC tasks. The internal API is subsystem agnostic (no V4L2 dependency except for the use of V4L2 fourcc pixel formats). Callers prepare for image conversion by calling ipu_image_convert_prepare(), which initializes the parameters of the conversion. The caller passes in the ipu and IC task to use for the conversion, the input and output image formats, a rotation mode, and a completion callback and completion context pointer: struct ipu_image_converter_ctx * ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task, struct ipu_image *in, struct ipu_image *out, enum ipu_rotate_mode rot_mode, ipu_image_converter_cb_t complete, void *complete_context); A new conversion context is created that is added to an IC task context queue. The caller is given the new conversion context, which can then be passed to the further APIs: int ipu_image_convert_queue(struct ipu_image_converter_run *run); This queues the given image conversion request run to a run queue, and starts the conversion immediately if the run queue is empty. Only the physaddr's of the input and output image buffers are needed, since the conversion context was created previously with ipu_image_convert_prepare(). When the conversion completes, the run pointer is returned to the completion callback. void ipu_image_convert_abort(struct ipu_image_converter_ctx *ctx); This will abort any active or pending conversions for this context. Any currently active or pending runs belonging to this context are returned via the completion callback with an error status. void ipu_image_convert_unprepare(struct ipu_image_converter_ctx *ctx); Unprepares the conversion context. Any active or pending runs will be aborted by calling ipu_image_convert_abort(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add ipu_rot_mode_is_irt()Steve Longerbeam2016-09-191-1/+1
| | | | | | | | Add a macro that returns boolean true if the given ipu_rotate_mode requires the use of the Image Rotator. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: fix a possible NULL dereferenceLABBE Corentin2016-09-191-3/+3
| | | | | | | | | | | | | | | of_match_device could return NULL, and so cause a NULL pointer dereference later. For fixing this problem, we use of_device_get_match_data(), this will simplify the code a little by using a standard function for getting the match data. Testing the return value of of_device_get_match_data is also necessary for avoiding a second NULL deref later on devtype. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add FSU channel linking supportSteve Longerbeam2016-08-292-0/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds functions to link and unlink source channels to sink channels in the FSU: int ipu_fsu_link(struct ipu_soc *ipu, int src_ch, int sink_ch); int ipu_fsu_unlink(struct ipu_soc *ipu, int src_ch, int sink_ch); The channels numbers are usually IDMAC channels, but they can also be channels that do not transfer data to or from memory. The following convenience functions can be used in place of ipu_fsu_link/unlink() when both source and sink channels are IDMAC channels: int ipu_idmac_link(struct ipuv3_channel *src, struct ipuv3_channel *sink); int ipu_idmac_unlink(struct ipuv3_channel *src, struct ipuv3_channel *sink); So far the following links are supported: IPUV3_CHANNEL_IC_PRP_ENC_MEM -> IPUV3_CHANNEL_MEM_ROT_ENC PUV3_CHANNEL_IC_PRP_VF_MEM -> IPUV3_CHANNEL_MEM_ROT_VF IPUV3_CHANNEL_IC_PP_MEM -> IPUV3_CHANNEL_MEM_ROT_PP IPUV3_CHANNEL_CSI_DIRECT -> IPUV3_CHANNEL_CSI_VDI_PREV More links can be added to the fsu_link_info[] array. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add Video Deinterlacer unitSteve Longerbeam2016-08-294-1/+261
| | | | | | | Adds the Video Deinterlacer (VDIC) unit. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Do not wait for DMFC FIFO to clear when disabling DMFC channelLiu Ying2016-08-291-17/+1
| | | | | | | | | | | | | | | | | | According to basic tests, it looks there is no issue if we don't wait for DMFC FIFO to clear when disabling DMFC channel. NXP BSP doesn't do that, either. This patch is needed to avoid the annoying warning caused by a timeout on waiting for the FIFO to clear after we add the new DRM_PLANE_COMMIT_NO_DISABLE_AFTER_MODESET flag to the imx-drm driver which changes the procedure to disable display channel slightly. Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: David Airlie <airlied@linux.ie> Cc: Russell King <linux@armlinux.org.uk> Cc: Peter Senna Tschudin <peter.senna@gmail.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: rename CSI client deviceSteve Longerbeam2016-08-081-2/+2
| | | | | | | | Rename the CSI client device in the client_reg[] table to "imx-ipuv3-csi". Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Fix IRT usageSteve Longerbeam2016-08-081-9/+31
| | | | | | | | | | There can be multiple IC tasks using the IRT, so the IRT needs a separate use counter. Create a private ipu_irt_enable() to enable the IRT module when any IC task requires rotation, and ipu_irt_disable() when a task no longer needs the IRT. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Fix CSI data format for 16-bit media bus formatsSteve Longerbeam2016-08-081-5/+1
| | | | | | | | | | The CSI data format was being programmed incorrectly for the 1x16 media bus formats. The CSI data format for 16-bit must be bayer/generic (CSI_SENS_CONF_DATA_FMT_BAYER). Suggested-by: Carsten Resch <Carsten.Resch@de.bosch.com> Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: set correct full sensor frame for PAL/NTSCSteve Longerbeam2016-08-081-7/+13
| | | | | | | | Set the sensor full frame based on whether the passed in mbus_fmt is 720x480 (NTSC) or 720x576 (PAL). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: Add ipu_get_num()Steve Longerbeam2016-08-082-0/+9
| | | | | | | Adds of-alias id to ipu_soc and retrieve with ipu_get_num(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-cpmem: Add ipu_cpmem_get_burstsize()Steve Longerbeam2016-08-081-0/+6
| | | | | | | Adds ipu_cpmem_get_burstsize(). Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-cpmem: Add ipu_cpmem_set_uv_offset()Steve Longerbeam2016-08-081-0/+7
| | | | | | | Adds ipu_cpmem_set_uv_offset(), to set planar U/V offsets. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: ipu-dc: don't bug out on invalid bus_formatPhilipp Zabel2016-07-121-3/+3
| | | | | | | | | If imx-drm is combined with a bridge or panel that requests an unsupported format, warn and use a default mapping instead of hanging the machine. The worst that can happen here are wrong colors. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* drm/imx: atomic phase 1: Use transitional atomic CRTC and plane helpersLiu Ying2016-07-122-7/+1
| | | | | | | | | | | | | Use the drm_plane_helper_update/disable() and drm_helper_crtc_mode_set() transitional atomic helpers. The crtc->mode_set_nofb callback is added so that the primary plane is no longer tied to the CRTC. Check/update logics are separated to make sure crtc->mode_set_nofb and plane->atomic_update are always successful. Also, some necessary logics are tweaked for a smooth transition. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: ipu-dmfc: Use static DMFC FIFO allocation mechanismLiu Ying2016-07-121-206/+7
| | | | | | | | | | | | For all video modes we support currently, we always get 2 slots for a plane by using the current existing dynamic DMFC FIFO allocation mechanism. So, let's change to use the static one to simplify the code. This also makes it easier to implement the atomic mode setting as we don't need to handle allocation failure cases then. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* drm/imx: Match imx-ipuv3-crtc components using device node in platform dataPhilipp Zabel2016-05-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The component master driver imx-drm-core matches component devices using their of_node. Since commit 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading"), the imx-ipuv3-crtc dev->of_node is not set during probing. Before that, of_node was set and caused an of: modalias to be used instead of the platform: modalias, which broke module autoloading. On the other hand, if dev->of_node is not set yet when the imx-ipuv3-crtc probe function calls component_add, component matching in imx-drm-core fails. While dev->of_node will be set once the next component tries to bring up the component master, imx-drm-core component binding will never succeed if one of the crtc devices is probed last. Add of_node to the component platform data and match against the pdata->of_node instead of dev->of_node in imx-drm-core to work around this problem. Cc: <stable@vger.kernel.org> # 4.4.x Fixes: 950b410dd1ab ("gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloading") Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Lothar Waßmann <LW@KARO-electronics.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Chris Ruehl <chris.ruehl@gtsys.com.hk>
* gpu: ipu-v3: Fix imx-ipuv3-crtc module autoloadingPhilipp Zabel2016-05-051-1/+6
| | | | | | | | | | | | | | | If of_node is set before calling platform_device_add, the driver core will try to use of: modalias matching, which fails because the device tree nodes don't have a compatible property set. This patch fixes imx-ipuv3-crtc module autoloading by setting the of_node property only after the platform modalias is set. Fixes: 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports") Reported-by: Dennis Gilmore <dennis@ausil.us> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-By: Dennis Gilmore <dennis@ausil.us> Cc: stable@vger.kernel.org # 4.4+ Signed-off-by: Dave Airlie <airlied@redhat.com>
* gpu: ipu-v3: ipu-dmfc: Rename ipu_dmfc_init_channel to ipu_dmfc_config_wait4eotLiu Ying2016-03-311-2/+2
| | | | | | | | | The function name 'ipu_dmfc_config_wait4eot' matches the implementation of the function better than 'ipu_dmfc_init_channel', since it only touches the wait4eot bits. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: ipu-dmfc: Make function ipu_dmfc_init_channel() return voidLiu Ying2016-03-311-3/+1
| | | | | | | | Since the function ipu_dmfc_init_channel() always returns zero, we may change the return type to void to simplify the code. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-v3: ipu-dmfc: Protect function ipu_dmfc_init_channel() with mutexLiu Ying2016-03-311-0/+4
| | | | | | | | | | | To avoid race condition issue, we should protect the function ipu_dmfc_init_channel() with the mutex dmfc->priv->mutex, since it configures the register DMFC_GENERAL1 at runtime which contains several control bits for various display channels. This matches better with fine grained locking logic in upper layer. Signed-off-by: Liu Ying <gnuiyl@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* gpu: ipu-cpmem: modify ipu_cpmem_set_yuv_planar_full for better controlPhilipp Zabel2016-03-311-43/+36
| | | | | | | | Let ipu_cpmem_set_yuv_planar_full take a DRM_FORMAT instead of a V4L2_PIXFMT and allow better control over U/V stride, U offset and V offset settings in the CPMEM. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge drm-fixes into drm-next.Dave Airlie2016-03-141-14/+17
|\ | | | | | | Nouveau wanted this to avoid some worse conflicts when I merge that.
| * gpu: ipu-v3: Reset IPU before activating IRQDavid Jander2016-02-101-5/+5
| | | | | | | | | | | | | | | | | | If we don't come out of a clean reset, make sure no IRQ is fired before everything is setup by resetting the IPU before activating the interrupt handlers. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: Do not bail out on missing optional port nodesPhilipp Zabel2016-02-101-9/+12
| | | | | | | | | | | | | | | | | | The port nodes are documented as optional, treat them accordingly. Reported-by: Martin Fuzzey <mfuzzey@parkeon.com> Reported-by: Chris Healy <Chris.Healy@zii.aero> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Fixes: 304e6be652e2 ("gpu: ipu-v3: Assign of_node of child platform devices to corresponding ports")
* | gpu: ipu-v3: ipu-dc: Simplify display controller microcode setupPhilipp Zabel2016-03-011-27/+26
|/ | | | | | | | | | This cleans up the display controller microcode setup in ipu_dc_init_sync a little bit. The microcode template words for DI0 and DI1 are properly separated to avoid a clash when DI1 is active in interlaced mode at the same time as DI0 in non-interlaced mode. A comment is added to explain the meaning of the sync counter. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge branch 'patchwork' into v4l_for_linusMauro Carvalho Chehab2016-01-111-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * patchwork: (204 commits) [media] rc: sunxi-cir: Initialize the spinlock properly [media] rtl2832: do not filter out slave TS null packets [media] rtl2832: print reg number on error case [media] rtl28xxu: return demod reg page from driver cache [media] coda: enable MPEG-2 ES decoding [media] coda: don't start streaming without queued buffers [media] coda: hook up vidioc_prepare_buf [media] coda: relax coda_jpeg_check_buffer for trailing bytes [media] coda: make to_coda_video_device static [media] s5p-mfc: remove volatile attribute from MFC register addresses [media] s5p-mfc: merge together s5p_mfc_hw_call and s5p_mfc_hw_call_void [media] s5p-mfc: use spinlock to protect MFC context [media] s5p-mfc: remove unnecessary callbacks [media] s5p-mfc: make queue cleanup code common [media] s5p-mfc: use one implementation of s5p_mfc_get_new_ctx [media] s5p-mfc: constify s5p_mfc_codec_ops structures [media] au8522: Avoid memory leak for device config data [media] ir-lirc-codec.c: don't leak lirc->drv-rbuf [media] uvcvideo: small cleanup in uvc_video_clock_update() [media] uvcvideo: Fix reading the current exposure value of UVC ...
| * drm, ipu-v3: use https://linuxtv.org for LinuxTV URLMauro Carvalho Chehab2015-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | While https was always supported on linuxtv.org, only in Dec 3 2015 the website is using valid certificates. As we're planning to drop pure http support on some future, change the references at DRM include and at the ipu-v3 driver to point to the https://linuxtv.org URL instead. Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
* | gpu: ipu-v3: Assign of_node of child platform devices to corresponding portsPhilipp Zabel2015-11-241-18/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | The crtc child device driver shouldn't have to modify the of_node of its platform device in the probe function. Instead, let the IPU core driver set the of_node when the platform device is created. Also reorder the client_reg array so the elements are in port id order (CSIs first, then DIs). Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | gpu: ipu-v3: Remove reg_offset fieldPhilipp Zabel2015-11-241-16/+3
|/ | | | | | This is not used, so remove it. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'imx-drm-next-2015-10-30' of ↵Dave Airlie2015-11-053-6/+91
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.pengutronix.de/git/pza/linux into drm-next imx-drm fixes and color format updates - Some correctness fixes found by coccinelle - Add drivers/gpu/ipu-v3 directory to MAINTAINERS - Add support for more color formats - Fix a regression, making displays larger than FullHD work again * tag 'imx-drm-next-2015-10-30' of git://git.pengutronix.de/git/pza/linux: drm/imx: hdmi: fix HDMI setup to allow modes larger than FullHD gpu: ipu-v3: fix div_ratio type gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors. drm/imx: enable ARGB4444 16-bit color format gpu: ipu-v3: add support for ARGB4444 16-bit color format drm/imx: ipuv3-plane: enable support for RGBX8888 and RGBA8888 pixel formats gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formats drm/imx: enable 15-bit RGB with 1-bit alpha formats gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formats MAINTAINERS: Add IPUv3 core driver to the i.MX DRM driver section gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to false
| * gpu: ipu-v3: fix div_ratio typeAndrzej Hajda2015-10-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The variable can be negative. The problem has been detected using proposed semantic patch scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576 Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: csi: add support for 8 bpp grayscale sensors.Philippe De Muyter2015-10-301-0/+1
| | | | | | | | | | | | | | Enable the MEDIA_BUS_FMT_Y8_1X8 format. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: add support for ARGB4444 16-bit color formatLucas Stach2015-10-302-0/+12
| | | | | | | | | | | | | | This patch adds support for the ARGB4444 color format. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: add support for RGBX8888 and RGBA8888 pixel formatsPhilipp Zabel2015-10-301-4/+28
| | | | | | | | | | | | | | This patch adds support for the RGBA8888, RGBX8888, BGRA8888, and BGRX8888 in-memory formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: add support for 15-bit RGB with 1-bit alpha formatsPhilipp Zabel2015-10-302-0/+48
| | | | | | | | | | | | | | This patch adds support for ARGB1555, ABGR1555, RGBA5551, and BGRA5551 in-memory formats. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * gpu: ipu-v3: ipu-csi: bool test doesn't need a comparison to falseFabio Estevam2015-10-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bool initializations should use true and false. Bool tests don't need comparisons. Based on contributions from Joe Perches, Rusty Russell and Bruce W Allan. The semantic patch that makes this change is available in scripts/coccinelle/misc/boolinit.cocci. More information about semantic patching is available at http://coccinelle.lip6.fr/ Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | gpu: imx: fix support for interlaced modesRussell King2015-10-062-46/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The support for interlaced video modes seems to be broken; we don't use anything other than the vtotal/htotal from the timing information to define the various sync counters. Freescale patches for interlaced video support contain an alternative sync counter setup, which we include here. This setup produces the hsync and vsync via the normal counter 2 and 3, but moves the display enable signal from counter 5 to counter 6. Therefore, we need to change the display controller setup as well. The corresponding Freescale patches for this change are: iMX6-HDMI-support-interlaced-display-mode.patch IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch This produces a working interlace format output from the IPU. Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | gpu: imx: simplify sync polarity settingRussell King2015-10-061-22/+28
|/ | | | | | | | | | Use a function to convert the sync pin to a bit mask for the DI_GENERAL register, and move this out of the interlace/non-interlace path to the common path. Tested-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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