summaryrefslogtreecommitdiffstats
path: root/drivers/hwmon
Commit message (Collapse)AuthorAgeFilesLines
...
| * hwmon: (f71882fg) Add support for F71858AD (0x0903)Aleksander Mazur2022-07-131-0/+2
| | | | | | | | | | | | | | | | | | | | Treat F71858AD like F71858FG. Tested on Igel D220. Signed-off-by: Aleksander Mazur <deweloper@wp.pl> Link: https://lore.kernel.org/r/20220605012114.3d85a75a@mocarz Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (pmbus) Add support for Analog Devices LT7182SGuenter Roeck2022-07-133-0/+205
| | | | | | | | | | | | | | Add support for Analog Devices LT7182S Dual Channel 6A, 20V PolyPhase Step-Down Silent Switcher with Digital Power System Management. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (pmbus) Add IEEE 754 half precision support to PMBus coreGuenter Roeck2022-07-132-5/+139
| | | | | | | | | | | | | | Add support for the IEEE 754 half precision data format as specified in PMBus v1.3.1. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Support temp_samples attributeGuenter Roeck2022-07-131-14/+91
| | | | | | | | | | | | | | | | | | | | Several of the chips supported by this driver support configuring the number of samples (or the fault queue depth) necessary before a fault or alarm is reported. This is done either with a bit in the configuration register or with a separate "consecutive alert" register. Support this functionality with the temp_samples attribute. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add table with supported Analog/ONSEMI devicesGuenter Roeck2022-07-131-0/+36
| | | | | | | | | | | | | | Add table with device names and known register values for supported devices from Analog / ON Semiconductor. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support and detection of Philips/NXP NE1618Guenter Roeck2022-07-132-13/+33
| | | | | | | | | | | | | | NE1618 is similar to NE1617 but supports manufacturer and chip ID registers as well as 11 bit external temperature resolution. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add explicit support for ADM1020Guenter Roeck2022-07-132-3/+11
| | | | | | | | | | | | | | ADM1020 is compatible with ADM1021 but has a separate chip revision and a limited I2C address range. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Only disable alerts if not already disabledGuenter Roeck2022-07-131-2/+4
| | | | | | | | | | | | | | | | It was observed that the alert handler may be called from the i2c core even after alerts have already been disabled. Only disable alerts if they have not already been disabled. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for ADT7421Guenter Roeck2022-07-131-1/+9
| | | | | | | | | | | | | | | | | | | | | | ADT7421 is similar to ADT7461A but supports configurable Beta Compensation. Packet Error Checking (PEC) is supported but undocumented. A devicetree node is not added for the added chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for ON Semiconductor NCT218Guenter Roeck2022-07-132-3/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | NCT218 is compatible to NCT72 and NCT214. It also supports PEC (packet error checking). Similar to NCT72 and NCT214, PEC support is undocumented. Unlike NCT214 and NCT72, NCT218 does not support the undocumented secondary chip and manufacturer ID registers at 0x3e and 0x3f and returns 0x00 when reading those registers. The value for the chip revision register is not documented but was observed to be 0xca. Use that information to improve chip detection accuracy. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for ON Semiconductor NCT214 and NCT72Guenter Roeck2022-07-132-2/+36
| | | | | | | | | | | | | | | | | | | | | | NCT214 and NCT72 are compatible to ADT7461/ADT7461A but have full PEC (packet error checking) support. PEC support is undocumented. Both chips support the undocumented secondary chip and manufacturer ID registers at 0x3e and 0x3f, and return 0x61 as chip ID. Use this information to improve the accuracy of chip detection code. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add explicit support for NCT210Guenter Roeck2022-07-132-3/+17
| | | | | | | | | | | | | | | | Unlike ADM1023 and compatible chips, NCT210 does not support a temperature offset register. A real chip was found to have a chip revision of 0x3f. Use it to detect NCT210 explicitly. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Combine lm86 and lm90 configurationGuenter Roeck2022-07-131-12/+5
| | | | | | | | | | | | | | | | LM86 and LM90 support exactly the same features, so there is no need to keep their configuration options separate. Combine to reduce data size. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add remaining chips supported by adm1021 driverGuenter Roeck2022-07-132-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All chips supported by the ADM1021 driver are also supported by the LM90 driver. Make that support official. After this change, the adm1021 driver is only needed if the lm90 driver is disabled. Also, the adm1021 driver misdetects a variety of chips as MAX1617A, which is unwanted if any of those chips is in the system. For this reason. make the adm1021 driver dependent on !SENSORS_LM90 to show that it is not needed if the lm90 driver is enabled, and to avoid misdetection if a chip supported by the lm90 driver is in the system. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for ADM1021, ADM1021A, and ADM1023Guenter Roeck2022-07-132-7/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both chips are quite similar to other chips of this series, so add support for them to the lm90 driver. Also mention ON Semiconductor NCT210, which is pin and register compatible to ADM1021A. None of the chips support the secondary manufacturer and chip ID registers at 0x3e and 0x3f, but return 0 when reading from those registers. Use that information to improve the accuracy of chip detection code. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Support MAX1617 and LM84Guenter Roeck2022-07-132-39/+234
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MAX1617 and LM84 are stripped-down versions of LM90, so they can easily be supported by the LM90 driver. The most difficult part is chip detection, since those old chips do not support manufacturer ID or chip ID registers. The "alarms" attribute is enabled for both chips to match the functionality of the adm1021 driver. Chip detection was improved and is less prone to misdetection than the chip detection in the adm1021 driver. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Introduce 16-bit register write functionGuenter Roeck2022-07-131-14/+19
| | | | | | | | | | | | | | Introduce 16-bit register write function to simplify the code in some places. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Let lm90_read16() handle 8-bit read operationsGuenter Roeck2022-07-131-30/+17
| | | | | | | | | | | | | | | | Simplify the code a bit by handling single-register read operations in lm90_read16(). All we need to do is to skip the low-byte read operation if the register address is 0. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for MAX6642Guenter Roeck2022-07-132-16/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MAX6642 is a reduced version of LM90 with no low limits and no conversion rate register. Its alert functionality is broken, similar to many other chips supported by the lm90 driver. After this change, the stand-alone max6642 driver is only needed if the lm90 driver is disabled. Make it dependent on SENSORS_LM90=n to show that it is not needed if the lm90 driver is enabled. A devicetree node is not added for this chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add flag to indicate conversion rate supportGuenter Roeck2022-07-131-27/+39
| | | | | | | | | | | | | | A flag indicating support for setting the conversion rate doesn't cost much and will enable us to add support for MAX6642 to the lm90 driver. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add flag to indicate support for minimum temperature limitsGuenter Roeck2022-07-131-23/+31
| | | | | | | | | | | | | | A flag indicating support for minimum temperature limits doesn't cost much and will enable us to add support for MAX6642 to the lm90 driver. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for MAX6690Guenter Roeck2022-07-131-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | MAX6690 is all but identical to MAX6654. Revision 1 of its datasheet lists the same chip ID as MAX6654, and a chip labeled MAX6654 was found to have the chip ID listed as MAX6690 chip ID in Revision 2 of its datasheet. A devicetree node is not added for this chip since it is quite unlikely that such an old chip will ever be used in a devicetree based system. It can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Strengthen chip detection for ADM1032, ADT7461(A), and NCT1008Guenter Roeck2022-07-131-4/+8
| | | | | | | | | | | | | | | | | | ADT7461A and NCT1008 support the undocumented manufacturer and chip ID registers at 0x3e and 0x3f, and return 0x61 as chip ID. ADM1032 and ADT7461 do not support those registers but return 0 when reading them. Use this information to improve the accuracy of the chip detection code. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for ADT7481, ADT7482, and ADT7483Guenter Roeck2022-07-132-31/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ADT7481, ADT7482, and ADT7483 are similar to ADT7461, but support two external temperature sensors, similar to MAX6695/6696. They support an extended temperature range similar to ADT7461. Registers for the second external channel can be accessed directly or by using the same method as used by MAX6695/6696. For simplicity, the access method implemented for MAX6695/6696 is used. The chips support PEC (packet error checking). Set the PEC feature flag and let the user decide if it should be enabled or not (it is by default disabled). Even though it is only documented for ADT7483, all three chips support a secondary manufacturer ID register at 0x3e and a chip ID register at 0x3f. Use the contents of those registers register for improved chip detection accuracy. Add the same check to the ADT7461A detection code since this chip also supports the same (undocumented) registers. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Reviewed-by: Slawomir Stepien <sst@poczta.fm> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add explicit support for MAX6648/MAX6692Guenter Roeck2022-07-131-4/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike MAX6646/MAX6647/MAX6649, MAX6648 and MAX6692 only support a temperature range of 0..127 degrees C. Separate support for the two sets of chips to be able to support maximum temperature ranges correctly for all chips. Introduce new feature flag to indicate temperature support up to 255 degrees C. Since the chips are almost identical except for the supported temperature range, automatic chip detection is limited. Effectively this means that MAX6648 may be mis-detected as MAX6649 when auto-detected, but there is nothing we can do about that. Devicetree nodes are not added for the added chips since it is quite unlikely that such old chips will ever be used in a devicetree based system. They can be added later if needed. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add flag to indicate 'alarms' attribute supportGuenter Roeck2022-07-131-19/+38
| | | | | | | | | | | | | | | | | | We don't want to support the obsolete 'alarms' attribute for new chips supported by this driver. Add flag to indicate 'alarms' attribute support and use it for existing chips. This flag will not be set for additional chips supported by this driver in the future. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Fix/Add detection of G781-1Guenter Roeck2022-07-131-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When support for G781 was added, chips with ID 0x01 were found at I2C addresses 0x4c and 0x4d. The G781 datasheet (version 1.3 from October 2003) says that the device ID for G781-1 is 0x03, not 0x01. Also, the datasheet states that the chip at I2C address is G781 and the chip at I2C address 0x4d is G781-1. A G781-1 at I2C address 0x4d was now found to have a chip ID of 0x03 as suggested by the datasheet. Accept both 0x01 and 0x03 chip IDs at both addresses to ensure that all variants of G781 are detected properly. While at it, improve chip detection accuracy by reading two additional registers and ensuring that only expected bits are set in those registers. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for additional chip revision of NCT1008Guenter Roeck2022-07-131-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The NCT1008 datasheet, Revision 3, states that its chip revision is 0x57. This matches the ADT7461A chip revision, and NCT1008 is therefore detected as ADT7461A. In revision 6 of the datasheet, the chip revision register is no longer documented. Multiple samples of NCT1008 were found to report a chip revision of 0x54. As it turns out, one of the patches submitted to add NCT1008 support to the lm90 driver already included a check for chip revision 0x54. Unfortunately, that patch never made it into the kernel. Remedy the situation and explicitly detect chips with revision 0x54 as NCT1008. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Rework detect functionGuenter Roeck2022-07-131-143/+236
| | | | | | | | | | | | | | | | The detect function is getting larger and larger and difficult to understand or review. Split it into per-manufacturer detect functions to improve readability. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Use single flag to indicate extended temperature supportGuenter Roeck2022-07-131-15/+10
| | | | | | | | | | | | | | | | | | Since temperature conversion functions are now unified, there is no need to keep "the chip supports a configurable extended temperature range" and "the chip has extended temperature range enabled" flags separate. Use a single flag instead to reflect both. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Support multiple temperature resolutionsGuenter Roeck2022-07-131-297/+155
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While most LM90 compatible chips support a temperature sensor resolution of 11 bit, this is not the case for all chips. ADT7461 only supports a resolution of 10 bit, and TMP451/TMP461 support a resolution of 12 bit. Add support for various temperature sensor resolutions. To do this, model all temperature sensors as 16 bit sensors, and use unified temperature conversion functions which take the sensor resolution as parameter. While enhancing functionality, this has the positive side effect of reducing code size by about 5%. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Only re-read registers if volatileGuenter Roeck2022-07-131-18/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When reading 16-bit volatile registers, the code uses a trick to determine if a temperature is consistent: It reads the high part of the register twice. If the values are the same, the code assumes that the reading is consistent. If the value differs, the code re-reads the second register as well and assumes that it now has correct values. This is only necessary for volatile registers. Add a parameter to lm90_read16() to indicate if the register is volatile to avoid the extra overhead for non-volatile registers. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add support for unsigned and signed temperaturesGuenter Roeck2022-07-131-28/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ADT7461 and TMP451 temperature sensors support extended temperature ranges. If standard temperature range is selected, the temperature range is unsigned and limited to 0 .. 127 degrees C. For TMP461, the standard temperature range is -128000 ... 127000 degrees C. Distinguish between the two chips by introducing a feature flag indicating if the standard temperature range is signed or unsigned. Use the same flag for MAX6646/ MAX6647 as well since those chips also support unsigned temperatures. Note that while the datasheet for ADT7461 suggests that the default temperature range is unsigned, tests with a real chip suggest that this is not the case: If the temperature offset is set to a value << 0, the temperature register does report negative values. Tests with real chips show that MAX6680/MAX6681 and SA56004 report temperatures of 128 degrees C and higher as negative temperatures. Add respective comments to the code. Also use clamp_val() and DIV_ROUND_CLOSEST where appropriate in calculations. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Enable full PEC support for ADT7461AGuenter Roeck2022-07-131-5/+12
| | | | | | | | | | | | | | | | | | Experiments show that ADT7461A and NCT1008 support PEC, even though it is not documented. Enable support for it in the driver. Since ADT7461 only supports partial PEC, this means that the configuration for ADT7461A needs to be separated from ADT7461. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Add partial PEC support for ADT7461Guenter Roeck2022-07-131-1/+1
| | | | | | | | | | | | | | | | | | | | Revision 0 of the ADT7461 datasheet suggests that the chip supports PEC (packet error checking). This information is gone in later versions of the datasheet. Experiments show that PEC support on ADT7461 is similar to PEC support in ADM1032, ie it is only supported for read operations. Add support for it to the driver. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Improve PEC supportGuenter Roeck2022-07-131-27/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PEC (packet error checking) support for ADM1032 is currently only enabled if the chip was auto-detected, but not if a chip is instantiated explicitly. Always enable PEC support by introducing a chip feature flag indicating partial PEC support. Also, for consistency, disable PEC support by default to match existing functionality if the chip was not auto- detected. At the same time, introduce generic support for PEC with a separate feature flag. This will be used when support for chips with full PEC functionality is added. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Stop using R_/W_ register prefixGuenter Roeck2022-07-131-117/+117
| | | | | | | | | | | | | | | | The register write address either matches the read address, or it is the read address plus 6. Simplify the code and resolve the write address programmatically instead of having two defines for each register. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Move status register bit shifts to compile timeGuenter Roeck2022-07-131-13/+14
| | | | | | | | | | | | | | Handling bit shifts necessary to extract status bits during compile time reduces code and data size by almost 5% when building for x86_64. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Use BIT macroGuenter Roeck2022-07-131-27/+28
| | | | | | | | | | | | | | Use BIT macro instead of shift operation to improve readability. No functional change. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Reorder chip enumeration to be in alphabetical orderGuenter Roeck2022-07-131-2/+4
| | | | | | | | | | | | | | | | Reorder chip enumeration in alphabetical order to make it easier to see which chips are supported, and to clarify where to add support new chip types. No functional change. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Reorder include files in alphabetical orderGuenter Roeck2022-07-131-6/+6
| | | | | | | | | | | | | | | | | | | | | | Reorder include files in alphabetical order to reduce the chance of duplicates and to make it clear where new include files should be added. Drop the unnecessary include of linux/sysfs.h. Include linux/device.h instead because that is what is actually used. No functional change. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Rework alarm/status handlingGuenter Roeck2022-07-131-115/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many chips supported by this driver clear status registers after it is read and update it in the next measurement cycle. Normally this falls under the radar because all registers are only read once per measurement cycle. However, there is an exception: Status registers are always read during interrupt and laert handling. This can result in invalid status reports if userspace reads an alarm attribute immediately afterwards. Rework alarm/status handling by keeping a shadow register with 'current' alarms, and by ensuring that the register is either only updated once per measurement cycle or not cleared. A second problem is related to alert handling: Alert handling is disabled for chips with broken alert after an alert was reported, but only re-enabled if attributes are read by the user. This means that alert conditions may appear and disappear unnoticed. Remedy the situation by introducing a worker to periodically read the status register(s) while alert handling is disabled, and re-enable alerts after the alert condition clears. Yet another problem is that sysfs and udev events are currently only reported to userspace if an alarm is raised, but not if an alarm condition clears. Use the new worker to detect that situation and also generate sysfs and udev events in that case. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (lm90) Generate sysfs and udev events for all alarmsGuenter Roeck2022-07-131-0/+20
| | | | | | | | | | | | | | So far the driver only generated sysfs and udev events for minimum and maximum alarms. Also generate events for critical and emergency alarms. Signed-off-by: Guenter Roeck <linux@roeck-us.net>
| * hwmon: (pmbus) Move pec attribute to I2C deviceGuenter Roeck2022-07-131-39/+50
| | | | | | | | | | | | | | | | | | | | | | Enabling and disabling PEC for PMBus devices is currently only supported with a debugfs attribute, which requires debugfs to be enabled and is thus less than perfect. Take the lm90 driver as example and add a 'pec' attribute to the I2C device if both the I2C adapter and the PMBus device support it. Remove the now obsolete 'pec' attribute from debugfs. Cc: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* | Merge tag 'x86_misc_for_v6.0_rc1' of ↵Linus Torvalds2022-08-011-0/+12
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull misc x86 updates from Borislav Petkov: - Add a bunch of PCI IDs for new AMD CPUs and use them in k10temp - Free the pmem platform device on the registration error path * tag 'x86_misc_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: hwmon: (k10temp): Add support for new family 17h and 19h models x86/amd_nb: Add AMD PCI IDs for SMN communication x86/pmem: Fix platform-device leak in error path
| * hwmon: (k10temp): Add support for new family 17h and 19h modelsMario Limonciello2022-07-201-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Add the support for CCD offsets used on family 17h models A0h-AFh, and family 19h models 60h-7Fh. [ bp: Merge into a single patch. ] Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20220719195256.1516-1-mario.limonciello@amd.com
* | hwmon: (ibmaem) don't call platform_device_del() if platform_device_add() failsYang Yingliang2022-07-011-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | If platform_device_add() fails, it no need to call platform_device_del(), split platform_device_unregister() into platform_device_del/put(), so platform_device_put() can be called separately. Fixes: 8808a793f052 ("ibmaem: new driver for power/energy/temp meters in IBM System X hardware") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220701074153.4021556-1-yangyingliang@huawei.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* | hwmon: (pmbus/ucd9200) fix typos in commentsJiang Jian2022-06-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop the redundant word 'the' in the comments following /* * Set PHASE registers on all pages to 0xff to ensure that phase * specific commands will apply to all phases of a given page (rail). * This only affects the READ_IOUT and READ_TEMPERATURE2 registers. * READ_IOUT will return the sum of currents of all phases of a rail, * and READ_TEMPERATURE2 will return the maximum temperature detected * for the [the - DROP] phases of the rail. */ Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Link: https://lore.kernel.org/r/20220622063231.20612-1-jiangjian@cdjrlc.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* | hwmon: (occ) Prevent power cap command overwriting poll responseEddie James2022-06-294-13/+15
|/ | | | | | | | | | | | | | Currently, the response to the power cap command overwrites the first eight bytes of the poll response, since the commands use the same buffer. This means that user's get the wrong data between the time of sending the power cap and the next poll response update. Fix this by specifying a different buffer for the power cap command response. Fixes: 5b5513b88002 ("hwmon: Add On-Chip Controller (OCC) hwmon driver") Signed-off-by: Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20220628203029.51747-1-eajames@linux.ibm.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
* hwmon: (asus-ec-sensors) add missing comma in board name list.Michael Carns2022-06-151-1/+1
| | | | | | | | | | | | This fixes a regression where coma lead to concatenating board names and broke module loading for C8H. Fixes: 5b4285c57b6f ("hwmon: (asus-ec-sensors) fix Formula VIII definition") Signed-off-by: Michael Carns <mike@carns.com> Signed-off-by: Eugene Shalygin <eugene.shalygin@gmail.com> Link: https://lore.kernel.org/r/20220615122544.140340-1-eugene.shalygin@gmail.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-23 08:31:46 +0000