| Commit message (Collapse) | Author | Age | Files | Lines |
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git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd
Pull MFD updates from Lee Jones:
"New Device Support
- Add support for Power Supply to AXP813
- Add support for GPIO, ADC, AC and Battery Power Supply to AXP803
- Add support for UART to Exynos LPASS
Fix-ups:
- Use supplied MACROS; ti_am335x_tscadc
- Trivial spelling/whitespace/alignment; tmio, axp20x, rave-sp
- Regmap changes; bd9571mwv, wm5110-tables
- Kconfig dependencies; MFD_AT91_USART
- Supply shared data for child-devices; madera-core
- Use new of_node_name_eq() API call; max77620, stmpe
- Use managed resources (devm_*); tps65218
- Comment descriptions; ingenic-tcu
- Coding style; madera-core
Bug Fixes:
- Fix section mismatches; twl-core, db8500-prcmu
- Correct error path related issues; mt6397-core, ab8500-core, mc13xxx-core
- IRQ related fixes; tps6586x
- Ensure proper initialisation sequence; qcom_rpm
- Repair potential memory leak; cros_ec_dev"
* tag 'mfd-next-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (25 commits)
mfd: exynos-lpass: Enable UART module support
mfd: mc13xxx: Fix a missing check of a register-read failure
mfd: cros_ec: Add commands to control codec
mfd: madera: Remove spurious semicolon in while loop
mfd: rave-sp: Fix typo in rave_sp_checksum comment
mfd: ingenic-tcu: Fix bit field description in header
mfd: tps65218: Use devm_regmap_add_irq_chip and clean up error path in probe()
mfd: Use of_node_name_eq() for node name comparisons
mfd: cros_ec_dev: Add missing mfd_remove_devices() call in remove
mfd: axp20x: Add supported cells for AXP803
mfd: axp20x: Re-align MFD cell entries
mfd: axp20x: Add AC power supply cell for AXP813
mfd: wm5110: Add missing ASRC rate register
mfd: qcom_rpm: write fw_version to CTRL_REG
mfd: tps6586x: Handle interrupts on suspend
mfd: madera: Add shared data for accessory detection
mfd: at91-usart: Add platform dependency
mfd: bd9571mwv: Add volatile register to make DVFS work
mfd: ab8500-core: Return zero in get_register_interruptible()
mfd: tmio: Typo s/use use/use/
...
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When performing single ended measurements with TSCADC, its recommended
to set negative input (SEL_INM_SWC_3_0) of ADC step to ADC's VREFN in the
corresponding STEP_CONFIGx register.
Also, the positive(SEL_RFP_SWC_2_0) and negative(SEL_RFM_SWC_1_0)
reference voltage for ADC step needs to be set to VREFP and VREFN
respectively in STEP_CONFIGx register.
Without these changes, there may be variation of as much as ~2% in the
ADC's digital output which is bad for precise measurement.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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adc5_get_dt_data uses a local, prop, feeds it to adc5_get_dt_channel_data,
and then puts the result into adc->chan_props. The problem is
adc5_get_dt_channel_data may not initialize that structure fully, so a
garbage value is used for prescale if the optional "qcom,pre-scaling" is
not defined in DT. adc5_read_raw then uses this as an array index,
generating a crash that looks like this:
[ 6.683186] Unable to handle kernel paging request at virtual address ffffff90e78c7964
Call trace:
qcom_vadc_scale_code_voltage_factor+0x74/0x104
qcom_vadc_scale_hw_calib_die_temp+0x20/0x60
qcom_adc5_hw_scale+0x78/0xa4
adc5_read_raw+0x3d0/0x65c
iio_channel_read+0x240/0x30c
iio_read_channel_processed+0x10c/0x150
qpnp_tm_get_temp+0xc0/0x40c
of_thermal_get_temp+0x7c/0x98
thermal_zone_get_temp+0xac/0xd8
thermal_zone_device_update+0xc0/0x38c
qpnp_tm_probe+0x624/0x81c
platform_drv_probe+0xe4/0x11c
really_probe+0x188/0x3fc
driver_probe_device+0xb8/0x188
__device_attach_driver+0x114/0x180
bus_for_each_drv+0xd8/0x118
__device_attach+0x180/0x27c
device_initial_probe+0x20/0x2c
bus_probe_device+0x78/0x124
deferred_probe_work_func+0xfc/0x138
process_one_work+0x3d8/0x8b0
process_scheduled_works+0x48/0x6c
worker_thread+0x488/0x7cc
kthread+0x24c/0x264
ret_from_fork+0x10/0x18
Unfortunately, when I went to add the initializer for this and tried to
boot it, my machine shut down immediately, complaining that it was
hotter than the sun. It appears that adc5_chans_pmic and adc5_chans_rev2
were initializing prescale_index as if it were directly a divisor,
rather than the index into adc5_prescale_ratios that it is.
Fix the uninitialized value, and change the static initialization to use
indices into adc5_prescale_ratios.
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Make it possible to use Exynos ADC driver on S5PV210 based devices.
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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S5PV210's ADC variant is almost the same as v1 except that it has 10
channels and doesn't require the pmu register
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Switch off ADC when going to low power mode, in case it has been left
running in buffer mode. Then re-enable it when resuming.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add support for runtime PM & sleep. Move all regulator and clock management
to dedicated HW start/stop routines. Then rely on (runtime) PM OPS to
call them.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Move self-calibration routine to prepare routine.
- This is precursor patch to ease power management handling.
- This also allow to factorize few error cases (error handling).
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Before this patch we are registering the internal clocks (for example on
Meson8b, where the SAR ADC IP block implements the divider and gate
clocks) with the following names:
- /soc/cbus@c1100000/adc@8680#adc_div
- /soc/cbus@c1100000/adc@8680#adc_en
This is bad because the common clock framework uses the clock to create
a directory in <debugfs>/clk. With such name, the directory creation
(silently) fails and the debugfs entry ends up being created at the
debugfs root.
With this change, the new clock names are:
- c1108680.adc#adc_div
- c1108680.adc#adc_en
This matches the clock naming scheme used in the PWM, Ethernet and MMC
drivers. It also fixes the problem with debugfs.
The idea is shamelessly taken from commit b96e9eb62841c5 ("pwm: meson:
Fix mux clock names").
Fixes: 3921db46a8c5bc ("iio: Convert to using %pOF instead of full_name")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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devm_kasprintf() may return NULL on failure of internal allocation thus
the assignments to init.name are not safe if not checked. On error
meson_sar_adc_clk_init() returns negative values so -ENOMEM in the
(unlikely) failure case of devm_kasprintf() should be fine here.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs")
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-testing
Jonathan writes:
First set of new device support, features and cleanups for IIO in the 4.21 cycle
Along with the headline feature of 5 new drivers, we have the
substantial addition of auxilliary sensor support on the lsm6sdx
parts for ST. There has also been a good set of staging cleanup
in this period with more underway.
An ever increasing number of devices supported with just a new
ID which is a good sign that at least some manufacturers are
continuing to stabilise their interfaces.
New device support,
* ad7124
- New driver supporting Analog Devices' ad7124-4 and ad7124-8 parts
with the inevitable DT binding.
* ad7949
- New driver supporting Analog Devices' ad7949, AD7682 and AD7689 ADCs.
* rm3100
- New driver supporting PNIs RM3100 magnometer with bindings and
vendor prefix.
* ti-dac7311
- New driver supporting DAC7311, DAC6311 and DAC5311 TI DACs, with
DT bindings.
* vcnl5035
- New driver supporting the light sensor part of the VCNL4035, with
DT bindings
Features,
* bindings
- Add a generic ADC channel binding as we keep reinventing this
wheel.
* adc128s052
- Add IDs for additional pin compatible parts.
- Add APCI ID seen on E3940 UP squared boards.
* ad_sigma_delta
- Allow for custom data register overiding default.
* kxcjk1013
- Add KIOX0009 ACPI ID as seen on the Acer One 10.
* lsm6dsx
- Rework leading to...
- External sensor support using the built in I2C master.
- Initial support for a slave lis2mdl magnetometer.
* meson-saradc
- Add temperature sensor support and bindings.
* st_magn
- New ID for lsm9dsl_magn with bindings
- New ID for lis3de accelerometer
* tpl0102
- Add supprot for IIO_AVAIL_RANGE to report the range available
from this device to userspace and in kernel users.
Cleanups and minor fixes
* tools
- Allow outside specification of CFLAGS
* ad2s90
- Handle and spi_read error.
- Handle spi_setup failure
- Drop a pointless assignment.
- Prevent a potentail race by moving device registration to after
all other setup.
- Add missing scale attribute.
- Add a sanity check on channel type before trying to read it.
* ad2s1210
- Move to modern gpio descriptors.
- Drop a gpioin flag which made no sense as far as we can tell.
- Add dt table (bindings doc to follow when this is ready for
moving out of staging).
* ad5933
- Drop camel-case naming of ext_clk_hz.
- White space fixes.
* ad7150
- Local variable to shorten overly long line.
- Alignment and line break fixes.
* ad7280a
- Handle an error path that was previously ignored.
- Use crc8.h to build the crc table replacing custom code.
- Avoid unecessary cast.
- Power down the device if an error happens in probe
- Use devm routines to simplify probe and remove.
* ad7606
- Alignment fixes.
* ad7780
- This worked as long as by coincidence an uninitialized value
was 0. Lets not rely on that.
- Ensure gain update is only used with the ad778x chips that
actually support it.
- Tidy up pattern mask generation.
- Read regulator when scale is requested (which should be infrequent)
as it might have changed from initialization.
* ad7816
- Move to modern gpio descriptors
- Don't use a busy_pin for ad7818 as there isn't one.
- Ensure RD/WR and CONVST pins are outputs (previously they
were brought up as inputs which doesn't seem to make any sense)
- DT id table.
* adc128s052
- SPDX
* adt7316
- Alignment fix.
- Fix data reading. When using I2C the driver never actually
used the value read. This has been broken a very long time
hence no rush to fix it now + the driver is undergoing a lot
of cleanup.
- Sanity check that the i2c read didn't fail to actually read
anything.
* dpot-dac
- Mark a switch full through with slightly different text so that
gcc doesn't warn on it.
* gyro-adc
- Fix a wrong file in the MAINTAINERS entry and add binding doc to the
listed files.
* ina2xx
- Add some early returns to clarify error paths in switch.
* lsm6dsx
- MAINTAINERS entry.
* max11100
- SPDX
* max9611
- SPDX
* mcp4131
- use of_device_get_match_data in preference to spi_get_device_id
approach.
* rcar-adc
- SPDX
* sc27xx
- Add ADC conversion timeout support to avoid possible fault.
* ssp_sensors
- Don't free managed resources manually.
* st-magn
- Add a comment to avoid future confusion over when to use -magn
postfix (on multi chip in package parts)
- Add BDU register for LIS3MDL where it seems to have been missed.
* st-sensors
- Minor spelling, grammar etc fixes.
* tpl0102
- Use a pointer rather than an index of an array to improve conciseness.
* tag 'iio-for-4.21a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (80 commits)
Staging: iio: adt7316: Add an extra check for 'ret' equals to 0
Staging: iio: adt7316: Fix i2c data reading, set the data field
dt-bindings: iio: adc: Add docs for ad7124
iio: adc: Add ad7124 support
dt-bindings: iio: adc: Add common ADCs properties to a separate file
iio: ad_sigma_delta: Allow to provide custom data register address
staging: iio: ad7816: Add device tree table.
iio: imu: st_lsm6dsx: add entry in MAINTAINERS file
iio: potentiometer: mcp4131: use of_device_get_match_data()
staging: iio: adc: ad7280a: use devm_* APIs
staging: iio: adc: ad7280a: power down the device on error in probe
dt-bindings: iio: imu: st_lsm6dsx: add support to i2c pullup resistors
iio: imu: st_lsm6dsx: add hw FIFO support to i2c controller
iio: imu: st_lsm6dsx: add st_lsm6dsx_push_tagged_data routine
iio: imu: st_lsm6dsx: add i2c embedded controller support
iio: imu: st_lsm6dsx: introduce st_lsm6dsx_sensor_set_enable routine
iio: imu: st_lsm6dsx: introduce ST_LSM6DSX_ID_EXT sensor ids
iio: imu: st_lsm6dsx: remove static from st_lsm6dsx_set_watermark
iio: imu: st_lsm6dsx: reload trimming parameter at bootstrap
iio: imu: st_lsm6dsx: introduce locked read/write utility routines
...
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The ad7124-4 and ad7124-8 are a family of 4 and 8 channel sigma-delta ADCs
with 24-bit precision and reference.
Three power modes are available which in turn affect the output data rate:
* Full power: 9.38 SPS to 19,200 SPS
* Mid power: 2.34 SPS to 4800 SPS
* Low power: 1.17 SPS to 2400 SPS
The ad7124-4 can be configured to have four differential inputs, while
ad7124-8 can have 8. Moreover, ad7124 also supports per channel
configuration. Each configuration consists of gain, reference source,
output data rate and bipolar/unipolar configuration.
Datasheets:
Link: http://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-4.pdf
Link: http://www.analog.com/media/en/technical-documentation/data-sheets/ad7124-8.pdf
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Some newer devices from the Sigma-Delta ADC family do have their data
register at a different address than the current default address. Add a
parameter to the ad_sigma_delta_info struct which allows to override the
default address.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Stefan Popa <stefan.popa@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Sometimes the ADC controller met some problems, and it will not complete
the data conversion, that will can not wake up the read process any more
to block users. So we should add one maximum conversion time to avoid
this issue.
Signed-off-by: Freeman Liu <freeman.liu@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch updates license to use SPDX-License-Identifier
instead of verbose license text.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Channel 6 of the SAR ADC can be switched between two inputs:
SAR_ADC_CH6 input (an actual pad on the SoC) and the signal from the
temperature sensor inside the SoC.
To get usable results from the temperature sensor we need to read the
corresponding calibration data from the eFuse and pass it to the SAR ADC
registers. If the temperature sensor is not calibrated (the eFuse data
contains a bit for this) then the driver will only register the
iio_chan_spec's for voltage measurements.
This only enables the temperature sensor for the Meson8 SoC. Meson8b and
Meson8m2 SoCs can be supported in the future as well but we first need
a way to pass the fifth TSC (temperature sensor coefficient) bit to the
HHI register area (apart from that the infrastructure as already
implemented for Meson8 can be used). On the 64-bit SoCs (GXBB, GXL and
GXM) the temperature sensor inside SAR ADC is firmware-controlled (by
BL30, we can simply use the SCPI hwmon driver to get the chip
temperature).
To keep the devicetree interface backwards compatible we simply skip the
temperature sensor initialization if no eFuse nvmem cell is passed via
devicetree.
The public documentation for the SAR ADC IP block does not explain how
to use the registers to read the temperature. The logic from this patch
is based on reading and understanding Amlogic's GPL kernel sources.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Compatible with AD7682 and AD7689 chips.
It is a Analog Devices ADC driver 14/16 bits 4/8 channels
with SPI protocol
Datasheet of the device:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf
Signed-off-by: Charles-Antoine Couret <charles-antoine.couret@essensium.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This updates the ti-adc128s052.c file to use SPDX-License-Identifier
instead of more verbose license text.
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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ACPI _HID AANT1280 matches an ADC124S101 present on E3940 SKUs of the UP
Squared board.
Add it to the driver.
Signed-off-by: Nicola Lunghi <nicola.lunghi@emutex.com>
[javier@emutex.com: fix up commit message and one checkpatch warning]
Signed-off-by: Javier Arteaga <javier@emutex.com>
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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The datasheets for ADC122S021 and ADC124S021 list two more
pin-compatible alternatives for each device.
Add their IDs as compatible strings.
Suggested-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Javier Arteaga <javier@emutex.com>
Signed-off-by: Dan O'Donovan <dan@emutex.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Static analysis with CoverityScan is throwing warnings that specific
case statements are missing breaks. Rather than adding breaks, add
return -EINVAL to the specific case statements to clarify the
error return paths. Fix also saves 50 bytes.
Before:
text data bss dec hex filename
21418 4936 128 26482 6772 drivers/iio/adc/ina2xx-adc.o
After:
dec hex filename
21370 4936 128 26434 6742 drivers/iio/adc/ina2xx-adc.o
(gcc 8.2, x86-64)
Detected by CoverityScan, CID#1462408 ("Missing break in switch")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging/IIO driver updates from Greg KH:
"Here is the big staging and IIO driver pull request for 4.20-rc1.
There are lots of things here, we ended up adding more lines than
removing, thanks to a large influx of Comedi National Instrument
device support. Someday soon we need to get comedi out of staging...
Other than the comedi drivers, the "big" things here are:
- new iio drivers
- delete dgnc driver (no one used it and no one had the hardware
anymore)
- vbox driver updates and fixes
- erofs fixes
- tons and tons of tiny checkpatch fixes for almost all staging
drivers
All of these have been in linux-next, with the last few happening a
bit "late" due to them getting stuck on my laptop during travel to the
Mantainers summit"
* tag 'staging-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (690 commits)
staging: gasket: Fix sparse "incorrect type in assignment" warnings.
staging: gasket: remove debug logs for callback invocation
staging: gasket: remove debug logs in page table mapping calls
staging: rtl8188eu: core: Use sizeof(*p) instead of sizeof(struct P) for memory allocation
staging: ks7010: Remove extra blank line
staging: gasket: Remove extra blank line
staging: media: davinci_vpfe: Fix spelling mistake in enum
staging: speakup: Add a pair of braces
staging: wlan-ng: Replace long int with long
staging: MAINTAINERS: remove obsolete IPX staging directory
staging: MAINTAINERS: remove NCP filesystem entry
staging: rtl8188eu: cleanup comparsions to false
staging: gasket: Update device virtual address comment
staging: gasket: sysfs: fix attribute release comment
staging: gasket: apex: fix sysfs_show
staging: gasket: page_table: simplify gasket_components_to_dev_address
staging: gasket: page_table: fix comment in components_to_dev_address
staging: gasket: page table: fixup error path allocating coherent mem
staging: gasket: page_table: rearrange gasket_page_table_entry
staging: gasket: page_table: remove unnecessary PTE status set to free
...
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Until now the "channel" number is identical to how the channel is
identified inside the (FIFO) registers. In our case we have eight
channels and the hardware also has eight inputs.
However, there are two special inputs:
- channel 6 can select between the SAR_ADC_CH6 pad and the chip's
internal temperature sensor
- channel 7 can select between SAR_ADC_CH7 and VSS, VDD / 4, VDD / 2,
VDD * 3 / 4 and VDD.
When programming the registers to read for example the temperature
sensor we have to select FIFO channel 6, set the correct bit which muxes
channel 6 to the temperature sensor and then start the ADC measurement
for channel 6 as usual.
When we add support for the temperature sensor the driver has to know
about that it has to use FIFO channel 6 to measure using the chip's
internal temperature sensor. However, in that case the iio_chan_spec
channel will not be 6 because this is already used for the SAR_ADC_CH6
pad input. Thus we use iio_chan_spec's address field to store the FIFO
channel number for each channel.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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In the future we may support two different channel sets:
- one which includes the voltage pads and the temperature sensor output
(for Meson8, Meson8b and Meson8m2)
- one which only includes the voltage pads (GXBB, GXL, GXM and AXG)
Channel 7 has a special function on all of these platforms. However,
since we will have different channel array definitions we want our code
to always use whatever channels struct iio_dev uses.
No functional changes for now. This is the preparation for adding
temperature sensor support to this driver.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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When channels are registered, the hardware channel number is not the
actual iio channel number.
This is because the driver is probed with a certain number of accessible
channels. Some pins are routed and some not, depending on the description of
the board in the DT.
Because of that, channels 0,1,2,3 can correspond to hardware channels
2,3,4,5 for example.
In the buffered triggered case, we need to do the translation accordingly.
Fixed the channel number to stop reading the wrong channel.
Fixes: 0e589d5fb ("ARM: AT91: IIO: Add AT91 ADC driver.")
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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When doing simple conversions, the driver did not acknowledge the DRDY irq.
If this irq status is not acked, it will be left pending, and as soon as a
trigger is enabled, the irq handler will be called, it doesn't know why
this status has occurred because no channel is pending, and then it will go
int a irq loop and board will hang.
To avoid this situation, read the LCDR after a raw conversion is done.
Fixes: 0e589d5fb ("ARM: AT91: IIO: Add AT91 ADC driver.")
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Commit 053ffe3c8cfe31 ("iio: adc: meson-saradc: squash and share the
common adc platform data") put all the data which is needed at runtime
from struct meson_sar_adc_data to a new struct meson_sar_adc_param so
we can re-use the platform specific configuration without having to
duplicate everything just to change the name.
The only place where struct meson_sar_adc_data is now needed is the
_probe function which has to pass the name to the iio_dev. All other
functions only need access to struct meson_sar_adc_param. This means we
can simplify struct meson_sar_adc_priv.
The goal of this patch is to make the code a bit easier to read since
this removes one level of nesting. No functional changes intended.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This simplifies our _probe function by using of_device_get_match_data
instead of open-coding it. No functional changes.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This define is of no use because the driver is avoiding shifting bits
by itself but using FIELD_GET/FIELD_PREP (which are using bit masks)
instead. There is already a MESON_SAR_ADC_DELTA_10_TS_C_MASK bit mask so
MESON_SAR_ADC_DELTA_10_TS_C_SHIFT was redundant.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Leaving for_each_child_of_node loop we should release child device node,
if it is not stored for future use.
Found by Linux Driver Verification project (linuxtesting.org).
JC: I'm not sending this as a quick fix as it's been wrong for years,
but good to pick up for stable after the merge window.
Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
Fixes: 6df2e98c3ea56 ("iio: adc: Add imx25-gcq ADC driver")
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This changes how the SPI message for the triggered buffer is setup in
the TI ADS7950 A/DC driver. By using the SPI_CS_WORD flag, we can read
multiple samples in a single SPI transfer. If the SPI controller
supports DMA transfers, we can see a significant reduction in CPU usage.
For example, on an ARM9 system running at 456MHz reading just 4 channels
at 100Hz: before this change, top shows the CPU usage of the IRQ thread
of this driver to be ~7.7%. After this change, the CPU usage drops to
~3.8%.
The use of big-endian for the raw data was cargo culted from another
driver when this driver was originally written. It used an SPI word size
of 8 bits and big-endian byte ordering to effectively emulate 16 bit
words.
Now, in order to inject a CS toggle between each word, we need to use
the correct word size, otherwise we would get a CS toggle half way
through each word 16-bit. The SPI subsystem uses CPU byte ordering for
multi-byte words. So, the data we get back from the SPI is going to be
CPU endian now no matter what. Converting that to big endian will just
add overhead on little endian systems so we opt to change the raw data
format from big endian to CPU endian.
There is a small risk that this could break some lazy userspace programs
that use the raw data without checking the data format. We can address
this if/when it actually comes up.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Jonathan Cameron <jic23@kernel.org>
Cc: Hartmut Knaack <knaack.h@gmx.de>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-iio@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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The driver only defines a subset of all possible ADC channels. Channel
numbers read from the device tree are accepted as long as they don't
exceed a max value, even when no channel definition exists. Add a
check to abort initialization in this case.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch adds support to read calibration values from the eFuse
controller to calibrate the ADC channel scales, which can make ADC
sample data more accurate.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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The headset device will use channel 20 of ADC controller to detect events,
but it needs the raw ADC data to do conversion according to its own formula.
Thus we should configure the channel mask separately and configure channel
20 as IIO_CHAN_INFO_RAW, as well as adding raw data read support.
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Drop the boilerplate license text.
Signed-off-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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MCP3911 is a dual channel Analog Front End (AFE) containing two
synchronous sampling delta-sigma Analog-to-Digital Converters (ADC).
Co-developed-by: Kent Gustavsson <kent@minoris.se>
Signed-off-by: Kent Gustavsson <kent@minoris.se>
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Add ADC5_AMUX_THM2_100K_PU and ADC5_AMUX_THM4_100K_PU to the list of
rev2 ADC channels.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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After finding a reasonable gain, the function converts the configured
gain to a gain configuration option selector enum max9611_csa_gain.
Make the conversion clearly visible by using an explicit cast. This
also avoids a warning seen with clang:
drivers/iio/adc/max9611.c:292:16: warning: implicit conversion from
enumeration type 'enum max9611_conf_ids' to different enumeration
type 'enum max9611_csa_gain' [-Wenum-conversion]
*csa_gain = gain_selectors[i];
~ ^~~~~~~~~~~~~~~~~
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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no functional changes
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch adds support for QCOM SPMI PMIC5 family
of ADC driver that supports hardware based offset and
gain compensation. The ADC peripheral can measure both
voltage and current channels whose input signal is
connected to the PMIC ADC AMUX.
The register set and configuration has been refreshed
compared to the prior QCOM PMIC ADC family. Register
ADC5 as part of the IIO framework.
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Parent MFD device takes care of enabling ADC interface whenever
touchscreen is marked wakeup capable. Therefore, unconditionally disable
ADC interface during system suspend to save power in case of system with
just ADC and no TSC.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Enabling the Interrupts before registering the irq handler is a bad
idea. This patch corrects the same for XADC driver.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch avoids getting irq number in xadc_remove function. Instead
store 'irq' in xadc struct and use xadc->irq wherever needed.
This patch also resolves a warning reported by coverity where it asks to
check return value of platform_get_irq() for any errors in xadc_remove.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch limits the xadc pcap clock frequency value to be less than
200MHz. This fixes the issue when zynq is booted at higher frequency
values, pcap crosses the maximum limit of 200MHz(Fmax) as it is derived
from IOPLL.
If this limit is crossed it is required to alter the WEDGE and REDGE
bits of XADC_CFG register to make timings better in the interface. So to
avoid alteration of these bits every time, the pcap value should not
cross the Fmax limit.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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This patch adds check for return values from clock related functions.
This was reported by static code analysis tool.
Signed-off-by: Manish Narani <manish.narani@xilinx.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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wait_for_completion_timeout returns unsigned long not int so an appropriate
variable is declared and the assignment and check fixed up.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Reviewed-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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The SAR ADC on Meson8m2 behaves identical to the one found in the
Meson8b SoCs. Add a separate compatible string because the temperature
sensor logic (not supported yet) differs between Meson8 and Meson8m2
(however, it's the same for Meson8b and Meson8m2).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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