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path: root/drivers/infiniband/hw/cxgb4/t4fw_ri_api.h
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* RDMA/cxgb4: Replace 0-length arrays with flexible arraysKees Cook2023-01-151-20/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zero-length arrays are deprecated[1]. Replace all remaining 0-length arrays with flexible arrays. Detected with GCC 13, using -fstrict-flex-arrays=3: In function 'build_rdma_write', inlined from 'c4iw_post_send' at ../drivers/infiniband/hw/cxgb4/qp.c:1173:10: ../drivers/infiniband/hw/cxgb4/qp.c:597:38: warning: array subscript 0 is outside array bounds of 'struct fw_ri_immd[0]' [-Warray-bounds=] 597 | wqe->write.u.immd_src[0].r2 = 0; | ~~~~~~~~~~~~~~~~~~~~~^~~ ../drivers/infiniband/hw/cxgb4/t4fw_ri_api.h: In function 'c4iw_post_send': ../drivers/infiniband/hw/cxgb4/t4fw_ri_api.h:567:35: note: while referencing 'immd_src' 567 | struct fw_ri_immd immd_src[0]; | ^~~~~~~~ Additionally drop the unused C99_NOT_SUPPORTED ifndef lines. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#zero-length-and-one-element-arrays Cc: Potnuri Bharat Teja <bharat@chelsio.com> Cc: Jason Gunthorpe <jgg@ziepe.ca> Cc: Leon Romanovsky <leon@kernel.org> Cc: "Gustavo A. R. Silva" <gustavoars@kernel.org> Cc: linux-rdma@vger.kernel.org Signed-off-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20230105223225.never.252-kees@kernel.org Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Leon Romanovsky <leon@kernel.org>
* RDMA: Replace zero-length array with flexible-array memberGustavo A. R. Silva2020-02-201-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732932f ("cxgb3/l2t: Fix undefined behaviour") Link: https://lore.kernel.org/r/20200213010425.GA13068@embeddedor.com Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> # added a few more
* iw_cxgb4: Support FW write completion WRPotnuri Bharat Teja2018-08-021-0/+31
| | | | | | | | | | | | | To optimize NVME-oF READ IOPs, use a specialized WQE that combines the RDMA WRITE and SEND_INV WR chain submitted by the NVME-oF target driver. This reduces uP overhead per NVME-oF IO, and results in over 10% improvement in NVME-oF 4K READ IOPs. Signed-off-by: Potnuri Bharat Teja <bharat@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
* iw_cxgb4: RDMA write with immediate supportPotnuri Bharat Teja2018-08-021-3/+15
| | | | | | | | Adds iw_cxgb4 functionality to support RDMA_WRITE_WITH_IMMEDATE opcode. Signed-off-by: Potnuri Bharat Teja <bharat@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
* rdma/cxgb4: Add support for srq functions & structsRaju Rangoju2018-07-251-0/+19
| | | | | | | | | This patch adds kernel mode t4_srq structures and support functions, uapi structures and defines, as well as firmware work request structures. Signed-off-by: Raju Rangoju <rajur@chelsio.com> Reviewed-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
* RDMA/cxgb4: Annotate r2 and stag as __be32Leon Romanovsky2017-11-101-2/+2
| | | | | | | | | | | | | | | | | | | | Chelsio cxgb4 HW is big-endian, hence there is need to properly annotate r2 and stag fields as __be32 and not __u32 to fix the following sparse warnings. drivers/infiniband/hw/cxgb4/qp.c:614:16: warning: incorrect type in assignment (different base types) expected unsigned int [unsigned] [usertype] r2 got restricted __be32 [usertype] <noident> drivers/infiniband/hw/cxgb4/qp.c:615:18: warning: incorrect type in assignment (different base types) expected unsigned int [unsigned] [usertype] stag got restricted __be32 [usertype] <noident> Cc: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Reviewed-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
* iw_cxgb4: add fast-path for small REG_MR operationsSteve Wise2016-10-071-0/+12
| | | | | | | | | | | | | | | | | | | When processing a REG_MR work request, if fw supports the FW_RI_NSMR_TPTE_WR work request, and if the page list for this registration is <= 2 pages, and the current state of the mr is INVALID, then use FW_RI_NSMR_TPTE_WR to pass down a fully populated TPTE for FW to write. This avoids FW having to do an async read of the TPTE blocking the SQ until the read completes. To know if the current MR state is INVALID or not, iw_cxgb4 must track the state of each fastreg MR. The c4iw_mr struct state is updated as REG_MR and LOCAL_INV WRs are posted and completed, when a reg_mr is destroyed, and when RECV completions are processed that include a local invalidation. This optimization increases small IO IOPS for both iSER and NVMF. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
* cxgb4, iw_cxgb4: move delayed ack macro definitionsVarun Prakash2016-03-221-9/+0
| | | | | | | | | move delayed ack macro definitions to common header file t4_msg.h. Signed-off-by: Varun Prakash <varun@chelsio.com> Acked-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
* cxgb4, iw_cxgb4, cxgb4i: remove duplicate definitionsVarun Prakash2016-03-221-9/+0
| | | | | | | | | move struct ulptx_idata definition to common header file t4_msg.h. Signed-off-by: Varun Prakash <varun@chelsio.com> Acked-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
* cxgb4, iw_cxgb4: move definitions to common header fileVarun Prakash2016-03-221-81/+0
| | | | | | | | | | move struct tcp_options, struct cpl_pass_accept_req, enum defining congestion control algorithms and associated macros to common header file t4_msg.h Signed-off-by: Varun Prakash <varun@chelsio.com> Acked-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
* iw_cxgb4: Cleanup register defines/MACROSHariprasad S2015-05-051-1/+3
| | | | | | | Cleanup macros and register defines for consistency Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
* iw_cxgb4: Cleanup register defines/MACROS defined in t4fw_ri_api.hHariprasad Shenai2015-01-161-406/+406
| | | | | | | Cleanup all the MACROS that are defined in t4fw_ri_api.h and affected files Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* cxgb4/iw_cxgb4: Move common defines to cxgb4Anish Bhatt2014-07-171-1/+0
| | | | | | | | This define is used by cxgb4i and iw_cxgb4, moving to avoid code duplication Signed-off-by: Anish Bhatt <anish@chelsio.com> Acked-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* iw_cxgb4: Choose appropriate hw mtu index and ISS for iWARP connectionsHariprasad Shenai2014-06-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Select the appropriate hw mtu index and initial sequence number to optimize hw memory performance. Add new cxgb4_best_aligned_mtu() which allows callers to provide enough information to be used to [possibly] select an MTU which will result in the TCP Data Segment Size (AKA Maximum Segment Size) to be an aligned value. If an RTR message exhange is required, then align the ISS to 8B - 1 + 4, so that after the SYN the send seqno will align on a 4B boundary. The RTR message exchange will leave the send seqno aligned on an 8B boundary. If an RTR is not required, then align the ISS to 8B - 1. The goal is to have the send seqno be 8B aligned when we send the first FPDU. Based on original work by Casey Leedom <leeedom@chelsio.com> and Steve Wise <swise@opengridcomputing.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* RDMA/cxgb4: Force T5 connections to use TAHOE congestion controlSteve Wise2014-04-281-0/+14
| | | | | | | This is required to work around a T5 HW issue. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
* RDMA/cxgb4: Add module option to tweak delayed ackSteve Wise2010-07-211-0/+10
| | | | | Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
* RDMA/cxgb4: Add driver for Chelsio T4 RNICSteve Wise2010-04-211-0/+829
Add an RDMA/iWARP driver for Chelsio T4 Ethernet adapters. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
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